Lines Matching +full:spare +full:- +full:regs
1 // SPDX-License-Identifier: GPL-2.0+
13 * load balancing (non-VLAN mode)
16 * page-based RX descriptor engine with separate completion rings
22 * -- driver allocates pages at a time and keeps reference counts
24 * -- the upper protocol layers assume that the header is in the skb
27 * -- driver appends the rest of the data pages as frags to skbuffs
29 * -- on page reclamation, the driver swaps the page with a spare page.
37 * TX has 4 queues. currently these queues are used in a round-robin
41 * alternatively, the queues can be configured via use of the all-purpose
49 * encrypted and non-encrypted packets, but we use them for buffering
71 #include <linux/dma-mapping.h>
112 * also, we need to make cp->lock finer-grained.
143 * and dev->tx_timeout() should be called to fix the problem
156 * max mtu == 2 * page size - ethernet header - 64 - swivel =
157 * 2 * page_size - 0x50
162 #define CAS_MAX_MTU min(((cp->page_size << 1) - 0x50), 9000)
178 static int cassini_debug = -1; /* -1 == use CAS_DEF_MSG_ENABLE as value */
238 spin_lock_nested(&cp->tx_lock[i], i); in cas_lock_tx()
252 spin_lock_irqsave(&xxxcp->lock, flags); \
260 for (i = N_TX_RINGS; i > 0; i--) in cas_unlock_tx()
261 spin_unlock(&cp->tx_lock[i - 1]); in cas_unlock_tx()
268 spin_unlock_irqrestore(&xxxcp->lock, flags); \
275 writel(0xFFFFFFFF, cp->regs + REG_INTR_MASK); in cas_disable_irq()
280 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_disable_irq()
293 cp->regs + REG_PLUS_INTRN_MASK(ring)); in cas_disable_irq()
297 writel(INTRN_MASK_CLEAR_ALL, cp->regs + in cas_disable_irq()
315 writel(INTR_TX_DONE, cp->regs + REG_INTR_MASK); in cas_enable_irq()
319 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_enable_irq()
331 writel(INTRN_MASK_RX_EN, cp->regs + in cas_enable_irq()
352 if ((cp->cas_flags & CAS_FLAG_ENTROPY_DEV) == 0) in cas_entropy_gather()
355 batch_entropy_store(readl(cp->regs + REG_ENTROPY_IV), in cas_entropy_gather()
356 readl(cp->regs + REG_ENTROPY_IV), in cas_entropy_gather()
364 if ((cp->cas_flags & CAS_FLAG_ENTROPY_DEV) == 0) in cas_entropy_reset()
368 cp->regs + REG_BIM_LOCAL_DEV_EN); in cas_entropy_reset()
369 writeb(ENTROPY_RESET_STC_MODE, cp->regs + REG_ENTROPY_RESET); in cas_entropy_reset()
370 writeb(0x55, cp->regs + REG_ENTROPY_RAND_REG); in cas_entropy_reset()
373 if (readb(cp->regs + REG_ENTROPY_RAND_REG) == 0) in cas_entropy_reset()
374 cp->cas_flags &= ~CAS_FLAG_ENTROPY_DEV; in cas_entropy_reset()
379 * be in frame rather than bit-bang mode
387 cmd |= CAS_BASE(MIF_FRAME_PHY_ADDR, cp->phy_addr); in cas_phy_read()
390 writel(cmd, cp->regs + REG_MIF_FRAME); in cas_phy_read()
393 while (limit-- > 0) { in cas_phy_read()
395 cmd = readl(cp->regs + REG_MIF_FRAME); in cas_phy_read()
399 return 0xFFFF; /* -1 */ in cas_phy_read()
408 cmd |= CAS_BASE(MIF_FRAME_PHY_ADDR, cp->phy_addr); in cas_phy_write()
412 writel(cmd, cp->regs + REG_MIF_FRAME); in cas_phy_write()
415 while (limit-- > 0) { in cas_phy_write()
417 cmd = readl(cp->regs + REG_MIF_FRAME); in cas_phy_write()
421 return -1; in cas_phy_write()
444 /* cp->lock held. note: the last put_page will free the buffer */
447 dma_unmap_page(&cp->pdev->dev, page->dma_addr, cp->page_size, in cas_page_free()
449 __free_pages(page->buffer, cp->page_order); in cas_page_free()
455 #define RX_USED_ADD(x, y) ((x)->used += (y))
456 #define RX_USED_SET(x, y) ((x)->used = (y))
473 INIT_LIST_HEAD(&page->list); in cas_page_alloc()
475 page->buffer = alloc_pages(flags, cp->page_order); in cas_page_alloc()
476 if (!page->buffer) in cas_page_alloc()
478 page->dma_addr = dma_map_page(&cp->pdev->dev, page->buffer, 0, in cas_page_alloc()
479 cp->page_size, DMA_FROM_DEVICE); in cas_page_alloc()
487 /* initialize spare pool of rx buffers, but allocate during the open */
490 spin_lock(&cp->rx_inuse_lock); in cas_spare_init()
491 INIT_LIST_HEAD(&cp->rx_inuse_list); in cas_spare_init()
492 spin_unlock(&cp->rx_inuse_lock); in cas_spare_init()
494 spin_lock(&cp->rx_spare_lock); in cas_spare_init()
495 INIT_LIST_HEAD(&cp->rx_spare_list); in cas_spare_init()
496 cp->rx_spares_needed = RX_SPARE_COUNT; in cas_spare_init()
497 spin_unlock(&cp->rx_spare_lock); in cas_spare_init()
500 /* used on close. free all the spare buffers. */
505 /* free spare buffers */ in cas_spare_free()
507 spin_lock(&cp->rx_spare_lock); in cas_spare_free()
508 list_splice_init(&cp->rx_spare_list, &list); in cas_spare_free()
509 spin_unlock(&cp->rx_spare_lock); in cas_spare_free()
520 spin_lock(&cp->rx_inuse_lock); in cas_spare_free()
521 list_splice_init(&cp->rx_inuse_list, &list); in cas_spare_free()
522 spin_unlock(&cp->rx_inuse_lock); in cas_spare_free()
524 spin_lock(&cp->rx_spare_lock); in cas_spare_free()
525 list_splice_init(&cp->rx_inuse_list, &list); in cas_spare_free()
526 spin_unlock(&cp->rx_spare_lock); in cas_spare_free()
545 spin_lock(&cp->rx_inuse_lock); in cas_spare_recover()
546 list_splice_init(&cp->rx_inuse_list, &list); in cas_spare_recover()
547 spin_unlock(&cp->rx_inuse_lock); in cas_spare_recover()
556 * and skip it as in-use. Ideally we would be able to reclaim in cas_spare_recover()
564 if (page_count(page->buffer) > 1) in cas_spare_recover()
568 spin_lock(&cp->rx_spare_lock); in cas_spare_recover()
569 if (cp->rx_spares_needed > 0) { in cas_spare_recover()
570 list_add(elem, &cp->rx_spare_list); in cas_spare_recover()
571 cp->rx_spares_needed--; in cas_spare_recover()
572 spin_unlock(&cp->rx_spare_lock); in cas_spare_recover()
574 spin_unlock(&cp->rx_spare_lock); in cas_spare_recover()
581 spin_lock(&cp->rx_inuse_lock); in cas_spare_recover()
582 list_splice(&list, &cp->rx_inuse_list); in cas_spare_recover()
583 spin_unlock(&cp->rx_inuse_lock); in cas_spare_recover()
586 spin_lock(&cp->rx_spare_lock); in cas_spare_recover()
587 needed = cp->rx_spares_needed; in cas_spare_recover()
588 spin_unlock(&cp->rx_spare_lock); in cas_spare_recover()
596 cas_page_t *spare = cas_page_alloc(cp, flags); in cas_spare_recover() local
597 if (!spare) in cas_spare_recover()
599 list_add(&spare->list, &list); in cas_spare_recover()
603 spin_lock(&cp->rx_spare_lock); in cas_spare_recover()
604 list_splice(&list, &cp->rx_spare_list); in cas_spare_recover()
605 cp->rx_spares_needed -= i; in cas_spare_recover()
606 spin_unlock(&cp->rx_spare_lock); in cas_spare_recover()
615 spin_lock(&cp->rx_spare_lock); in cas_page_dequeue()
616 if (list_empty(&cp->rx_spare_list)) { in cas_page_dequeue()
618 spin_unlock(&cp->rx_spare_lock); in cas_page_dequeue()
620 spin_lock(&cp->rx_spare_lock); in cas_page_dequeue()
621 if (list_empty(&cp->rx_spare_list)) { in cas_page_dequeue()
622 netif_err(cp, rx_err, cp->dev, in cas_page_dequeue()
623 "no spare buffers available\n"); in cas_page_dequeue()
624 spin_unlock(&cp->rx_spare_lock); in cas_page_dequeue()
629 entry = cp->rx_spare_list.next; in cas_page_dequeue()
631 recover = ++cp->rx_spares_needed; in cas_page_dequeue()
632 spin_unlock(&cp->rx_spare_lock); in cas_page_dequeue()
635 if ((recover & (RX_SPARE_RECOVER_VAL - 1)) == 0) { in cas_page_dequeue()
637 atomic_inc(&cp->reset_task_pending); in cas_page_dequeue()
638 atomic_inc(&cp->reset_task_pending_spare); in cas_page_dequeue()
639 schedule_work(&cp->reset_task); in cas_page_dequeue()
641 atomic_set(&cp->reset_task_pending, CAS_RESET_SPARE); in cas_page_dequeue()
642 schedule_work(&cp->reset_task); in cas_page_dequeue()
653 cfg = readl(cp->regs + REG_MIF_CFG); in cas_mif_poll()
656 if (cp->phy_type & CAS_PHY_MII_MDIO1) in cas_mif_poll()
663 cfg |= CAS_BASE(MIF_CFG_POLL_PHY, cp->phy_addr); in cas_mif_poll()
666 cp->regs + REG_MIF_MASK); in cas_mif_poll()
667 writel(cfg, cp->regs + REG_MIF_CFG); in cas_mif_poll()
670 /* Must be invoked under cp->lock */
678 int oldstate = cp->lstate; in cas_begin_auto_negotiation()
684 lcntl = cp->link_cntl; in cas_begin_auto_negotiation()
685 if (ep->base.autoneg == AUTONEG_ENABLE) { in cas_begin_auto_negotiation()
686 cp->link_cntl = BMCR_ANENABLE; in cas_begin_auto_negotiation()
688 u32 speed = ep->base.speed; in cas_begin_auto_negotiation()
689 cp->link_cntl = 0; in cas_begin_auto_negotiation()
691 cp->link_cntl |= BMCR_SPEED100; in cas_begin_auto_negotiation()
693 cp->link_cntl |= CAS_BMCR_SPEED1000; in cas_begin_auto_negotiation()
694 if (ep->base.duplex == DUPLEX_FULL) in cas_begin_auto_negotiation()
695 cp->link_cntl |= BMCR_FULLDPLX; in cas_begin_auto_negotiation()
698 changed = (lcntl != cp->link_cntl); in cas_begin_auto_negotiation()
701 if (cp->lstate == link_up) { in cas_begin_auto_negotiation()
702 netdev_info(cp->dev, "PCS link down\n"); in cas_begin_auto_negotiation()
705 netdev_info(cp->dev, "link configuration changed\n"); in cas_begin_auto_negotiation()
708 cp->lstate = link_down; in cas_begin_auto_negotiation()
709 cp->link_transition = LINK_TRANSITION_LINK_DOWN; in cas_begin_auto_negotiation()
710 if (!cp->hw_running) in cas_begin_auto_negotiation()
715 * to replicate everything we do elsewhere on a link-down in cas_begin_auto_negotiation()
716 * event when we were already in a link-up state.. in cas_begin_auto_negotiation()
719 netif_carrier_off(cp->dev); in cas_begin_auto_negotiation()
724 * fixes the link-problems we were having for forced mode. in cas_begin_auto_negotiation()
726 atomic_inc(&cp->reset_task_pending); in cas_begin_auto_negotiation()
727 atomic_inc(&cp->reset_task_pending_all); in cas_begin_auto_negotiation()
728 schedule_work(&cp->reset_task); in cas_begin_auto_negotiation()
729 cp->timer_ticks = 0; in cas_begin_auto_negotiation()
730 mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); in cas_begin_auto_negotiation()
734 if (cp->phy_type & CAS_PHY_SERDES) { in cas_begin_auto_negotiation()
735 u32 val = readl(cp->regs + REG_PCS_MII_CTRL); in cas_begin_auto_negotiation()
737 if (cp->link_cntl & BMCR_ANENABLE) { in cas_begin_auto_negotiation()
739 cp->lstate = link_aneg; in cas_begin_auto_negotiation()
741 if (cp->link_cntl & BMCR_FULLDPLX) in cas_begin_auto_negotiation()
744 cp->lstate = link_force_ok; in cas_begin_auto_negotiation()
746 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_begin_auto_negotiation()
747 writel(val, cp->regs + REG_PCS_MII_CTRL); in cas_begin_auto_negotiation()
754 ctl |= cp->link_cntl; in cas_begin_auto_negotiation()
757 cp->lstate = link_aneg; in cas_begin_auto_negotiation()
759 cp->lstate = link_force_ok; in cas_begin_auto_negotiation()
761 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_begin_auto_negotiation()
766 cp->timer_ticks = 0; in cas_begin_auto_negotiation()
767 mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); in cas_begin_auto_negotiation()
770 /* Must be invoked under cp->lock. */
778 while (--limit) { in cas_reset_mii_phy()
793 if (PHY_NS_DP83065 != cp->phy_id) in cas_saturn_firmware_init()
796 err = request_firmware(&fw, fw_name, &cp->pdev->dev); in cas_saturn_firmware_init()
802 if (fw->size < 2) { in cas_saturn_firmware_init()
804 fw->size, fw_name); in cas_saturn_firmware_init()
807 cp->fw_load_addr= fw->data[1] << 8 | fw->data[0]; in cas_saturn_firmware_init()
808 cp->fw_size = fw->size - 2; in cas_saturn_firmware_init()
809 cp->fw_data = vmalloc(cp->fw_size); in cas_saturn_firmware_init()
810 if (!cp->fw_data) in cas_saturn_firmware_init()
812 memcpy(cp->fw_data, &fw->data[2], cp->fw_size); in cas_saturn_firmware_init()
821 if (!cp->fw_data) in cas_saturn_firmware_load()
841 cas_phy_write(cp, DP83065_MII_REGE, cp->fw_load_addr); in cas_saturn_firmware_load()
842 for (i = 0; i < cp->fw_size; i++) in cas_saturn_firmware_load()
843 cas_phy_write(cp, DP83065_MII_REGD, cp->fw_data[i]); in cas_saturn_firmware_load()
857 if (CAS_PHY_MII(cp->phy_type)) { in cas_phy_init()
859 cp->regs + REG_PCS_DATAPATH_MODE); in cas_phy_init()
864 if (PHY_LUCENT_B0 == cp->phy_id) { in cas_phy_init()
870 } else if (PHY_BROADCOM_B0 == (cp->phy_id & 0xFFFFFFFC)) { in cas_phy_init()
884 } else if (PHY_BROADCOM_5411 == cp->phy_id) { in cas_phy_init()
893 } else if (cp->cas_flags & CAS_FLAG_SATURN) { in cas_phy_init()
894 writel((cp->phy_type & CAS_PHY_MII_MDIO0) ? in cas_phy_init()
896 cp->regs + REG_SATURN_PCFG); in cas_phy_init()
898 /* load firmware to address 10Mbps auto-negotiation in cas_phy_init()
902 if (PHY_NS_DP83065 == cp->phy_id) { in cas_phy_init()
921 if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { in cas_phy_init()
937 cp->regs + REG_PCS_DATAPATH_MODE); in cas_phy_init()
940 if (cp->cas_flags & CAS_FLAG_SATURN) in cas_phy_init()
941 writel(0, cp->regs + REG_SATURN_PCFG); in cas_phy_init()
944 val = readl(cp->regs + REG_PCS_MII_CTRL); in cas_phy_init()
946 writel(val, cp->regs + REG_PCS_MII_CTRL); in cas_phy_init()
949 while (--limit > 0) { in cas_phy_init()
951 if ((readl(cp->regs + REG_PCS_MII_CTRL) & in cas_phy_init()
956 netdev_warn(cp->dev, "PCS reset bit would not clear [%08x]\n", in cas_phy_init()
957 readl(cp->regs + REG_PCS_STATE_MACHINE)); in cas_phy_init()
962 writel(0x0, cp->regs + REG_PCS_CFG); in cas_phy_init()
964 /* Advertise all capabilities except half-duplex. */ in cas_phy_init()
965 val = readl(cp->regs + REG_PCS_MII_ADVERT); in cas_phy_init()
969 writel(val, cp->regs + REG_PCS_MII_ADVERT); in cas_phy_init()
972 writel(PCS_CFG_EN, cp->regs + REG_PCS_CFG); in cas_phy_init()
976 cp->regs + REG_PCS_SERDES_CTRL); in cas_phy_init()
990 stat = readl(cp->regs + REG_PCS_MII_STATUS); in cas_pcs_link_check()
992 stat = readl(cp->regs + REG_PCS_MII_STATUS); in cas_pcs_link_check()
994 /* The remote-fault indication is only valid in cas_pcs_link_check()
1000 netif_info(cp, link, cp->dev, "PCS RemoteFault\n"); in cas_pcs_link_check()
1005 state_machine = readl(cp->regs + REG_PCS_STATE_MACHINE); in cas_pcs_link_check()
1013 if (cp->lstate != link_up) { in cas_pcs_link_check()
1014 if (cp->opened) { in cas_pcs_link_check()
1015 cp->lstate = link_up; in cas_pcs_link_check()
1016 cp->link_transition = LINK_TRANSITION_LINK_UP; in cas_pcs_link_check()
1019 netif_carrier_on(cp->dev); in cas_pcs_link_check()
1022 } else if (cp->lstate == link_up) { in cas_pcs_link_check()
1023 cp->lstate = link_down; in cas_pcs_link_check()
1025 cp->link_transition != LINK_TRANSITION_REQUESTED_RESET && in cas_pcs_link_check()
1026 !cp->link_transition_jiffies_valid) { in cas_pcs_link_check()
1029 * link-failure problem. May want to move this to a in cas_pcs_link_check()
1036 * link timer is running - this clears the flag after in cas_pcs_link_check()
1040 cp->link_transition = LINK_TRANSITION_REQUESTED_RESET; in cas_pcs_link_check()
1041 cp->link_transition_jiffies = jiffies; in cas_pcs_link_check()
1042 cp->link_transition_jiffies_valid = 1; in cas_pcs_link_check()
1044 cp->link_transition = LINK_TRANSITION_ON_FAILURE; in cas_pcs_link_check()
1046 netif_carrier_off(cp->dev); in cas_pcs_link_check()
1047 if (cp->opened) in cas_pcs_link_check()
1048 netif_info(cp, link, cp->dev, "PCS link down\n"); in cas_pcs_link_check()
1058 if ((cp->cas_flags & CAS_FLAG_REG_PLUS) == 0) { in cas_pcs_link_check()
1060 stat = readl(cp->regs + REG_PCS_SERDES_STATE); in cas_pcs_link_check()
1064 } else if (cp->lstate == link_down) { in cas_pcs_link_check()
1066 cp->link_transition != LINK_TRANSITION_REQUESTED_RESET && in cas_pcs_link_check()
1067 !cp->link_transition_jiffies_valid) { in cas_pcs_link_check()
1069 * link-failure problem. May want to move in cas_pcs_link_check()
1074 cp->link_transition = LINK_TRANSITION_REQUESTED_RESET; in cas_pcs_link_check()
1075 cp->link_transition_jiffies = jiffies; in cas_pcs_link_check()
1076 cp->link_transition_jiffies_valid = 1; in cas_pcs_link_check()
1078 cp->link_transition = LINK_TRANSITION_STILL_FAILED; in cas_pcs_link_check()
1088 u32 stat = readl(cp->regs + REG_PCS_INTR_STATUS); in cas_pcs_interrupt()
1098 u32 txmac_stat = readl(cp->regs + REG_MAC_TX_STATUS); in cas_txmac_interrupt()
1103 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_txmac_interrupt()
1113 spin_lock(&cp->stat_lock[0]); in cas_txmac_interrupt()
1116 cp->net_stats[0].tx_fifo_errors++; in cas_txmac_interrupt()
1121 cp->net_stats[0].tx_errors++; in cas_txmac_interrupt()
1124 /* The rest are all cases of one of the 16-bit TX in cas_txmac_interrupt()
1128 cp->net_stats[0].collisions += 0x10000; in cas_txmac_interrupt()
1131 cp->net_stats[0].tx_aborted_errors += 0x10000; in cas_txmac_interrupt()
1132 cp->net_stats[0].collisions += 0x10000; in cas_txmac_interrupt()
1136 cp->net_stats[0].tx_aborted_errors += 0x10000; in cas_txmac_interrupt()
1137 cp->net_stats[0].collisions += 0x10000; in cas_txmac_interrupt()
1139 spin_unlock(&cp->stat_lock[0]); in cas_txmac_interrupt()
1154 while ((inst = firmware) && inst->note) { in cas_load_firmware()
1155 writel(i, cp->regs + REG_HP_INSTR_RAM_ADDR); in cas_load_firmware()
1157 val = CAS_BASE(HP_INSTR_RAM_HI_VAL, inst->val); in cas_load_firmware()
1158 val |= CAS_BASE(HP_INSTR_RAM_HI_MASK, inst->mask); in cas_load_firmware()
1159 writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_HI); in cas_load_firmware()
1161 val = CAS_BASE(HP_INSTR_RAM_MID_OUTARG, inst->outarg >> 10); in cas_load_firmware()
1162 val |= CAS_BASE(HP_INSTR_RAM_MID_OUTOP, inst->outop); in cas_load_firmware()
1163 val |= CAS_BASE(HP_INSTR_RAM_MID_FNEXT, inst->fnext); in cas_load_firmware()
1164 val |= CAS_BASE(HP_INSTR_RAM_MID_FOFF, inst->foff); in cas_load_firmware()
1165 val |= CAS_BASE(HP_INSTR_RAM_MID_SNEXT, inst->snext); in cas_load_firmware()
1166 val |= CAS_BASE(HP_INSTR_RAM_MID_SOFF, inst->soff); in cas_load_firmware()
1167 val |= CAS_BASE(HP_INSTR_RAM_MID_OP, inst->op); in cas_load_firmware()
1168 writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_MID); in cas_load_firmware()
1170 val = CAS_BASE(HP_INSTR_RAM_LOW_OUTMASK, inst->outmask); in cas_load_firmware()
1171 val |= CAS_BASE(HP_INSTR_RAM_LOW_OUTSHIFT, inst->outshift); in cas_load_firmware()
1172 val |= CAS_BASE(HP_INSTR_RAM_LOW_OUTEN, inst->outenab); in cas_load_firmware()
1173 val |= CAS_BASE(HP_INSTR_RAM_LOW_OUTARG, inst->outarg); in cas_load_firmware()
1174 writel(val, cp->regs + REG_HP_INSTR_RAM_DATA_LOW); in cas_load_firmware()
1182 u64 desc_dma = cp->block_dvma; in cas_init_rx_dma()
1191 (cp->cas_flags & CAS_FLAG_REG_PLUS)) /* do desc 2 */ in cas_init_rx_dma()
1193 writel(val, cp->regs + REG_RX_CFG); in cas_init_rx_dma()
1195 val = (unsigned long) cp->init_rxds[0] - in cas_init_rx_dma()
1196 (unsigned long) cp->init_block; in cas_init_rx_dma()
1197 writel((desc_dma + val) >> 32, cp->regs + REG_RX_DB_HI); in cas_init_rx_dma()
1198 writel((desc_dma + val) & 0xffffffff, cp->regs + REG_RX_DB_LOW); in cas_init_rx_dma()
1199 writel(RX_DESC_RINGN_SIZE(0) - 4, cp->regs + REG_RX_KICK); in cas_init_rx_dma()
1201 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_init_rx_dma()
1205 val = (unsigned long) cp->init_rxds[1] - in cas_init_rx_dma()
1206 (unsigned long) cp->init_block; in cas_init_rx_dma()
1207 writel((desc_dma + val) >> 32, cp->regs + REG_PLUS_RX_DB1_HI); in cas_init_rx_dma()
1208 writel((desc_dma + val) & 0xffffffff, cp->regs + in cas_init_rx_dma()
1210 writel(RX_DESC_RINGN_SIZE(1) - 4, cp->regs + in cas_init_rx_dma()
1215 val = (unsigned long) cp->init_rxcs[0] - in cas_init_rx_dma()
1216 (unsigned long) cp->init_block; in cas_init_rx_dma()
1217 writel((desc_dma + val) >> 32, cp->regs + REG_RX_CB_HI); in cas_init_rx_dma()
1218 writel((desc_dma + val) & 0xffffffff, cp->regs + REG_RX_CB_LOW); in cas_init_rx_dma()
1220 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_init_rx_dma()
1221 /* rx comp 2-4 */ in cas_init_rx_dma()
1223 val = (unsigned long) cp->init_rxcs[i] - in cas_init_rx_dma()
1224 (unsigned long) cp->init_block; in cas_init_rx_dma()
1225 writel((desc_dma + val) >> 32, cp->regs + in cas_init_rx_dma()
1227 writel((desc_dma + val) & 0xffffffff, cp->regs + in cas_init_rx_dma()
1232 /* read selective clear regs to prevent spurious interrupts in cas_init_rx_dma()
1236 readl(cp->regs + REG_INTR_STATUS_ALIAS); in cas_init_rx_dma()
1237 writel(INTR_RX_DONE | INTR_RX_BUF_UNAVAIL, cp->regs + REG_ALIAS_CLEAR); in cas_init_rx_dma()
1241 cp->rx_pause_off / RX_PAUSE_THRESH_QUANTUM); in cas_init_rx_dma()
1243 cp->rx_pause_on / RX_PAUSE_THRESH_QUANTUM); in cas_init_rx_dma()
1244 writel(val, cp->regs + REG_RX_PAUSE_THRESH); in cas_init_rx_dma()
1248 writel(i, cp->regs + REG_RX_TABLE_ADDR); in cas_init_rx_dma()
1249 writel(0x0, cp->regs + REG_RX_TABLE_DATA_LOW); in cas_init_rx_dma()
1250 writel(0x0, cp->regs + REG_RX_TABLE_DATA_MID); in cas_init_rx_dma()
1251 writel(0x0, cp->regs + REG_RX_TABLE_DATA_HI); in cas_init_rx_dma()
1255 writel(0x0, cp->regs + REG_RX_CTRL_FIFO_ADDR); in cas_init_rx_dma()
1256 writel(0x0, cp->regs + REG_RX_IPP_FIFO_ADDR); in cas_init_rx_dma()
1262 writel(val, cp->regs + REG_RX_BLANK); in cas_init_rx_dma()
1264 writel(0x0, cp->regs + REG_RX_BLANK); in cas_init_rx_dma()
1274 writel(val, cp->regs + REG_RX_AE_THRESH); in cas_init_rx_dma()
1275 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_init_rx_dma()
1277 writel(val, cp->regs + REG_PLUS_RX_AE1_THRESH); in cas_init_rx_dma()
1283 writel(0x0, cp->regs + REG_RX_RED); in cas_init_rx_dma()
1287 if (cp->page_size == 0x1000) in cas_init_rx_dma()
1289 else if (cp->page_size == 0x2000) in cas_init_rx_dma()
1291 else if (cp->page_size == 0x4000) in cas_init_rx_dma()
1295 size = cp->dev->mtu + 64; in cas_init_rx_dma()
1296 if (size > cp->page_size) in cas_init_rx_dma()
1297 size = cp->page_size; in cas_init_rx_dma()
1308 cp->mtu_stride = 1 << (i + 10); in cas_init_rx_dma()
1311 val |= CAS_BASE(RX_PAGE_SIZE_MTU_COUNT, cp->page_size >> (i + 10)); in cas_init_rx_dma()
1313 writel(val, cp->regs + REG_RX_PAGE_SIZE); in cas_init_rx_dma()
1322 writel(val, cp->regs + REG_HP_CFG); in cas_init_rx_dma()
1328 rxc->word4 = cpu_to_le64(RX_COMP4_ZERO); in cas_rxc_init()
1337 cas_page_t *page = cp->rx_pages[1][index]; in cas_page_spare()
1340 if (page_count(page->buffer) == 1) in cas_page_spare()
1345 spin_lock(&cp->rx_inuse_lock); in cas_page_spare()
1346 list_add(&page->list, &cp->rx_inuse_list); in cas_page_spare()
1347 spin_unlock(&cp->rx_inuse_lock); in cas_page_spare()
1356 cas_page_t **page0 = cp->rx_pages[0]; in cas_page_swap()
1357 cas_page_t **page1 = cp->rx_pages[1]; in cas_page_swap()
1360 if (page_count(page0[index]->buffer) > 1) { in cas_page_swap()
1373 /* only clean ring 0 as ring 1 is used for spare buffers */ in cas_clean_rxds()
1374 struct cas_rx_desc *rxd = cp->init_rxds[0]; in cas_clean_rxds()
1380 while ((skb = __skb_dequeue(&cp->rx_flows[i]))) { in cas_clean_rxds()
1389 rxd[i].buffer = cpu_to_le64(page->dma_addr); in cas_clean_rxds()
1394 cp->rx_old[0] = RX_DESC_RINGN_SIZE(0) - 4; in cas_clean_rxds()
1395 cp->rx_last[0] = 0; in cas_clean_rxds()
1396 cp->cas_flags &= ~CAS_FLAG_RXD_POST(0); in cas_clean_rxds()
1404 memset(cp->rx_cur, 0, sizeof(*cp->rx_cur)*N_RX_COMP_RINGS); in cas_clean_rxcs()
1405 memset(cp->rx_new, 0, sizeof(*cp->rx_new)*N_RX_COMP_RINGS); in cas_clean_rxcs()
1407 struct cas_rx_comp *rxc = cp->init_rxcs[i]; in cas_clean_rxcs()
1423 struct net_device *dev = cp->dev;
1428 writel(cp->mac_rx_cfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG);
1430 if (!(readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_EN))
1440 writel(0, cp->regs + REG_RX_CFG);
1442 if (!(readl(cp->regs + REG_RX_CFG) & RX_CFG_DMA_EN))
1454 writel(SW_RESET_RX, cp->regs + REG_SW_RESET);
1456 if (!(readl(cp->regs + REG_SW_RESET) & SW_RESET_RX))
1472 /* re-enable */
1473 val = readl(cp->regs + REG_RX_CFG);
1474 writel(val | RX_CFG_DMA_EN, cp->regs + REG_RX_CFG);
1475 writel(MAC_RX_FRAME_RECV, cp->regs + REG_MAC_RX_MASK);
1476 val = readl(cp->regs + REG_MAC_RX_CFG);
1477 writel(val | MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG);
1485 u32 stat = readl(cp->regs + REG_MAC_RX_STATUS); in cas_rxmac_interrupt()
1490 netif_dbg(cp, intr, cp->dev, "rxmac interrupt, stat: 0x%x\n", stat); in cas_rxmac_interrupt()
1493 spin_lock(&cp->stat_lock[0]); in cas_rxmac_interrupt()
1495 cp->net_stats[0].rx_frame_errors += 0x10000; in cas_rxmac_interrupt()
1498 cp->net_stats[0].rx_crc_errors += 0x10000; in cas_rxmac_interrupt()
1501 cp->net_stats[0].rx_length_errors += 0x10000; in cas_rxmac_interrupt()
1504 cp->net_stats[0].rx_over_errors++; in cas_rxmac_interrupt()
1505 cp->net_stats[0].rx_fifo_errors++; in cas_rxmac_interrupt()
1511 spin_unlock(&cp->stat_lock[0]); in cas_rxmac_interrupt()
1518 u32 stat = readl(cp->regs + REG_MAC_CTRL_STATUS); in cas_mac_interrupt()
1523 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_mac_interrupt()
1531 cp->pause_entered++; in cas_mac_interrupt()
1534 cp->pause_last_time_recvd = (stat >> 16); in cas_mac_interrupt()
1540 /* Must be invoked under cp->lock. */
1545 switch (cp->lstate) { in cas_mdio_link_not_up()
1547 netif_info(cp, link, cp->dev, "Autoneg failed again, keeping forced mode\n"); in cas_mdio_link_not_up()
1548 cas_phy_write(cp, MII_BMCR, cp->link_fcntl); in cas_mdio_link_not_up()
1549 cp->timer_ticks = 5; in cas_mdio_link_not_up()
1550 cp->lstate = link_force_ok; in cas_mdio_link_not_up()
1551 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_mdio_link_not_up()
1558 * 1000 full -> 100 full/half -> 10 half in cas_mdio_link_not_up()
1562 val |= (cp->cas_flags & CAS_FLAG_1000MB_CAP) ? in cas_mdio_link_not_up()
1565 cp->timer_ticks = 5; in cas_mdio_link_not_up()
1566 cp->lstate = link_force_try; in cas_mdio_link_not_up()
1567 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_mdio_link_not_up()
1573 cp->timer_ticks = 5; in cas_mdio_link_not_up()
1598 /* must be invoked with cp->lock held */
1609 if ((cp->lstate == link_force_try) && in cas_mii_link_check()
1610 (cp->link_cntl & BMCR_ANENABLE)) { in cas_mii_link_check()
1611 cp->lstate = link_force_ret; in cas_mii_link_check()
1612 cp->link_transition = LINK_TRANSITION_LINK_CONFIG; in cas_mii_link_check()
1614 cp->link_fcntl = cas_phy_read(cp, MII_BMCR); in cas_mii_link_check()
1615 cp->timer_ticks = 5; in cas_mii_link_check()
1616 if (cp->opened) in cas_mii_link_check()
1617 netif_info(cp, link, cp->dev, in cas_mii_link_check()
1620 cp->link_fcntl | BMCR_ANENABLE | in cas_mii_link_check()
1624 } else if (cp->lstate != link_up) { in cas_mii_link_check()
1625 cp->lstate = link_up; in cas_mii_link_check()
1626 cp->link_transition = LINK_TRANSITION_LINK_UP; in cas_mii_link_check()
1628 if (cp->opened) { in cas_mii_link_check()
1630 netif_carrier_on(cp->dev); in cas_mii_link_check()
1640 if (cp->lstate == link_up) { in cas_mii_link_check()
1641 cp->lstate = link_down; in cas_mii_link_check()
1642 cp->link_transition = LINK_TRANSITION_LINK_DOWN; in cas_mii_link_check()
1644 netif_carrier_off(cp->dev); in cas_mii_link_check()
1645 if (cp->opened) in cas_mii_link_check()
1646 netif_info(cp, link, cp->dev, "Link down\n"); in cas_mii_link_check()
1649 } else if (++cp->timer_ticks > 10) in cas_mii_link_check()
1658 u32 stat = readl(cp->regs + REG_MIF_STATUS); in cas_mif_interrupt()
1672 u32 stat = readl(cp->regs + REG_PCI_ERR_STATUS); in cas_pci_interrupt()
1678 stat, readl(cp->regs + REG_BIM_DIAG)); in cas_pci_interrupt()
1682 ((cp->cas_flags & CAS_FLAG_REG_PLUS) == 0)) in cas_pci_interrupt()
1701 pci_errs = pci_status_get_and_clear_errors(cp->pdev); in cas_pci_interrupt()
1722 /* All non-normal interrupt conditions get serviced here.
1723 * Returns non-zero if we should just exit the interrupt
1732 netif_printk(cp, rx_err, KERN_DEBUG, cp->dev, in cas_abnormal_irq()
1734 spin_lock(&cp->stat_lock[0]); in cas_abnormal_irq()
1735 cp->net_stats[0].rx_errors++; in cas_abnormal_irq()
1736 spin_unlock(&cp->stat_lock[0]); in cas_abnormal_irq()
1742 netif_printk(cp, rx_err, KERN_DEBUG, cp->dev, in cas_abnormal_irq()
1744 spin_lock(&cp->stat_lock[0]); in cas_abnormal_irq()
1745 cp->net_stats[0].rx_errors++; in cas_abnormal_irq()
1746 spin_unlock(&cp->stat_lock[0]); in cas_abnormal_irq()
1783 atomic_inc(&cp->reset_task_pending); in cas_abnormal_irq()
1784 atomic_inc(&cp->reset_task_pending_all); in cas_abnormal_irq()
1786 schedule_work(&cp->reset_task); in cas_abnormal_irq()
1788 atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); in cas_abnormal_irq()
1790 schedule_work(&cp->reset_task); in cas_abnormal_irq()
1798 #define CAS_TABORT(x) (((x)->cas_flags & CAS_FLAG_TARGET_ABORT) ? 2 : 1)
1799 #define CAS_ROUND_PAGE(x) (((x) + PAGE_SIZE - 1) & PAGE_MASK)
1807 if ((CAS_ROUND_PAGE(off) - off) > TX_TARGET_ABORT_LEN) in cas_calc_tabort()
1816 struct net_device *dev = cp->dev; in cas_tx_ringN()
1819 spin_lock(&cp->tx_lock[ring]); in cas_tx_ringN()
1820 txds = cp->init_txds[ring]; in cas_tx_ringN()
1821 skbs = cp->tx_skbs[ring]; in cas_tx_ringN()
1822 entry = cp->tx_old[ring]; in cas_tx_ringN()
1838 count -= skb_shinfo(skb)->nr_frags + in cas_tx_ringN()
1839 + cp->tx_tiny_use[ring][entry].nbufs + 1; in cas_tx_ringN()
1843 netif_printk(cp, tx_done, KERN_DEBUG, cp->dev, in cas_tx_ringN()
1847 cp->tx_tiny_use[ring][entry].nbufs = 0; in cas_tx_ringN()
1849 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) { in cas_tx_ringN()
1852 daddr = le64_to_cpu(txd->buffer); in cas_tx_ringN()
1854 le64_to_cpu(txd->control)); in cas_tx_ringN()
1855 dma_unmap_page(&cp->pdev->dev, daddr, dlen, in cas_tx_ringN()
1860 if (cp->tx_tiny_use[ring][entry].used) { in cas_tx_ringN()
1861 cp->tx_tiny_use[ring][entry].used = 0; in cas_tx_ringN()
1866 spin_lock(&cp->stat_lock[ring]); in cas_tx_ringN()
1867 cp->net_stats[ring].tx_packets++; in cas_tx_ringN()
1868 cp->net_stats[ring].tx_bytes += skb->len; in cas_tx_ringN()
1869 spin_unlock(&cp->stat_lock[ring]); in cas_tx_ringN()
1872 cp->tx_old[ring] = entry; in cas_tx_ringN()
1881 spin_unlock(&cp->tx_lock[ring]); in cas_tx_ringN()
1889 u64 compwb = le64_to_cpu(cp->init_block->tx_compwb); in cas_tx()
1891 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_tx()
1902 limit = readl(cp->regs + REG_TX_COMPN(ring)); in cas_tx()
1904 if (cp->tx_old[ring] != limit) in cas_tx()
1931 skb = netdev_alloc_skb(cp->dev, alloclen + swivel + cp->crc_size); in cas_rx_process_pkt()
1933 return -1; in cas_rx_process_pkt()
1938 p = skb->data; in cas_rx_process_pkt()
1942 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
1948 i += cp->crc_size; in cas_rx_process_pkt()
1949 dma_sync_single_for_cpu(&cp->pdev->dev, page->dma_addr + off, in cas_rx_process_pkt()
1951 addr = cas_page_map(page->buffer); in cas_rx_process_pkt()
1953 dma_sync_single_for_device(&cp->pdev->dev, in cas_rx_process_pkt()
1954 page->dma_addr + off, i, in cas_rx_process_pkt()
1964 skb_frag_t *frag = skb_shinfo(skb)->frags; in cas_rx_process_pkt()
1968 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
1971 hlen = min(cp->page_size - off, dlen); in cas_rx_process_pkt()
1973 netif_printk(cp, rx_err, KERN_DEBUG, cp->dev, in cas_rx_process_pkt()
1976 return -1; in cas_rx_process_pkt()
1980 i += cp->crc_size; in cas_rx_process_pkt()
1981 dma_sync_single_for_cpu(&cp->pdev->dev, page->dma_addr + off, in cas_rx_process_pkt()
1986 if (p == (char *) skb->data) { /* not split */ in cas_rx_process_pkt()
1987 addr = cas_page_map(page->buffer); in cas_rx_process_pkt()
1989 dma_sync_single_for_device(&cp->pdev->dev, in cas_rx_process_pkt()
1990 page->dma_addr + off, i, in cas_rx_process_pkt()
1995 RX_USED_ADD(page, cp->mtu_stride); in cas_rx_process_pkt()
2001 skb_shinfo(skb)->nr_frags++; in cas_rx_process_pkt()
2002 skb->data_len += hlen - swivel; in cas_rx_process_pkt()
2003 skb->truesize += hlen - swivel; in cas_rx_process_pkt()
2004 skb->len += hlen - swivel; in cas_rx_process_pkt()
2006 __skb_frag_set_page(frag, page->buffer); in cas_rx_process_pkt()
2009 skb_frag_size_set(frag, hlen - swivel); in cas_rx_process_pkt()
2012 if ((words[0] & RX_COMP1_SPLIT_PKT) && ((dlen -= hlen) > 0)) { in cas_rx_process_pkt()
2017 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
2018 dma_sync_single_for_cpu(&cp->pdev->dev, in cas_rx_process_pkt()
2019 page->dma_addr, in cas_rx_process_pkt()
2020 hlen + cp->crc_size, in cas_rx_process_pkt()
2022 dma_sync_single_for_device(&cp->pdev->dev, in cas_rx_process_pkt()
2023 page->dma_addr, in cas_rx_process_pkt()
2024 hlen + cp->crc_size, in cas_rx_process_pkt()
2027 skb_shinfo(skb)->nr_frags++; in cas_rx_process_pkt()
2028 skb->data_len += hlen; in cas_rx_process_pkt()
2029 skb->len += hlen; in cas_rx_process_pkt()
2032 __skb_frag_set_page(frag, page->buffer); in cas_rx_process_pkt()
2036 RX_USED_ADD(page, hlen + cp->crc_size); in cas_rx_process_pkt()
2039 if (cp->crc_size) { in cas_rx_process_pkt()
2040 addr = cas_page_map(page->buffer); in cas_rx_process_pkt()
2050 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
2052 hlen = min(cp->page_size - off, dlen); in cas_rx_process_pkt()
2054 netif_printk(cp, rx_err, KERN_DEBUG, cp->dev, in cas_rx_process_pkt()
2057 return -1; in cas_rx_process_pkt()
2061 i += cp->crc_size; in cas_rx_process_pkt()
2062 dma_sync_single_for_cpu(&cp->pdev->dev, page->dma_addr + off, in cas_rx_process_pkt()
2064 addr = cas_page_map(page->buffer); in cas_rx_process_pkt()
2066 dma_sync_single_for_device(&cp->pdev->dev, in cas_rx_process_pkt()
2067 page->dma_addr + off, i, in cas_rx_process_pkt()
2070 if (p == (char *) skb->data) /* not split */ in cas_rx_process_pkt()
2071 RX_USED_ADD(page, cp->mtu_stride); in cas_rx_process_pkt()
2076 if ((words[0] & RX_COMP1_SPLIT_PKT) && ((dlen -= hlen) > 0)) { in cas_rx_process_pkt()
2079 page = cp->rx_pages[CAS_VAL(RX_INDEX_RING, i)][CAS_VAL(RX_INDEX_NUM, i)]; in cas_rx_process_pkt()
2080 dma_sync_single_for_cpu(&cp->pdev->dev, in cas_rx_process_pkt()
2081 page->dma_addr, in cas_rx_process_pkt()
2082 dlen + cp->crc_size, in cas_rx_process_pkt()
2084 addr = cas_page_map(page->buffer); in cas_rx_process_pkt()
2085 memcpy(p, addr, dlen + cp->crc_size); in cas_rx_process_pkt()
2086 dma_sync_single_for_device(&cp->pdev->dev, in cas_rx_process_pkt()
2087 page->dma_addr, in cas_rx_process_pkt()
2088 dlen + cp->crc_size, in cas_rx_process_pkt()
2091 RX_USED_ADD(page, dlen + cp->crc_size); in cas_rx_process_pkt()
2094 if (cp->crc_size) { in cas_rx_process_pkt()
2096 crcaddr = skb->data + alloclen; in cas_rx_process_pkt()
2102 if (cp->crc_size) { in cas_rx_process_pkt()
2104 csum = csum_fold(csum_partial(crcaddr, cp->crc_size, in cas_rx_process_pkt()
2109 skb->protocol = eth_type_trans(skb, cp->dev); in cas_rx_process_pkt()
2110 if (skb->protocol == htons(ETH_P_IP)) { in cas_rx_process_pkt()
2111 skb->csum = csum_unfold(~csum); in cas_rx_process_pkt()
2112 skb->ip_summed = CHECKSUM_COMPLETE; in cas_rx_process_pkt()
2136 int flowid = CAS_VAL(RX_COMP3_FLOWID, words[2]) & (N_RX_FLOWS - 1); in cas_rx_flow_pkt()
2137 struct sk_buff_head *flow = &cp->rx_flows[flowid]; in cas_rx_flow_pkt()
2159 entry = cp->rx_old[ring]; in cas_post_page()
2162 cp->init_rxds[ring][entry].buffer = cpu_to_le64(new->dma_addr); in cas_post_page()
2163 cp->init_rxds[ring][entry].index = in cas_post_page()
2168 cp->rx_old[ring] = entry; in cas_post_page()
2174 writel(entry, cp->regs + REG_RX_KICK); in cas_post_page()
2176 (cp->cas_flags & CAS_FLAG_REG_PLUS)) in cas_post_page()
2177 writel(entry, cp->regs + REG_PLUS_RX_KICK1); in cas_post_page()
2186 cas_page_t **page = cp->rx_pages[ring]; in cas_post_rxds_ringN()
2188 entry = cp->rx_old[ring]; in cas_post_rxds_ringN()
2190 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_post_rxds_ringN()
2193 cluster = -1; in cas_post_rxds_ringN()
2195 last = RX_DESC_ENTRY(ring, num ? entry + num - 4: entry - 4); in cas_post_rxds_ringN()
2199 if (page_count(page[entry]->buffer) > 1) { in cas_post_rxds_ringN()
2205 cp->cas_flags |= CAS_FLAG_RXD_POST(ring); in cas_post_rxds_ringN()
2206 if (!timer_pending(&cp->link_timer)) in cas_post_rxds_ringN()
2207 mod_timer(&cp->link_timer, jiffies + in cas_post_rxds_ringN()
2209 cp->rx_old[ring] = entry; in cas_post_rxds_ringN()
2210 cp->rx_last[ring] = num ? num - released : 0; in cas_post_rxds_ringN()
2211 return -ENOMEM; in cas_post_rxds_ringN()
2213 spin_lock(&cp->rx_inuse_lock); in cas_post_rxds_ringN()
2214 list_add(&page[entry]->list, &cp->rx_inuse_list); in cas_post_rxds_ringN()
2215 spin_unlock(&cp->rx_inuse_lock); in cas_post_rxds_ringN()
2216 cp->init_rxds[ring][entry].buffer = in cas_post_rxds_ringN()
2217 cpu_to_le64(new->dma_addr); in cas_post_rxds_ringN()
2229 cp->rx_old[ring] = entry; in cas_post_rxds_ringN()
2235 writel(cluster, cp->regs + REG_RX_KICK); in cas_post_rxds_ringN()
2237 (cp->cas_flags & CAS_FLAG_REG_PLUS)) in cas_post_rxds_ringN()
2238 writel(cluster, cp->regs + REG_PLUS_RX_KICK1); in cas_post_rxds_ringN()
2257 struct cas_rx_comp *rxcs = cp->init_rxcs[ring]; in cas_rx_ringN()
2261 netif_printk(cp, intr, KERN_DEBUG, cp->dev, in cas_rx_ringN()
2264 readl(cp->regs + REG_RX_COMP_HEAD), cp->rx_new[ring]); in cas_rx_ringN()
2266 entry = cp->rx_new[ring]; in cas_rx_ringN()
2275 words[0] = le64_to_cpu(rxc->word1); in cas_rx_ringN()
2276 words[1] = le64_to_cpu(rxc->word2); in cas_rx_ringN()
2277 words[2] = le64_to_cpu(rxc->word3); in cas_rx_ringN()
2278 words[3] = le64_to_cpu(rxc->word4); in cas_rx_ringN()
2292 spin_lock(&cp->stat_lock[ring]); in cas_rx_ringN()
2293 cp->net_stats[ring].rx_errors++; in cas_rx_ringN()
2295 cp->net_stats[ring].rx_length_errors++; in cas_rx_ringN()
2297 cp->net_stats[ring].rx_crc_errors++; in cas_rx_ringN()
2298 spin_unlock(&cp->stat_lock[ring]); in cas_rx_ringN()
2302 spin_lock(&cp->stat_lock[ring]); in cas_rx_ringN()
2303 ++cp->net_stats[ring].rx_dropped; in cas_rx_ringN()
2304 spin_unlock(&cp->stat_lock[ring]); in cas_rx_ringN()
2314 /* see if it's a flow re-assembly or not. the driver in cas_rx_ringN()
2318 /* non-reassm: these always get released */ in cas_rx_ringN()
2324 spin_lock(&cp->stat_lock[ring]); in cas_rx_ringN()
2325 cp->net_stats[ring].rx_packets++; in cas_rx_ringN()
2326 cp->net_stats[ring].rx_bytes += len; in cas_rx_ringN()
2327 spin_unlock(&cp->stat_lock[ring]); in cas_rx_ringN()
2362 cp->rx_new[ring] = entry; in cas_rx_ringN()
2365 netdev_info(cp->dev, "Memory squeeze, deferring packet\n"); in cas_rx_ringN()
2374 struct cas_rx_comp *rxc = cp->init_rxcs[ring]; in cas_post_rxcs_ringN()
2377 last = cp->rx_cur[ring]; in cas_post_rxcs_ringN()
2378 entry = cp->rx_new[ring]; in cas_post_rxcs_ringN()
2381 ring, readl(cp->regs + REG_RX_COMP_HEAD), entry); in cas_post_rxcs_ringN()
2383 /* zero and re-mark descriptors */ in cas_post_rxcs_ringN()
2388 cp->rx_cur[ring] = last; in cas_post_rxcs_ringN()
2391 writel(last, cp->regs + REG_RX_COMP_TAIL); in cas_post_rxcs_ringN()
2392 else if (cp->cas_flags & CAS_FLAG_REG_PLUS) in cas_post_rxcs_ringN()
2393 writel(last, cp->regs + REG_PLUS_RX_COMPN_TAIL(ring)); in cas_post_rxcs_ringN()
2415 int ring = (irq == cp->pci_irq_INTC) ? 2 : 3; in cas_interruptN()
2416 u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(ring)); in cas_interruptN()
2422 spin_lock_irqsave(&cp->lock, flags); in cas_interruptN()
2426 napi_schedule(&cp->napi); in cas_interruptN()
2435 spin_unlock_irqrestore(&cp->lock, flags); in cas_interruptN()
2448 spin_lock(&cp->stat_lock[1]); in cas_handle_irq1()
2449 cp->net_stats[1].rx_dropped++; in cas_handle_irq1()
2450 spin_unlock(&cp->stat_lock[1]); in cas_handle_irq1()
2454 cas_post_rxds_ringN(cp, 1, RX_DESC_RINGN_SIZE(1) - in cas_handle_irq1()
2467 u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(1)); in cas_interrupt1()
2473 spin_lock_irqsave(&cp->lock, flags); in cas_interrupt1()
2477 napi_schedule(&cp->napi); in cas_interrupt1()
2485 spin_unlock_irqrestore(&cp->lock, flags); in cas_interrupt1()
2502 spin_lock(&cp->stat_lock[0]); in cas_handle_irq()
2503 cp->net_stats[0].rx_dropped++; in cas_handle_irq()
2504 spin_unlock(&cp->stat_lock[0]); in cas_handle_irq()
2506 cas_post_rxds_ringN(cp, 0, RX_DESC_RINGN_SIZE(0) - in cas_handle_irq()
2519 u32 status = readl(cp->regs + REG_INTR_STATUS); in cas_interrupt()
2524 spin_lock_irqsave(&cp->lock, flags); in cas_interrupt()
2533 napi_schedule(&cp->napi); in cas_interrupt()
2542 spin_unlock_irqrestore(&cp->lock, flags); in cas_interrupt()
2551 struct net_device *dev = cp->dev; in cas_poll()
2553 u32 status = readl(cp->regs + REG_INTR_STATUS); in cas_poll()
2556 spin_lock_irqsave(&cp->lock, flags); in cas_poll()
2558 spin_unlock_irqrestore(&cp->lock, flags); in cas_poll()
2582 spin_lock_irqsave(&cp->lock, flags); in cas_poll()
2588 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(1)); in cas_poll()
2596 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(2)); in cas_poll()
2604 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(3)); in cas_poll()
2609 spin_unlock_irqrestore(&cp->lock, flags); in cas_poll()
2624 cas_interrupt(cp->pdev->irq, dev); in cas_netpoll()
2650 if (!cp->hw_running) { in cas_tx_timeout()
2656 readl(cp->regs + REG_MIF_STATE_MACHINE)); in cas_tx_timeout()
2659 readl(cp->regs + REG_MAC_STATE_MACHINE)); in cas_tx_timeout()
2662 readl(cp->regs + REG_TX_CFG), in cas_tx_timeout()
2663 readl(cp->regs + REG_MAC_TX_STATUS), in cas_tx_timeout()
2664 readl(cp->regs + REG_MAC_TX_CFG), in cas_tx_timeout()
2665 readl(cp->regs + REG_TX_FIFO_PKT_CNT), in cas_tx_timeout()
2666 readl(cp->regs + REG_TX_FIFO_WRITE_PTR), in cas_tx_timeout()
2667 readl(cp->regs + REG_TX_FIFO_READ_PTR), in cas_tx_timeout()
2668 readl(cp->regs + REG_TX_SM_1), in cas_tx_timeout()
2669 readl(cp->regs + REG_TX_SM_2)); in cas_tx_timeout()
2672 readl(cp->regs + REG_RX_CFG), in cas_tx_timeout()
2673 readl(cp->regs + REG_MAC_RX_STATUS), in cas_tx_timeout()
2674 readl(cp->regs + REG_MAC_RX_CFG)); in cas_tx_timeout()
2677 readl(cp->regs + REG_HP_STATE_MACHINE), in cas_tx_timeout()
2678 readl(cp->regs + REG_HP_STATUS0), in cas_tx_timeout()
2679 readl(cp->regs + REG_HP_STATUS1), in cas_tx_timeout()
2680 readl(cp->regs + REG_HP_STATUS2)); in cas_tx_timeout()
2683 atomic_inc(&cp->reset_task_pending); in cas_tx_timeout()
2684 atomic_inc(&cp->reset_task_pending_all); in cas_tx_timeout()
2685 schedule_work(&cp->reset_task); in cas_tx_timeout()
2687 atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); in cas_tx_timeout()
2688 schedule_work(&cp->reset_task); in cas_tx_timeout()
2695 if (!(entry & ((TX_DESC_RINGN_SIZE(ring) >> 1) - 1))) in cas_intme()
2704 struct cas_tx_desc *txd = cp->init_txds[ring] + entry; in cas_write_txd()
2711 txd->control = cpu_to_le64(ctrl); in cas_write_txd()
2712 txd->buffer = cpu_to_le64(mapping); in cas_write_txd()
2718 return cp->tx_tiny_bufs[ring] + TX_TINY_BUF_LEN*entry; in tx_tiny_buf()
2724 cp->tx_tiny_use[ring][tentry].nbufs++; in tx_tiny_map()
2725 cp->tx_tiny_use[ring][entry].used = 1; in tx_tiny_map()
2726 return cp->tx_tiny_dvma[ring] + TX_TINY_BUF_LEN*entry; in tx_tiny_map()
2732 struct net_device *dev = cp->dev; in cas_xmit_tx_ringN()
2739 spin_lock_irqsave(&cp->tx_lock[ring], flags); in cas_xmit_tx_ringN()
2743 CAS_TABORT(cp)*(skb_shinfo(skb)->nr_frags + 1)) { in cas_xmit_tx_ringN()
2745 spin_unlock_irqrestore(&cp->tx_lock[ring], flags); in cas_xmit_tx_ringN()
2751 if (skb->ip_summed == CHECKSUM_PARTIAL) { in cas_xmit_tx_ringN()
2753 const u64 csum_stuff_off = csum_start_off + skb->csum_offset; in cas_xmit_tx_ringN()
2760 entry = cp->tx_new[ring]; in cas_xmit_tx_ringN()
2761 cp->tx_skbs[ring][entry] = skb; in cas_xmit_tx_ringN()
2763 nr_frags = skb_shinfo(skb)->nr_frags; in cas_xmit_tx_ringN()
2765 mapping = dma_map_page(&cp->pdev->dev, virt_to_page(skb->data), in cas_xmit_tx_ringN()
2766 offset_in_page(skb->data), len, DMA_TO_DEVICE); in cas_xmit_tx_ringN()
2769 tabort = cas_calc_tabort(cp, (unsigned long) skb->data, len); in cas_xmit_tx_ringN()
2772 cas_write_txd(cp, ring, entry, mapping, len - tabort, in cas_xmit_tx_ringN()
2776 skb_copy_from_linear_data_offset(skb, len - tabort, in cas_xmit_tx_ringN()
2788 const skb_frag_t *fragp = &skb_shinfo(skb)->frags[frag]; in cas_xmit_tx_ringN()
2791 mapping = skb_frag_dma_map(&cp->pdev->dev, fragp, 0, len, in cas_xmit_tx_ringN()
2799 cas_write_txd(cp, ring, entry, mapping, len - tabort, in cas_xmit_tx_ringN()
2805 addr + skb_frag_off(fragp) + len - tabort, in cas_xmit_tx_ringN()
2817 cp->tx_new[ring] = entry; in cas_xmit_tx_ringN()
2823 ring, entry, skb->len, TX_BUFFS_AVAIL(cp, ring)); in cas_xmit_tx_ringN()
2824 writel(entry, cp->regs + REG_TX_KICKN(ring)); in cas_xmit_tx_ringN()
2825 spin_unlock_irqrestore(&cp->tx_lock[ring], flags); in cas_xmit_tx_ringN()
2833 /* this is only used as a load-balancing hint, so it doesn't in cas_start_xmit()
2838 if (skb_padto(skb, cp->min_frame_size)) in cas_start_xmit()
2841 /* XXX: we need some higher-level QoS hooks to steer packets to in cas_start_xmit()
2851 u64 desc_dma = cp->block_dvma; in cas_init_tx_dma()
2856 /* set up tx completion writeback registers. must be 8-byte aligned */ in cas_init_tx_dma()
2859 writel((desc_dma + off) >> 32, cp->regs + REG_TX_COMPWB_DB_HI); in cas_init_tx_dma()
2860 writel((desc_dma + off) & 0xffffffff, cp->regs + REG_TX_COMPWB_DB_LOW); in cas_init_tx_dma()
2864 * disable read pipe, and disable pre-interrupt compwbs in cas_init_tx_dma()
2873 off = (unsigned long) cp->init_txds[i] - in cas_init_tx_dma()
2874 (unsigned long) cp->init_block; in cas_init_tx_dma()
2877 writel((desc_dma + off) >> 32, cp->regs + REG_TX_DBN_HI(i)); in cas_init_tx_dma()
2878 writel((desc_dma + off) & 0xffffffff, cp->regs + in cas_init_tx_dma()
2884 writel(val, cp->regs + REG_TX_CFG); in cas_init_tx_dma()
2890 writel(0x800, cp->regs + REG_TX_MAXBURST_0); in cas_init_tx_dma()
2891 writel(0x1600, cp->regs + REG_TX_MAXBURST_1); in cas_init_tx_dma()
2892 writel(0x2400, cp->regs + REG_TX_MAXBURST_2); in cas_init_tx_dma()
2893 writel(0x4800, cp->regs + REG_TX_MAXBURST_3); in cas_init_tx_dma()
2895 writel(0x800, cp->regs + REG_TX_MAXBURST_0); in cas_init_tx_dma()
2896 writel(0x800, cp->regs + REG_TX_MAXBURST_1); in cas_init_tx_dma()
2897 writel(0x800, cp->regs + REG_TX_MAXBURST_2); in cas_init_tx_dma()
2898 writel(0x800, cp->regs + REG_TX_MAXBURST_3); in cas_init_tx_dma()
2902 /* Must be invoked under cp->lock. */
2917 netdev_for_each_mc_addr(ha, cp->dev) { in cas_process_mc_list()
2922 writel((ha->addr[4] << 8) | ha->addr[5], in cas_process_mc_list()
2923 cp->regs + REG_MAC_ADDRN(i*3 + 0)); in cas_process_mc_list()
2924 writel((ha->addr[2] << 8) | ha->addr[3], in cas_process_mc_list()
2925 cp->regs + REG_MAC_ADDRN(i*3 + 1)); in cas_process_mc_list()
2926 writel((ha->addr[0] << 8) | ha->addr[1], in cas_process_mc_list()
2927 cp->regs + REG_MAC_ADDRN(i*3 + 2)); in cas_process_mc_list()
2934 crc = ether_crc_le(ETH_ALEN, ha->addr); in cas_process_mc_list()
2936 hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf)); in cas_process_mc_list()
2940 writel(hash_table[i], cp->regs + REG_MAC_HASH_TABLEN(i)); in cas_process_mc_list()
2943 /* Must be invoked under cp->lock. */
2949 if (cp->dev->flags & IFF_PROMISC) { in cas_setup_multicast()
2952 } else if (cp->dev->flags & IFF_ALLMULTI) { in cas_setup_multicast()
2954 writel(0xFFFF, cp->regs + REG_MAC_HASH_TABLEN(i)); in cas_setup_multicast()
2965 /* must be invoked under cp->stat_lock[N_TX_RINGS] */
2968 writel(0, cp->regs + REG_MAC_COLL_NORMAL); in cas_clear_mac_err()
2969 writel(0, cp->regs + REG_MAC_COLL_FIRST); in cas_clear_mac_err()
2970 writel(0, cp->regs + REG_MAC_COLL_EXCESS); in cas_clear_mac_err()
2971 writel(0, cp->regs + REG_MAC_COLL_LATE); in cas_clear_mac_err()
2972 writel(0, cp->regs + REG_MAC_TIMER_DEFER); in cas_clear_mac_err()
2973 writel(0, cp->regs + REG_MAC_ATTEMPTS_PEAK); in cas_clear_mac_err()
2974 writel(0, cp->regs + REG_MAC_RECV_FRAME); in cas_clear_mac_err()
2975 writel(0, cp->regs + REG_MAC_LEN_ERR); in cas_clear_mac_err()
2976 writel(0, cp->regs + REG_MAC_ALIGN_ERR); in cas_clear_mac_err()
2977 writel(0, cp->regs + REG_MAC_FCS_ERR); in cas_clear_mac_err()
2978 writel(0, cp->regs + REG_MAC_RX_CODE_ERR); in cas_clear_mac_err()
2987 writel(0x1, cp->regs + REG_MAC_TX_RESET); in cas_mac_reset()
2988 writel(0x1, cp->regs + REG_MAC_RX_RESET); in cas_mac_reset()
2992 while (i-- > 0) { in cas_mac_reset()
2993 if (readl(cp->regs + REG_MAC_TX_RESET) == 0) in cas_mac_reset()
3000 while (i-- > 0) { in cas_mac_reset()
3001 if (readl(cp->regs + REG_MAC_RX_RESET) == 0) in cas_mac_reset()
3006 if (readl(cp->regs + REG_MAC_TX_RESET) | in cas_mac_reset()
3007 readl(cp->regs + REG_MAC_RX_RESET)) in cas_mac_reset()
3008 netdev_err(cp->dev, "mac tx[%d]/rx[%d] reset failed [%08x]\n", in cas_mac_reset()
3009 readl(cp->regs + REG_MAC_TX_RESET), in cas_mac_reset()
3010 readl(cp->regs + REG_MAC_RX_RESET), in cas_mac_reset()
3011 readl(cp->regs + REG_MAC_STATE_MACHINE)); in cas_mac_reset()
3015 /* Must be invoked under cp->lock. */
3018 const unsigned char *e = &cp->dev->dev_addr[0]; in cas_init_mac()
3023 writel(CAWR_RR_DIS, cp->regs + REG_CAWR); in cas_init_mac()
3029 if ((cp->cas_flags & CAS_FLAG_TARGET_ABORT) == 0) in cas_init_mac()
3030 writel(INF_BURST_EN, cp->regs + REG_INF_BURST); in cas_init_mac()
3033 writel(0x1BF0, cp->regs + REG_MAC_SEND_PAUSE); in cas_init_mac()
3035 writel(0x00, cp->regs + REG_MAC_IPG0); in cas_init_mac()
3036 writel(0x08, cp->regs + REG_MAC_IPG1); in cas_init_mac()
3037 writel(0x04, cp->regs + REG_MAC_IPG2); in cas_init_mac()
3040 writel(0x40, cp->regs + REG_MAC_SLOT_TIME); in cas_init_mac()
3043 writel(ETH_ZLEN + 4, cp->regs + REG_MAC_FRAMESIZE_MIN); in cas_init_mac()
3052 cp->regs + REG_MAC_FRAMESIZE_MAX); in cas_init_mac()
3054 /* NOTE: crc_size is used as a surrogate for half-duplex. in cas_init_mac()
3055 * workaround saturn half-duplex issue by increasing preamble in cas_init_mac()
3058 if ((cp->cas_flags & CAS_FLAG_SATURN) && cp->crc_size) in cas_init_mac()
3059 writel(0x41, cp->regs + REG_MAC_PA_SIZE); in cas_init_mac()
3061 writel(0x07, cp->regs + REG_MAC_PA_SIZE); in cas_init_mac()
3062 writel(0x04, cp->regs + REG_MAC_JAM_SIZE); in cas_init_mac()
3063 writel(0x10, cp->regs + REG_MAC_ATTEMPT_LIMIT); in cas_init_mac()
3064 writel(0x8808, cp->regs + REG_MAC_CTRL_TYPE); in cas_init_mac()
3066 writel((e[5] | (e[4] << 8)) & 0x3ff, cp->regs + REG_MAC_RANDOM_SEED); in cas_init_mac()
3068 writel(0, cp->regs + REG_MAC_ADDR_FILTER0); in cas_init_mac()
3069 writel(0, cp->regs + REG_MAC_ADDR_FILTER1); in cas_init_mac()
3070 writel(0, cp->regs + REG_MAC_ADDR_FILTER2); in cas_init_mac()
3071 writel(0, cp->regs + REG_MAC_ADDR_FILTER2_1_MASK); in cas_init_mac()
3072 writel(0, cp->regs + REG_MAC_ADDR_FILTER0_MASK); in cas_init_mac()
3076 writel(0x0, cp->regs + REG_MAC_ADDRN(i)); in cas_init_mac()
3078 writel((e[4] << 8) | e[5], cp->regs + REG_MAC_ADDRN(0)); in cas_init_mac()
3079 writel((e[2] << 8) | e[3], cp->regs + REG_MAC_ADDRN(1)); in cas_init_mac()
3080 writel((e[0] << 8) | e[1], cp->regs + REG_MAC_ADDRN(2)); in cas_init_mac()
3082 writel(0x0001, cp->regs + REG_MAC_ADDRN(42)); in cas_init_mac()
3083 writel(0xc200, cp->regs + REG_MAC_ADDRN(43)); in cas_init_mac()
3084 writel(0x0180, cp->regs + REG_MAC_ADDRN(44)); in cas_init_mac()
3086 cp->mac_rx_cfg = cas_setup_multicast(cp); in cas_init_mac()
3088 spin_lock(&cp->stat_lock[N_TX_RINGS]); in cas_init_mac()
3090 spin_unlock(&cp->stat_lock[N_TX_RINGS]); in cas_init_mac()
3096 writel(MAC_TX_FRAME_XMIT, cp->regs + REG_MAC_TX_MASK); in cas_init_mac()
3097 writel(MAC_RX_FRAME_RECV, cp->regs + REG_MAC_RX_MASK); in cas_init_mac()
3102 writel(0xffffffff, cp->regs + REG_MAC_CTRL_MASK); in cas_init_mac()
3105 /* Must be invoked under cp->lock. */
3111 if (cp->rx_fifo_size <= (2 * 1024)) { in cas_init_pause_thresholds()
3112 cp->rx_pause_off = cp->rx_pause_on = cp->rx_fifo_size; in cas_init_pause_thresholds()
3114 int max_frame = (cp->dev->mtu + ETH_HLEN + 4 + 4 + 64) & ~63; in cas_init_pause_thresholds()
3115 if (max_frame * 3 > cp->rx_fifo_size) { in cas_init_pause_thresholds()
3116 cp->rx_pause_off = 7104; in cas_init_pause_thresholds()
3117 cp->rx_pause_on = 960; in cas_init_pause_thresholds()
3119 int off = (cp->rx_fifo_size - (max_frame * 2)); in cas_init_pause_thresholds()
3120 int on = off - max_frame; in cas_init_pause_thresholds()
3121 cp->rx_pause_off = off; in cas_init_pause_thresholds()
3122 cp->rx_pause_on = on; in cas_init_pause_thresholds()
3143 * 1) vpd info has order-dependent mac addresses for multinic cards
3154 void __iomem *p = cp->regs + REG_EXPANSION_ROM_RUN_START; in cas_get_vpd_info()
3170 cp->regs + REG_BIM_LOCAL_DEV_EN); in cas_get_vpd_info()
3204 while ((p - kstart) < len) { in cas_get_vpd_info()
3212 * -- correct length == 29 in cas_get_vpd_info()
3214 * 18 (strlen("local-mac-address") + 1) + in cas_get_vpd_info()
3216 * -- VPD Instance 'I' in cas_get_vpd_info()
3217 * -- VPD Type Bytes 'B' in cas_get_vpd_info()
3218 * -- VPD data length == 6 in cas_get_vpd_info()
3219 * -- property string == local-mac-address in cas_get_vpd_info()
3221 * -- correct length == 24 in cas_get_vpd_info()
3223 * 12 (strlen("entropy-dev") + 1) + in cas_get_vpd_info()
3225 * -- VPD Instance 'I' in cas_get_vpd_info()
3226 * -- VPD Type String 'B' in cas_get_vpd_info()
3227 * -- VPD data length == 7 in cas_get_vpd_info()
3228 * -- property string == entropy-dev in cas_get_vpd_info()
3230 * -- correct length == 18 in cas_get_vpd_info()
3232 * 9 (strlen("phy-type") + 1) + in cas_get_vpd_info()
3234 * -- VPD Instance 'I' in cas_get_vpd_info()
3235 * -- VPD Type String 'S' in cas_get_vpd_info()
3236 * -- VPD data length == 4 in cas_get_vpd_info()
3237 * -- property string == phy-type in cas_get_vpd_info()
3239 * -- correct length == 23 in cas_get_vpd_info()
3241 * 14 (strlen("phy-interface") + 1) + in cas_get_vpd_info()
3243 * -- VPD Instance 'I' in cas_get_vpd_info()
3244 * -- VPD Type String 'S' in cas_get_vpd_info()
3245 * -- VPD data length == 4 in cas_get_vpd_info()
3246 * -- property string == phy-interface in cas_get_vpd_info()
3256 "local-mac-address")) { in cas_get_vpd_info()
3273 cas_vpd_match(p + 5, "entropy-dev") && in cas_get_vpd_info()
3275 cp->cas_flags |= CAS_FLAG_ENTROPY_DEV; in cas_get_vpd_info()
3284 cas_vpd_match(p + 5, "phy-type")) { in cas_get_vpd_info()
3292 cas_vpd_match(p + 5, "phy-interface")) { in cas_get_vpd_info()
3316 addr = of_get_property(cp->of_node, "local-mac-address", NULL); in cas_get_vpd_info()
3331 writel(0, cp->regs + REG_BIM_LOCAL_DEV_EN); in cas_get_vpd_info()
3338 struct pci_dev *pdev = cp->pdev; in cas_check_pci_invariants()
3340 cp->cas_flags = 0; in cas_check_pci_invariants()
3341 if ((pdev->vendor == PCI_VENDOR_ID_SUN) && in cas_check_pci_invariants()
3342 (pdev->device == PCI_DEVICE_ID_SUN_CASSINI)) { in cas_check_pci_invariants()
3343 if (pdev->revision >= CAS_ID_REVPLUS) in cas_check_pci_invariants()
3344 cp->cas_flags |= CAS_FLAG_REG_PLUS; in cas_check_pci_invariants()
3345 if (pdev->revision < CAS_ID_REVPLUS02u) in cas_check_pci_invariants()
3346 cp->cas_flags |= CAS_FLAG_TARGET_ABORT; in cas_check_pci_invariants()
3351 if (pdev->revision < CAS_ID_REV2) in cas_check_pci_invariants()
3352 cp->cas_flags |= CAS_FLAG_NO_HW_CSUM; in cas_check_pci_invariants()
3355 cp->cas_flags |= CAS_FLAG_REG_PLUS; in cas_check_pci_invariants()
3360 if ((pdev->vendor == PCI_VENDOR_ID_NS) && in cas_check_pci_invariants()
3361 (pdev->device == PCI_DEVICE_ID_NS_SATURN)) in cas_check_pci_invariants()
3362 cp->cas_flags |= CAS_FLAG_SATURN; in cas_check_pci_invariants()
3369 struct pci_dev *pdev = cp->pdev; in cas_check_invariants()
3375 cp->page_order = 0; in cas_check_invariants()
3380 CAS_JUMBO_PAGE_SHIFT - in cas_check_invariants()
3383 __free_pages(page, CAS_JUMBO_PAGE_SHIFT - PAGE_SHIFT); in cas_check_invariants()
3384 cp->page_order = CAS_JUMBO_PAGE_SHIFT - PAGE_SHIFT; in cas_check_invariants()
3390 cp->page_size = (PAGE_SIZE << cp->page_order); in cas_check_invariants()
3393 cp->tx_fifo_size = readl(cp->regs + REG_TX_FIFO_SIZE) * 64; in cas_check_invariants()
3394 cp->rx_fifo_size = RX_FIFO_SIZE; in cas_check_invariants()
3399 cp->phy_type = cas_get_vpd_info(cp, addr, PCI_SLOT(pdev->devfn)); in cas_check_invariants()
3400 eth_hw_addr_set(cp->dev, addr); in cas_check_invariants()
3401 if (cp->phy_type & CAS_PHY_SERDES) { in cas_check_invariants()
3402 cp->cas_flags |= CAS_FLAG_1000MB_CAP; in cas_check_invariants()
3407 cfg = readl(cp->regs + REG_MIF_CFG); in cas_check_invariants()
3409 cp->phy_type = CAS_PHY_MII_MDIO1; in cas_check_invariants()
3411 cp->phy_type = CAS_PHY_MII_MDIO0; in cas_check_invariants()
3415 writel(PCS_DATAPATH_MODE_MII, cp->regs + REG_PCS_DATAPATH_MODE); in cas_check_invariants()
3422 cp->phy_addr = i; in cas_check_invariants()
3426 cp->phy_id = phy_id; in cas_check_invariants()
3432 readl(cp->regs + REG_MIF_STATE_MACHINE)); in cas_check_invariants()
3433 return -1; in cas_check_invariants()
3440 cp->cas_flags |= CAS_FLAG_1000MB_CAP; in cas_check_invariants()
3444 /* Must be invoked under cp->lock. */
3452 val = readl(cp->regs + REG_TX_CFG) | TX_CFG_DMA_EN; in cas_start_dma()
3453 writel(val, cp->regs + REG_TX_CFG); in cas_start_dma()
3454 val = readl(cp->regs + REG_RX_CFG) | RX_CFG_DMA_EN; in cas_start_dma()
3455 writel(val, cp->regs + REG_RX_CFG); in cas_start_dma()
3458 val = readl(cp->regs + REG_MAC_TX_CFG) | MAC_TX_CFG_EN; in cas_start_dma()
3459 writel(val, cp->regs + REG_MAC_TX_CFG); in cas_start_dma()
3460 val = readl(cp->regs + REG_MAC_RX_CFG) | MAC_RX_CFG_EN; in cas_start_dma()
3461 writel(val, cp->regs + REG_MAC_RX_CFG); in cas_start_dma()
3464 while (i-- > 0) { in cas_start_dma()
3465 val = readl(cp->regs + REG_MAC_TX_CFG); in cas_start_dma()
3472 while (i-- > 0) { in cas_start_dma()
3473 val = readl(cp->regs + REG_MAC_RX_CFG); in cas_start_dma()
3476 netdev_err(cp->dev, in cas_start_dma()
3478 readl(cp->regs + REG_MIF_STATE_MACHINE), in cas_start_dma()
3479 readl(cp->regs + REG_MAC_STATE_MACHINE)); in cas_start_dma()
3485 netdev_err(cp->dev, "enabling mac failed [%s:%08x:%08x]\n", in cas_start_dma()
3487 readl(cp->regs + REG_MIF_STATE_MACHINE), in cas_start_dma()
3488 readl(cp->regs + REG_MAC_STATE_MACHINE)); in cas_start_dma()
3492 writel(RX_DESC_RINGN_SIZE(0) - 4, cp->regs + REG_RX_KICK); in cas_start_dma()
3493 writel(0, cp->regs + REG_RX_COMP_TAIL); in cas_start_dma()
3495 if (cp->cas_flags & CAS_FLAG_REG_PLUS) { in cas_start_dma()
3497 writel(RX_DESC_RINGN_SIZE(1) - 4, in cas_start_dma()
3498 cp->regs + REG_PLUS_RX_KICK1); in cas_start_dma()
3502 /* Must be invoked under cp->lock. */
3506 u32 val = readl(cp->regs + REG_PCS_MII_LPA); in cas_read_pcs_link_mode()
3514 /* Must be invoked under cp->lock. */
3537 if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { in cas_read_mii_link_mode()
3546 /* A link-up condition has occurred, initialize and enable the
3549 * Must be invoked under cp->lock.
3560 if (CAS_PHY_MII(cp->phy_type)) { in cas_set_link_modes()
3573 speed = (cp->cas_flags & CAS_FLAG_1000MB_CAP) ? in cas_set_link_modes()
3579 val = readl(cp->regs + REG_PCS_MII_CTRL); in cas_set_link_modes()
3587 netif_info(cp, link, cp->dev, "Link up at %d Mbps, %s-duplex\n", in cas_set_link_modes()
3591 if (CAS_PHY_MII(cp->phy_type)) { in cas_set_link_modes()
3600 writel(val, cp->regs + REG_MAC_XIF_CFG); in cas_set_link_modes()
3615 /* If gigabit and half-duplex, enable carrier extension in cas_set_link_modes()
3622 cp->regs + REG_MAC_TX_CFG); in cas_set_link_modes()
3624 val = readl(cp->regs + REG_MAC_RX_CFG); in cas_set_link_modes()
3627 cp->regs + REG_MAC_RX_CFG); in cas_set_link_modes()
3629 writel(0x200, cp->regs + REG_MAC_SLOT_TIME); in cas_set_link_modes()
3631 cp->crc_size = 4; in cas_set_link_modes()
3633 cp->min_frame_size = CAS_1000MB_MIN_FRAME; in cas_set_link_modes()
3636 writel(val, cp->regs + REG_MAC_TX_CFG); in cas_set_link_modes()
3639 * half-duplex mode in cas_set_link_modes()
3641 val = readl(cp->regs + REG_MAC_RX_CFG); in cas_set_link_modes()
3644 cp->crc_size = 0; in cas_set_link_modes()
3645 cp->min_frame_size = CAS_MIN_MTU; in cas_set_link_modes()
3648 cp->crc_size = 4; in cas_set_link_modes()
3649 cp->min_frame_size = CAS_MIN_FRAME; in cas_set_link_modes()
3652 cp->regs + REG_MAC_RX_CFG); in cas_set_link_modes()
3653 writel(0x40, cp->regs + REG_MAC_SLOT_TIME); in cas_set_link_modes()
3658 netdev_info(cp->dev, "Pause is enabled (rxfifo: %d off: %d on: %d)\n", in cas_set_link_modes()
3659 cp->rx_fifo_size, in cas_set_link_modes()
3660 cp->rx_pause_off, in cas_set_link_modes()
3661 cp->rx_pause_on); in cas_set_link_modes()
3663 netdev_info(cp->dev, "TX pause enabled\n"); in cas_set_link_modes()
3665 netdev_info(cp->dev, "Pause is disabled\n"); in cas_set_link_modes()
3669 val = readl(cp->regs + REG_MAC_CTRL_CFG); in cas_set_link_modes()
3677 writel(val, cp->regs + REG_MAC_CTRL_CFG); in cas_set_link_modes()
3681 /* Must be invoked under cp->lock. */
3693 cp->timer_ticks = 0; in cas_init_hw()
3695 } else if (cp->lstate == link_up) { in cas_init_hw()
3697 netif_carrier_on(cp->dev); in cas_init_hw()
3701 /* Must be invoked under cp->lock. on earlier cassini boards,
3707 writel(BIM_LOCAL_DEV_SOFT_0, cp->regs + REG_BIM_LOCAL_DEV_EN); in cas_hard_reset()
3709 pci_restore_state(cp->pdev); in cas_hard_reset()
3718 if (blkflag && !CAS_PHY_MII(cp->phy_type)) { in cas_global_reset()
3726 cp->regs + REG_SW_RESET); in cas_global_reset()
3728 writel(SW_RESET_TX | SW_RESET_RX, cp->regs + REG_SW_RESET); in cas_global_reset()
3735 while (limit-- > 0) { in cas_global_reset()
3736 u32 val = readl(cp->regs + REG_SW_RESET); in cas_global_reset()
3741 netdev_err(cp->dev, "sw reset failed\n"); in cas_global_reset()
3746 BIM_CFG_RTA_INTR_ENABLE, cp->regs + REG_BIM_CFG); in cas_global_reset()
3754 PCI_ERR_BIM_DMA_READ), cp->regs + in cas_global_reset()
3760 writel(PCS_DATAPATH_MODE_MII, cp->regs + REG_PCS_DATAPATH_MODE); in cas_global_reset()
3773 val = readl(cp->regs + REG_TX_CFG); in cas_reset()
3775 writel(val, cp->regs + REG_TX_CFG); in cas_reset()
3777 val = readl(cp->regs + REG_RX_CFG); in cas_reset()
3779 writel(val, cp->regs + REG_RX_CFG); in cas_reset()
3782 if ((cp->cas_flags & CAS_FLAG_TARGET_ABORT) || in cas_reset()
3790 spin_lock(&cp->stat_lock[N_TX_RINGS]); in cas_reset()
3792 spin_unlock(&cp->stat_lock[N_TX_RINGS]); in cas_reset()
3800 /* Make us not-running to avoid timers respawning */ in cas_shutdown()
3801 cp->hw_running = 0; in cas_shutdown()
3803 del_timer_sync(&cp->link_timer); in cas_shutdown()
3807 while (atomic_read(&cp->reset_task_pending_mtu) || in cas_shutdown()
3808 atomic_read(&cp->reset_task_pending_spare) || in cas_shutdown()
3809 atomic_read(&cp->reset_task_pending_all)) in cas_shutdown()
3813 while (atomic_read(&cp->reset_task_pending)) in cas_shutdown()
3819 if (cp->cas_flags & CAS_FLAG_SATURN) in cas_shutdown()
3828 dev->mtu = new_mtu; in cas_change_mtu()
3834 atomic_inc(&cp->reset_task_pending); in cas_change_mtu()
3835 if ((cp->phy_type & CAS_PHY_SERDES)) { in cas_change_mtu()
3836 atomic_inc(&cp->reset_task_pending_all); in cas_change_mtu()
3838 atomic_inc(&cp->reset_task_pending_mtu); in cas_change_mtu()
3840 schedule_work(&cp->reset_task); in cas_change_mtu()
3842 atomic_set(&cp->reset_task_pending, (cp->phy_type & CAS_PHY_SERDES) ? in cas_change_mtu()
3845 schedule_work(&cp->reset_task); in cas_change_mtu()
3848 flush_work(&cp->reset_task); in cas_change_mtu()
3854 struct cas_tx_desc *txd = cp->init_txds[ring]; in cas_clean_txd()
3855 struct sk_buff *skb, **skbs = cp->tx_skbs[ring]; in cas_clean_txd()
3869 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) { in cas_clean_txd()
3870 int ent = i & (size - 1); in cas_clean_txd()
3878 dma_unmap_page(&cp->pdev->dev, daddr, dlen, in cas_clean_txd()
3881 if (frag != skb_shinfo(skb)->nr_frags) { in cas_clean_txd()
3887 ent = i & (size - 1); in cas_clean_txd()
3888 if (cp->tx_tiny_use[ring][ent].used) in cas_clean_txd()
3896 memset(cp->tx_tiny_use[ring], 0, size*sizeof(*cp->tx_tiny_use[ring])); in cas_clean_txd()
3902 cas_page_t **page = cp->rx_pages[ring]; in cas_free_rx_desc()
3922 /* Must be invoked under cp->lock. */
3928 memset(cp->tx_old, 0, sizeof(*cp->tx_old)*N_TX_RINGS); in cas_clean_rings()
3929 memset(cp->tx_new, 0, sizeof(*cp->tx_new)*N_TX_RINGS); in cas_clean_rings()
3934 memset(cp->init_block, 0, sizeof(struct cas_init_block)); in cas_clean_rings()
3942 cas_page_t **page = cp->rx_pages[ring]; in cas_alloc_rx_desc()
3948 return -1; in cas_alloc_rx_desc()
3960 return -1; in cas_alloc_rxds()
3970 int pending = atomic_read(&cp->reset_task_pending); in cas_reset_task()
3972 int pending_all = atomic_read(&cp->reset_task_pending_all); in cas_reset_task()
3973 int pending_spare = atomic_read(&cp->reset_task_pending_spare); in cas_reset_task()
3974 int pending_mtu = atomic_read(&cp->reset_task_pending_mtu); in cas_reset_task()
3980 atomic_dec(&cp->reset_task_pending); in cas_reset_task()
3988 if (cp->hw_running) { in cas_reset_task()
3992 netif_device_detach(cp->dev); in cas_reset_task()
3995 if (cp->opened) { in cas_reset_task()
4019 if (cp->opened) in cas_reset_task()
4024 if (cp->opened) in cas_reset_task()
4031 netif_device_attach(cp->dev); in cas_reset_task()
4034 atomic_sub(pending_all, &cp->reset_task_pending_all); in cas_reset_task()
4035 atomic_sub(pending_spare, &cp->reset_task_pending_spare); in cas_reset_task()
4036 atomic_sub(pending_mtu, &cp->reset_task_pending_mtu); in cas_reset_task()
4037 atomic_dec(&cp->reset_task_pending); in cas_reset_task()
4039 atomic_set(&cp->reset_task_pending, 0); in cas_reset_task()
4050 cp->link_transition_jiffies_valid && in cas_link_timer()
4051 time_is_before_jiffies(cp->link_transition_jiffies + in cas_link_timer()
4053 /* One-second counter so link-down workaround doesn't in cas_link_timer()
4057 cp->link_transition_jiffies_valid = 0; in cas_link_timer()
4060 if (!cp->hw_running) in cas_link_timer()
4063 spin_lock_irqsave(&cp->lock, flags); in cas_link_timer()
4071 if (atomic_read(&cp->reset_task_pending_all) || in cas_link_timer()
4072 atomic_read(&cp->reset_task_pending_spare) || in cas_link_timer()
4073 atomic_read(&cp->reset_task_pending_mtu)) in cas_link_timer()
4076 if (atomic_read(&cp->reset_task_pending)) in cas_link_timer()
4081 if ((mask = (cp->cas_flags & CAS_FLAG_RXD_POST_MASK))) { in cas_link_timer()
4090 if (cas_post_rxds_ringN(cp, i, cp->rx_last[i]) < 0) { in cas_link_timer()
4094 cp->cas_flags &= ~rmask; in cas_link_timer()
4098 if (CAS_PHY_MII(cp->phy_type)) { in cas_link_timer()
4109 readl(cp->regs + REG_MIF_STATUS); /* avoid dups */ in cas_link_timer()
4119 if ((readl(cp->regs + REG_MAC_TX_STATUS) & MAC_TX_FRAME_XMIT) == 0) { in cas_link_timer()
4120 u32 val = readl(cp->regs + REG_MAC_STATE_MACHINE); in cas_link_timer()
4126 netif_printk(cp, tx_err, KERN_DEBUG, cp->dev, in cas_link_timer()
4132 val = readl(cp->regs + REG_TX_FIFO_PKT_CNT); in cas_link_timer()
4133 wptr = readl(cp->regs + REG_TX_FIFO_WRITE_PTR); in cas_link_timer()
4134 rptr = readl(cp->regs + REG_TX_FIFO_READ_PTR); in cas_link_timer()
4136 netif_printk(cp, tx_err, KERN_DEBUG, cp->dev, in cas_link_timer()
4149 atomic_inc(&cp->reset_task_pending); in cas_link_timer()
4150 atomic_inc(&cp->reset_task_pending_all); in cas_link_timer()
4151 schedule_work(&cp->reset_task); in cas_link_timer()
4153 atomic_set(&cp->reset_task_pending, CAS_RESET_ALL); in cas_link_timer()
4155 schedule_work(&cp->reset_task); in cas_link_timer()
4160 mod_timer(&cp->link_timer, jiffies + CAS_LINK_TIMEOUT); in cas_link_timer()
4162 spin_unlock_irqrestore(&cp->lock, flags); in cas_link_timer()
4170 struct pci_dev *pdev = cp->pdev; in cas_tx_tiny_free()
4174 if (!cp->tx_tiny_bufs[i]) in cas_tx_tiny_free()
4177 dma_free_coherent(&pdev->dev, TX_TINY_BUF_BLOCK, in cas_tx_tiny_free()
4178 cp->tx_tiny_bufs[i], cp->tx_tiny_dvma[i]); in cas_tx_tiny_free()
4179 cp->tx_tiny_bufs[i] = NULL; in cas_tx_tiny_free()
4185 struct pci_dev *pdev = cp->pdev; in cas_tx_tiny_alloc()
4189 cp->tx_tiny_bufs[i] = in cas_tx_tiny_alloc()
4190 dma_alloc_coherent(&pdev->dev, TX_TINY_BUF_BLOCK, in cas_tx_tiny_alloc()
4191 &cp->tx_tiny_dvma[i], GFP_KERNEL); in cas_tx_tiny_alloc()
4192 if (!cp->tx_tiny_bufs[i]) { in cas_tx_tiny_alloc()
4194 return -1; in cas_tx_tiny_alloc()
4207 mutex_lock(&cp->pm_mutex); in cas_open()
4209 hw_was_up = cp->hw_running; in cas_open()
4211 /* The power-management mutex protects the hw_running in cas_open()
4212 * etc. state so it is safe to do this bit without cp->lock in cas_open()
4214 if (!cp->hw_running) { in cas_open()
4219 * argument set to non-zero, which will force in cas_open()
4223 cp->hw_running = 1; in cas_open()
4227 err = -ENOMEM; in cas_open()
4244 if (request_irq(cp->pdev->irq, cas_interrupt, in cas_open()
4245 IRQF_SHARED, dev->name, (void *) dev)) { in cas_open()
4246 netdev_err(cp->dev, "failed to request irq !\n"); in cas_open()
4247 err = -EAGAIN; in cas_open()
4252 napi_enable(&cp->napi); in cas_open()
4258 cp->opened = 1; in cas_open()
4262 mutex_unlock(&cp->pm_mutex); in cas_open()
4271 mutex_unlock(&cp->pm_mutex); in cas_open()
4281 napi_disable(&cp->napi); in cas_close()
4284 mutex_lock(&cp->pm_mutex); in cas_close()
4290 cp->opened = 0; in cas_close()
4297 free_irq(cp->pdev->irq, (void *) dev); in cas_close()
4301 mutex_unlock(&cp->pm_mutex); in cas_close()
4330 {-MII_BMSR},
4331 {-MII_BMCR},
4358 spin_lock_irqsave(&cp->lock, flags); in cas_read_regs()
4364 -ethtool_register_table[i].offsets); in cas_read_regs()
4367 val= readl(cp->regs+ethtool_register_table[i].offsets); in cas_read_regs()
4371 spin_unlock_irqrestore(&cp->lock, flags); in cas_read_regs()
4377 struct net_device_stats *stats = cp->net_stats; in cas_get_stats()
4383 if (!cp->hw_running) in cas_get_stats()
4388 * stored in 32-bit words. Added a mask of 0xffff to be safe, in cas_get_stats()
4394 spin_lock_irqsave(&cp->stat_lock[N_TX_RINGS], flags); in cas_get_stats()
4396 readl(cp->regs + REG_MAC_FCS_ERR) & 0xffff; in cas_get_stats()
4398 readl(cp->regs + REG_MAC_ALIGN_ERR) &0xffff; in cas_get_stats()
4400 readl(cp->regs + REG_MAC_LEN_ERR) & 0xffff; in cas_get_stats()
4402 tmp = (readl(cp->regs + REG_MAC_COLL_EXCESS) & 0xffff) + in cas_get_stats()
4403 (readl(cp->regs + REG_MAC_COLL_LATE) & 0xffff); in cas_get_stats()
4406 tmp + (readl(cp->regs + REG_MAC_COLL_NORMAL) & 0xffff); in cas_get_stats()
4409 readl(cp->regs + REG_MAC_COLL_EXCESS); in cas_get_stats()
4410 stats[N_TX_RINGS].collisions += readl(cp->regs + REG_MAC_COLL_EXCESS) + in cas_get_stats()
4411 readl(cp->regs + REG_MAC_COLL_LATE); in cas_get_stats()
4416 spin_lock(&cp->stat_lock[0]); in cas_get_stats()
4423 spin_unlock(&cp->stat_lock[0]); in cas_get_stats()
4426 spin_lock(&cp->stat_lock[i]); in cas_get_stats()
4439 spin_unlock(&cp->stat_lock[i]); in cas_get_stats()
4441 spin_unlock_irqrestore(&cp->stat_lock[N_TX_RINGS], flags); in cas_get_stats()
4453 if (!cp->hw_running) in cas_set_multicast()
4456 spin_lock_irqsave(&cp->lock, flags); in cas_set_multicast()
4457 rxcfg = readl(cp->regs + REG_MAC_RX_CFG); in cas_set_multicast()
4460 writel(rxcfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG); in cas_set_multicast()
4461 while (readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_EN) { in cas_set_multicast()
4462 if (!limit--) in cas_set_multicast()
4470 writel(rxcfg & ~MAC_RX_CFG_EN, cp->regs + REG_MAC_RX_CFG); in cas_set_multicast()
4471 while (readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_HASH_FILTER_EN) { in cas_set_multicast()
4472 if (!limit--) in cas_set_multicast()
4478 cp->mac_rx_cfg = rxcfg_new = cas_setup_multicast(cp); in cas_set_multicast()
4480 writel(rxcfg, cp->regs + REG_MAC_RX_CFG); in cas_set_multicast()
4481 spin_unlock_irqrestore(&cp->lock, flags); in cas_set_multicast()
4487 strscpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); in cas_get_drvinfo()
4488 strscpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); in cas_get_drvinfo()
4489 strscpy(info->bus_info, pci_name(cp->pdev), sizeof(info->bus_info)); in cas_get_drvinfo()
4504 if (cp->cas_flags & CAS_FLAG_1000MB_CAP) { in cas_get_link_ksettings()
4510 spin_lock_irqsave(&cp->lock, flags); in cas_get_link_ksettings()
4512 linkstate = cp->lstate; in cas_get_link_ksettings()
4513 if (CAS_PHY_MII(cp->phy_type)) { in cas_get_link_ksettings()
4514 cmd->base.port = PORT_MII; in cas_get_link_ksettings()
4515 cmd->base.phy_address = cp->phy_addr; in cas_get_link_ksettings()
4529 if (cp->hw_running) { in cas_get_link_ksettings()
4538 cmd->base.port = PORT_FIBRE; in cas_get_link_ksettings()
4539 cmd->base.phy_address = 0; in cas_get_link_ksettings()
4543 if (cp->hw_running) { in cas_get_link_ksettings()
4545 bmcr = readl(cp->regs + REG_PCS_MII_CTRL); in cas_get_link_ksettings()
4550 spin_unlock_irqrestore(&cp->lock, flags); in cas_get_link_ksettings()
4554 cmd->base.autoneg = AUTONEG_ENABLE; in cas_get_link_ksettings()
4555 cmd->base.speed = ((speed == 10) ? in cas_get_link_ksettings()
4559 cmd->base.duplex = full_duplex ? DUPLEX_FULL : DUPLEX_HALF; in cas_get_link_ksettings()
4561 cmd->base.autoneg = AUTONEG_DISABLE; in cas_get_link_ksettings()
4562 cmd->base.speed = ((bmcr & CAS_BMCR_SPEED1000) ? in cas_get_link_ksettings()
4566 cmd->base.duplex = (bmcr & BMCR_FULLDPLX) ? in cas_get_link_ksettings()
4572 * speed to 0, but not cmd->duplex, in cas_get_link_ksettings()
4580 if (cp->link_cntl & BMCR_ANENABLE) { in cas_get_link_ksettings()
4581 cmd->base.speed = 0; in cas_get_link_ksettings()
4582 cmd->base.duplex = 0xff; in cas_get_link_ksettings()
4584 cmd->base.speed = SPEED_10; in cas_get_link_ksettings()
4585 if (cp->link_cntl & BMCR_SPEED100) { in cas_get_link_ksettings()
4586 cmd->base.speed = SPEED_100; in cas_get_link_ksettings()
4587 } else if (cp->link_cntl & CAS_BMCR_SPEED1000) { in cas_get_link_ksettings()
4588 cmd->base.speed = SPEED_1000; in cas_get_link_ksettings()
4590 cmd->base.duplex = (cp->link_cntl & BMCR_FULLDPLX) ? in cas_get_link_ksettings()
4595 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, in cas_get_link_ksettings()
4597 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, in cas_get_link_ksettings()
4608 u32 speed = cmd->base.speed; in cas_set_link_ksettings()
4611 if (cmd->base.autoneg != AUTONEG_ENABLE && in cas_set_link_ksettings()
4612 cmd->base.autoneg != AUTONEG_DISABLE) in cas_set_link_ksettings()
4613 return -EINVAL; in cas_set_link_ksettings()
4615 if (cmd->base.autoneg == AUTONEG_DISABLE && in cas_set_link_ksettings()
4619 (cmd->base.duplex != DUPLEX_HALF && in cas_set_link_ksettings()
4620 cmd->base.duplex != DUPLEX_FULL))) in cas_set_link_ksettings()
4621 return -EINVAL; in cas_set_link_ksettings()
4624 spin_lock_irqsave(&cp->lock, flags); in cas_set_link_ksettings()
4626 spin_unlock_irqrestore(&cp->lock, flags); in cas_set_link_ksettings()
4635 if ((cp->link_cntl & BMCR_ANENABLE) == 0) in cas_nway_reset()
4636 return -EINVAL; in cas_nway_reset()
4639 spin_lock_irqsave(&cp->lock, flags); in cas_nway_reset()
4641 spin_unlock_irqrestore(&cp->lock, flags); in cas_nway_reset()
4649 return cp->lstate == link_up; in cas_get_link()
4655 return cp->msg_enable; in cas_get_msglevel()
4661 cp->msg_enable = value; in cas_set_msglevel()
4667 return min_t(int, cp->casreg_len, CAS_MAX_REGS); in cas_get_regs_len()
4670 static void cas_get_regs(struct net_device *dev, struct ethtool_regs *regs, in cas_get_regs() argument
4674 regs->version = 0; in cas_get_regs()
4675 /* cas_read_regs handles locks (cp->lock). */ in cas_get_regs()
4676 cas_read_regs(cp, p, regs->len / sizeof(u32)); in cas_get_regs()
4685 return -EOPNOTSUPP; in cas_get_sset_count()
4699 struct net_device_stats *stats = cas_get_stats(cp->dev); in cas_get_ethtool_stats()
4701 data[i++] = stats->collisions; in cas_get_ethtool_stats()
4702 data[i++] = stats->rx_bytes; in cas_get_ethtool_stats()
4703 data[i++] = stats->rx_crc_errors; in cas_get_ethtool_stats()
4704 data[i++] = stats->rx_dropped; in cas_get_ethtool_stats()
4705 data[i++] = stats->rx_errors; in cas_get_ethtool_stats()
4706 data[i++] = stats->rx_fifo_errors; in cas_get_ethtool_stats()
4707 data[i++] = stats->rx_frame_errors; in cas_get_ethtool_stats()
4708 data[i++] = stats->rx_length_errors; in cas_get_ethtool_stats()
4709 data[i++] = stats->rx_over_errors; in cas_get_ethtool_stats()
4710 data[i++] = stats->rx_packets; in cas_get_ethtool_stats()
4711 data[i++] = stats->tx_aborted_errors; in cas_get_ethtool_stats()
4712 data[i++] = stats->tx_bytes; in cas_get_ethtool_stats()
4713 data[i++] = stats->tx_dropped; in cas_get_ethtool_stats()
4714 data[i++] = stats->tx_errors; in cas_get_ethtool_stats()
4715 data[i++] = stats->tx_fifo_errors; in cas_get_ethtool_stats()
4716 data[i++] = stats->tx_packets; in cas_get_ethtool_stats()
4740 int rc = -EOPNOTSUPP; in cas_ioctl()
4745 mutex_lock(&cp->pm_mutex); in cas_ioctl()
4748 data->phy_id = cp->phy_addr; in cas_ioctl()
4752 spin_lock_irqsave(&cp->lock, flags); in cas_ioctl()
4754 data->val_out = cas_phy_read(cp, data->reg_num & 0x1f); in cas_ioctl()
4756 spin_unlock_irqrestore(&cp->lock, flags); in cas_ioctl()
4761 spin_lock_irqsave(&cp->lock, flags); in cas_ioctl()
4763 rc = cas_phy_write(cp, data->reg_num & 0x1f, data->val_in); in cas_ioctl()
4765 spin_unlock_irqrestore(&cp->lock, flags); in cas_ioctl()
4771 mutex_unlock(&cp->pm_mutex); in cas_ioctl()
4781 struct pci_dev *pdev = cas_pdev->bus->self; in cas_program_bridge()
4787 if (pdev->vendor != 0x8086 || pdev->device != 0x537c) in cas_program_bridge()
4792 * 0x41. Using a 32-bit word read/modify/write at 0x40 in cas_program_bridge()
4799 /* Max out the Multi-Transaction Timer settings since in cas_program_bridge()
4802 * The register is 16-bit and lives at 0x50. When the in cas_program_bridge()
4810 * 1 -- 16 clocks in cas_program_bridge()
4811 * 2 -- 32 clocks in cas_program_bridge()
4812 * 3 -- 64 clocks in cas_program_bridge()
4813 * 4 -- 128 clocks in cas_program_bridge()
4814 * 5 -- 256 clocks in cas_program_bridge()
4823 /* The Read Prefecth Policy register is 16-bit and sits at in cas_program_bridge()
4824 * offset 0x52. It enables a "smart" pre-fetch policy. We in cas_program_bridge()
4833 * 15:13 --- ReRead Primary Bus in cas_program_bridge()
4834 * 12:10 --- FirstRead Primary Bus in cas_program_bridge()
4835 * 09:07 --- ReRead Secondary Bus in cas_program_bridge()
4836 * 06:04 --- FirstRead Secondary Bus in cas_program_bridge()
4890 dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n"); in cas_init_one()
4895 dev_err(&pdev->dev, "Cannot find proper PCI device " in cas_init_one()
4897 err = -ENODEV; in cas_init_one()
4903 err = -ENOMEM; in cas_init_one()
4906 SET_NETDEV_DEV(dev, &pdev->dev); in cas_init_one()
4908 err = pci_request_regions(pdev, dev->name); in cas_init_one()
4910 dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting\n"); in cas_init_one()
4944 dev_err(&pdev->dev, "Could not set PCI cache " in cas_init_one()
4953 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in cas_init_one()
4955 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); in cas_init_one()
4962 cp->pdev = pdev; in cas_init_one()
4965 cp->orig_cacheline_size = cas_cacheline_size ? orig_cacheline_size: 0; in cas_init_one()
4967 cp->dev = dev; in cas_init_one()
4968 cp->msg_enable = (cassini_debug < 0) ? CAS_DEF_MSG_ENABLE : in cas_init_one()
4972 cp->of_node = pci_device_to_OF_node(pdev); in cas_init_one()
4975 cp->link_transition = LINK_TRANSITION_UNKNOWN; in cas_init_one()
4976 cp->link_transition_jiffies_valid = 0; in cas_init_one()
4978 spin_lock_init(&cp->lock); in cas_init_one()
4979 spin_lock_init(&cp->rx_inuse_lock); in cas_init_one()
4980 spin_lock_init(&cp->rx_spare_lock); in cas_init_one()
4982 spin_lock_init(&cp->stat_lock[i]); in cas_init_one()
4983 spin_lock_init(&cp->tx_lock[i]); in cas_init_one()
4985 spin_lock_init(&cp->stat_lock[N_TX_RINGS]); in cas_init_one()
4986 mutex_init(&cp->pm_mutex); in cas_init_one()
4988 timer_setup(&cp->link_timer, cas_link_timer, 0); in cas_init_one()
4994 atomic_set(&cp->reset_task_pending, 0); in cas_init_one()
4995 atomic_set(&cp->reset_task_pending_all, 0); in cas_init_one()
4996 atomic_set(&cp->reset_task_pending_spare, 0); in cas_init_one()
4997 atomic_set(&cp->reset_task_pending_mtu, 0); in cas_init_one()
4999 INIT_WORK(&cp->reset_task, cas_reset_task); in cas_init_one()
5003 cp->link_cntl = link_modes[link_mode]; in cas_init_one()
5005 cp->link_cntl = BMCR_ANENABLE; in cas_init_one()
5006 cp->lstate = link_down; in cas_init_one()
5007 cp->link_transition = LINK_TRANSITION_LINK_DOWN; in cas_init_one()
5008 netif_carrier_off(cp->dev); in cas_init_one()
5009 cp->timer_ticks = 0; in cas_init_one()
5012 cp->regs = pci_iomap(pdev, 0, casreg_len); in cas_init_one()
5013 if (!cp->regs) { in cas_init_one()
5014 dev_err(&pdev->dev, "Cannot map device registers, aborting\n"); in cas_init_one()
5017 cp->casreg_len = casreg_len; in cas_init_one()
5025 if (cp->cas_flags & CAS_FLAG_SATURN) in cas_init_one()
5028 cp->init_block = in cas_init_one()
5029 dma_alloc_coherent(&pdev->dev, sizeof(struct cas_init_block), in cas_init_one()
5030 &cp->block_dvma, GFP_KERNEL); in cas_init_one()
5031 if (!cp->init_block) { in cas_init_one()
5032 dev_err(&pdev->dev, "Cannot allocate init block, aborting\n"); in cas_init_one()
5037 cp->init_txds[i] = cp->init_block->txds[i]; in cas_init_one()
5040 cp->init_rxds[i] = cp->init_block->rxds[i]; in cas_init_one()
5043 cp->init_rxcs[i] = cp->init_block->rxcs[i]; in cas_init_one()
5046 skb_queue_head_init(&cp->rx_flows[i]); in cas_init_one()
5048 dev->netdev_ops = &cas_netdev_ops; in cas_init_one()
5049 dev->ethtool_ops = &cas_ethtool_ops; in cas_init_one()
5050 dev->watchdog_timeo = CAS_TX_TIMEOUT; in cas_init_one()
5053 netif_napi_add(dev, &cp->napi, cas_poll); in cas_init_one()
5055 dev->irq = pdev->irq; in cas_init_one()
5056 dev->dma = 0; in cas_init_one()
5059 if ((cp->cas_flags & CAS_FLAG_NO_HW_CSUM) == 0) in cas_init_one()
5060 dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG; in cas_init_one()
5062 dev->features |= NETIF_F_HIGHDMA; in cas_init_one()
5064 /* MTU range: 60 - varies or 9000 */ in cas_init_one()
5065 dev->min_mtu = CAS_MIN_MTU; in cas_init_one()
5066 dev->max_mtu = CAS_MAX_MTU; in cas_init_one()
5069 dev_err(&pdev->dev, "Cannot register net device, aborting\n"); in cas_init_one()
5073 i = readl(cp->regs + REG_BIM_CFG); in cas_init_one()
5075 (cp->cas_flags & CAS_FLAG_REG_PLUS) ? "+" : "", in cas_init_one()
5078 (cp->phy_type == CAS_PHY_SERDES) ? "Fi" : "Cu", pdev->irq, in cas_init_one()
5079 dev->dev_addr); in cas_init_one()
5082 cp->hw_running = 1; in cas_init_one()
5089 dma_free_coherent(&pdev->dev, sizeof(struct cas_init_block), in cas_init_one()
5090 cp->init_block, cp->block_dvma); in cas_init_one()
5093 mutex_lock(&cp->pm_mutex); in cas_init_one()
5094 if (cp->hw_running) in cas_init_one()
5096 mutex_unlock(&cp->pm_mutex); in cas_init_one()
5098 pci_iounmap(pdev, cp->regs); in cas_init_one()
5114 return -ENODEV; in cas_init_one()
5127 vfree(cp->fw_data); in cas_remove_one()
5129 mutex_lock(&cp->pm_mutex); in cas_remove_one()
5130 cancel_work_sync(&cp->reset_task); in cas_remove_one()
5131 if (cp->hw_running) in cas_remove_one()
5133 mutex_unlock(&cp->pm_mutex); in cas_remove_one()
5136 if (cp->orig_cacheline_size) { in cas_remove_one()
5141 cp->orig_cacheline_size); in cas_remove_one()
5144 dma_free_coherent(&pdev->dev, sizeof(struct cas_init_block), in cas_remove_one()
5145 cp->init_block, cp->block_dvma); in cas_remove_one()
5146 pci_iounmap(pdev, cp->regs); in cas_remove_one()
5158 mutex_lock(&cp->pm_mutex); in cas_suspend()
5161 if (cp->opened) { in cas_suspend()
5176 if (cp->hw_running) in cas_suspend()
5178 mutex_unlock(&cp->pm_mutex); in cas_suspend()
5190 mutex_lock(&cp->pm_mutex); in cas_resume()
5192 if (cp->opened) { in cas_resume()
5196 cp->hw_running = 1; in cas_resume()
5203 mutex_unlock(&cp->pm_mutex); in cas_resume()