Lines Matching full:csr

24 /* CSR register */
186 u32 csr; member
286 dev_dbg(tdc2dev(tdc), "CSR %x STA %x CSRE %x SRC %x DST %x\n", in tegra_dma_dump_chan_regs()
448 u32 csr, status; in tegra_dma_disable() local
450 csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR); in tegra_dma_disable()
453 csr &= ~TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_disable()
456 csr &= ~TEGRA_GPCDMA_CSR_ENB; in tegra_dma_disable()
457 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr); in tegra_dma_disable()
498 ch_regs->csr | TEGRA_GPCDMA_CSR_ENB); in tegra_dma_configure_next_sg()
530 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, ch_regs->csr); in tegra_dma_start()
534 ch_regs->csr | TEGRA_GPCDMA_CSR_ENB); in tegra_dma_start()
659 u32 status, csr; in tegra_dma_stop_client() local
666 csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR); in tegra_dma_stop_client()
667 csr &= ~(TEGRA_GPCDMA_CSR_REQ_SEL_MASK); in tegra_dma_stop_client()
668 csr |= TEGRA_GPCDMA_CSR_REQ_SEL_UNUSED; in tegra_dma_stop_client()
669 tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr); in tegra_dma_stop_client()
824 u32 *csr, in get_transfer_param() argument
834 *csr = TEGRA_GPCDMA_CSR_DMA_MEM2IO_FC; in get_transfer_param()
841 *csr = TEGRA_GPCDMA_CSR_DMA_IO2MEM_FC; in get_transfer_param()
858 u32 csr, mc_seq; in tegra_dma_prep_dma_memset() local
867 csr = TEGRA_GPCDMA_CSR_DMA_FIXED_PAT; in tegra_dma_prep_dma_memset()
869 csr |= TEGRA_GPCDMA_CSR_ONCE; in tegra_dma_prep_dma_memset()
871 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK; in tegra_dma_prep_dma_memset()
874 csr |= TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_prep_dma_memset()
876 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1); in tegra_dma_prep_dma_memset()
908 sg_req[0].ch_regs.csr = csr; in tegra_dma_prep_dma_memset()
925 u32 csr, mc_seq; in tegra_dma_prep_dma_memcpy() local
935 csr = TEGRA_GPCDMA_CSR_DMA_MEM2MEM; in tegra_dma_prep_dma_memcpy()
937 csr |= TEGRA_GPCDMA_CSR_ONCE; in tegra_dma_prep_dma_memcpy()
939 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK; in tegra_dma_prep_dma_memcpy()
942 csr |= TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_prep_dma_memcpy()
944 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1); in tegra_dma_prep_dma_memcpy()
978 sg_req[0].ch_regs.csr = csr; in tegra_dma_prep_dma_memcpy()
995 u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0; in tegra_dma_prep_slave_sg() local
1016 ret = get_transfer_param(tdc, direction, &apb_ptr, &mmio_seq, &csr, in tegra_dma_prep_slave_sg()
1022 csr |= TEGRA_GPCDMA_CSR_ONCE; in tegra_dma_prep_slave_sg()
1024 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id); in tegra_dma_prep_slave_sg()
1026 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK; in tegra_dma_prep_slave_sg()
1028 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1); in tegra_dma_prep_slave_sg()
1032 csr |= TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_prep_slave_sg()
1097 sg_req[i].ch_regs.csr = csr; in tegra_dma_prep_slave_sg()
1113 u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0, burst_size; in tegra_dma_prep_dma_cyclic() local
1151 ret = get_transfer_param(tdc, direction, &apb_ptr, &mmio_seq, &csr, in tegra_dma_prep_dma_cyclic()
1157 csr &= ~TEGRA_GPCDMA_CSR_ONCE; in tegra_dma_prep_dma_cyclic()
1159 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id); in tegra_dma_prep_dma_cyclic()
1161 csr |= TEGRA_GPCDMA_CSR_IRQ_MASK; in tegra_dma_prep_dma_cyclic()
1163 csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1); in tegra_dma_prep_dma_cyclic()
1167 csr |= TEGRA_GPCDMA_CSR_IE_EOC; in tegra_dma_prep_dma_cyclic()
1218 sg_req[i].ch_regs.csr = csr; in tegra_dma_prep_dma_cyclic()