Lines Matching +full:0 +full:x500
28 #clock-cells = <0>;
35 #clock-cells = <0>;
43 #size-cells = <0>;
45 CPU0: cpu@0 {
48 reg = <0x0 0x0>;
60 reg = <0x0 0x1>;
68 reg = <0x0 0x2>;
76 reg = <0x0 0x3>;
84 reg = <0x0 0x100>;
96 reg = <0x0 0x101>;
104 reg = <0x0 0x102>;
112 reg = <0x0 0x103>;
165 reg = <0 0x80000000 0 0>;
184 reg = <0 0x03400000 0 0x1000>;
189 reg = <0 0x03401000 0 0x2200000>;
194 reg = <0 0x06a00000 0 0x200000>;
199 reg = <0 0x07000000 0 0x5a00000>;
204 reg = <0 0x0ca00000 0 0x1f00000>;
210 reg = <0 0xc6400000 0 0x180000>;
217 reg = <0 0xc6700000 0 0x100000>;
222 reg = <0 0xc7000000 0 0x800000>;
227 reg = <0 0xc9400000 0 0x3f00000>;
236 qcom,ipc = <&apcs 8 0>;
296 qcom,local-pid = <0>;
321 qcom,local-pid = <0>;
341 ranges = <0 0 0 0xffffffff>;
348 reg = <0xf9000000 0x1000>,
349 <0xf9002000 0x1000>;
354 reg = <0xf900d000 0x2000>;
360 reg = <0xf9017000 0x1000>;
372 reg = <0xf9020000 0x1000>;
375 frame-number = <0>;
378 reg = <0xf9021000 0x1000>,
379 <0xf9022000 0x1000>;
385 reg = <0xf9023000 0x1000>;
392 reg = <0xf9024000 0x1000>;
399 reg = <0xf9025000 0x1000>;
406 reg = <0xf9026000 0x1000>;
413 reg = <0xf9027000 0x1000>;
420 reg = <0xf9028000 0x1000>;
427 reg = <0xf92f8800 0x400>;
450 reg = <0xf9200000 0xcc00>;
451 interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
461 reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
474 pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
484 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
497 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
507 reg = <0xf9904000 0x19000>;
512 qcom,ee = <0>;
520 reg = <0xf991e000 0x1000>;
526 pinctrl-0 = <&blsp1_uart2_default>;
533 reg = <0xf9923000 0x500>;
542 pinctrl-0 = <&i2c1_default>;
545 #size-cells = <0>;
551 reg = <0xf9923000 0x500>;
560 pinctrl-0 = <&blsp1_spi1_default>;
563 #size-cells = <0>;
569 reg = <0xf9924000 0x500>;
578 pinctrl-0 = <&i2c2_default>;
581 #size-cells = <0>;
589 reg = <0xf9926000 0x500>;
598 pinctrl-0 = <&i2c4_default>;
601 #size-cells = <0>;
607 reg = <0xf9927000 0x500>;
616 pinctrl-0 = <&i2c5_default>;
619 #size-cells = <0>;
625 reg = <0xf9928000 0x500>;
634 pinctrl-0 = <&i2c6_default>;
637 #size-cells = <0>;
643 reg = <0xf9944000 0x19000>;
648 qcom,ee = <0>;
656 reg = <0xf995e000 0x1000>;
664 pinctrl-0 = <&blsp2_uart2_default>;
671 reg = <0xf9963000 0x500>;
680 pinctrl-0 = <&i2c7_default>;
683 #size-cells = <0>;
689 reg = <0xf9966000 0x500>;
698 pinctrl-0 = <&blsp2_spi10_default>;
701 #size-cells = <0>;
707 reg = <0xf9967000 0x500>;
716 pinctrl-0 = <&i2c11_default>;
719 #size-cells = <0>;
728 reg = <0xfc400000 0x2000>;
736 reg = <0xfc428000 0x4000>;
741 reg = <0xfc4ab000 0x4>;
746 reg = <0xfc4cf000 0x1000>,
747 <0xfc4cb000 0x1000>,
748 <0xfc4ca000 0x1000>;
752 qcom,ee = <0>;
753 qcom,channel = <0>;
755 #size-cells = <0>;
762 reg = <0xfd484000 0x1000>;
768 reg = <0xfd510000 0x4000>;
771 gpio-ranges = <&tlmm 0 0 146>;
1032 reg = <0xfd8c0000 0x5200>;
1050 <0>,
1051 <0>,
1052 <0>,
1053 <0>,
1054 <0>;
1070 reg = <0xfdd00000 0x2000>,
1071 <0xfec00000 0x200000>;
1073 ranges = <0 0xfec00000 0x200000>;
1081 gmu_sram: gmu-sram@0 {
1082 reg = <0x0 0x180000>;
1089 interrupts = <GIC_PPI 2 0xff08>,
1090 <GIC_PPI 3 0xff08>,
1091 <GIC_PPI 4 0xff08>,
1092 <GIC_PPI 1 0xff08>;