Lines Matching +full:0 +full:x0003ffff
45 memblock_add(0xa0000000, SZ_128M); in eseries_fixup()
47 memblock_add(0xa0000000, SZ_64M); in eseries_fixup()
74 gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); in eseries_tmio_enable()
75 gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0); in eseries_tmio_enable()
81 return 0; in eseries_tmio_enable()
86 gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); in eseries_tmio_disable()
87 gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0); in eseries_tmio_disable()
92 gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); in eseries_tmio_suspend()
93 return 0; in eseries_tmio_suspend()
100 return 0; in eseries_tmio_resume()
107 gpio_direction_output(GPIO_ESERIES_TMIO_SUSPEND, 0); in eseries_get_tmio_gpios()
108 gpio_direction_output(GPIO_ESERIES_TMIO_PCLR, 0); in eseries_get_tmio_gpios()
113 [0] = {
115 .end = PXA_CS4_PHYS + 0x1fffff,
128 clk_register_fixed_rate(NULL, "CLK_CK32K", NULL, 0, 32768); in eseries_register_clks()
170 .atag_offset = 0x100,
222 .atag_offset = 0x100,
248 .sync = 0,
255 .lccr3 = 0,
286 .offset = 0,
290 static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
293 .options = 0,
347 .atag_offset = 0x100,
363 .lcd_format = 0x00008023,
364 .lcdd_cntl1 = 0x0f000000,
365 .lcdd_cntl2 = 0x0003ffff,
366 .genlcd_cntl1 = 0x00ffff03,
367 .genlcd_cntl2 = 0x003c0f03,
368 .genlcd_cntl3 = 0x000143aa,
378 .crtc_ss = 0x80140013,
379 .crtc_ls = 0x81150110,
380 .crtc_gs = 0x80050005,
381 .crtc_vpos_gs = 0x000a0009,
382 .crtc_rev = 0x0040010a,
383 .crtc_dclk = 0xa906000a,
384 .crtc_gclk = 0x80050108,
385 .crtc_goe = 0x80050108,
392 .crtc_ps1_active = 0x41060010,
396 .init_data1 = 0x21002103,
397 .gpio_dir1 = 0xffffdeff,
398 .gpio_oe1 = 0x03c00643,
399 .init_data2 = 0x003f003f,
400 .gpio_dir2 = 0xffffffff,
401 .gpio_oe2 = 0x000000ff,
414 [0] = {
415 .start = 0x0c000000,
416 .end = 0x0cffffff,
555 .atag_offset = 0x100,
571 .lcd_format = 0x00008003,
572 .lcdd_cntl1 = 0x00000000,
573 .lcdd_cntl2 = 0x0003ffff,
574 .genlcd_cntl1 = 0x00fff003,
575 .genlcd_cntl2 = 0x003c0f03,
576 .genlcd_cntl3 = 0x000143aa,
586 .crtc_ss = 0x80150014,
587 .crtc_ls = 0x8014000d,
588 .crtc_gs = 0xc1000005,
589 .crtc_vpos_gs = 0x00020147,
590 .crtc_rev = 0x0040010a,
591 .crtc_dclk = 0xa1700030,
592 .crtc_gclk = 0x80cc0015,
593 .crtc_goe = 0x80cc0015,
594 .crtc_ps1_active = 0x61060017,
604 .init_data1 = 0x01192f1b,
605 .gpio_dir1 = 0xd5ffdeff,
606 .gpio_oe1 = 0x000020bf,
607 .init_data2 = 0x010f010f,
608 .gpio_dir2 = 0xffffffff,
609 .gpio_oe2 = 0x000001cf,
622 [0] = {
623 .start = 0x0c000000,
624 .end = 0x0cffffff,
705 .scr_pll2cr = 0x0cc1,
706 .scr_gper = 0,
764 .atag_offset = 0x100,
791 .lcd_format = 0x00008003,
792 .lcdd_cntl1 = 0x02a00000,
793 .lcdd_cntl2 = 0x0003ffff,
794 .genlcd_cntl1 = 0x000ff2a3,
795 .genlcd_cntl2 = 0x000002a3,
796 .genlcd_cntl3 = 0x000102aa,
800 [0] = {
807 .crtc_ss = 0x80350034,
808 .crtc_ls = 0x802b0026,
809 .crtc_gs = 0x80160016,
810 .crtc_vpos_gs = 0x00020003,
811 .crtc_rev = 0x0040001d,
812 .crtc_dclk = 0xe0000000,
813 .crtc_gclk = 0x82a50049,
814 .crtc_goe = 0x80ee001c,
815 .crtc_ps1_active = 0x00000000,
820 .sysclk_divider = 0,
828 .upper_margin = 0,
830 .crtc_ss = 0xd010000f,
831 .crtc_ls = 0x80070003,
832 .crtc_gs = 0x80000000,
833 .crtc_vpos_gs = 0x01460147,
834 .crtc_rev = 0x00400003,
835 .crtc_dclk = 0xa1700030,
836 .crtc_gclk = 0x814b0008,
837 .crtc_goe = 0x80cc0015,
838 .crtc_ps1_active = 0x00000000,
843 .sysclk_divider = 0,
850 .init_data1 = 0xc13fc019,
851 .gpio_dir1 = 0x3e40df7f,
852 .gpio_oe1 = 0x003c3000,
853 .init_data2 = 0x00000000,
854 .gpio_dir2 = 0x00000000,
855 .gpio_oe2 = 0x00000000,
859 .ext_cntl = 0x09640011,
860 .sdram_mode_reg = 0x00600021,
861 .ext_timing_cntl = 0x10001545,
862 .io_cntl = 0x7ddd7333,
863 .size = 0x1fffff,
872 tmp |= 0x100; in e800_tg_change()
874 tmp &= ~0x100; in e800_tg_change()
893 [0] = {
894 .start = 0x0c000000,
895 .end = 0x0cffffff,
933 .scr_pll2cr = 0x0cc1,
934 .scr_gper = 0,
991 .atag_offset = 0x100,