Lines Matching +full:dma +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
34 cpu-release-addr = <0 0x4000c204>;
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 compatible = "fixed-clock";
47 clock-frequency = <40000000>;
51 #clock-cells = <0>;
52 compatible = "fixed-clock";
53 clock-frequency = <0>;
57 #clock-cells = <0>;
58 compatible = "fixed-clock";
59 clock-frequency = <0>;
63 compatible = "simple-bus";
64 #address-cells = <1>;
65 #size-cells = <1>;
66 interrupt-parent = <&gic>;
70 compatible = "renesas,r9a06g032-rtc", "renesas,rzn1-rtc";
75 interrupt-names = "alarm", "timer", "pps";
77 clock-names = "hclk";
78 power-domains = <&sysctrl>;
83 compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
91 compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
98 sysctrl: system-controller@4000c000 {
99 compatible = "renesas,r9a06g032-sysctrl";
102 #clock-cells = <1>;
103 #power-domain-cells = <0>;
107 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
108 #address-cells = <1>;
109 #size-cells = <1>;
111 dmamux: dma-router@a0 {
112 compatible = "renesas,rzn1-dmamux";
114 #dma-cells = <6>;
115 dma-requests = <32>;
116 dma-masters = <&dma0 &dma1>;
121 compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
126 clock-names = "hclkh", "hclkpm", "pciclk";
127 power-domains = <&sysctrl>;
133 bus-range = <0 0>;
134 #address-cells = <3>;
135 #size-cells = <2>;
136 #interrupt-cells = <1>;
140 * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit)
142 dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>;
143 interrupt-map-mask = <0xf800 0 0 0x7>;
144 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
151 phy-names = "usb";
157 phy-names = "usb";
162 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
165 reg-shift = <2>;
166 reg-io-width = <4>;
168 clock-names = "baudclk", "apb_pclk";
173 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
176 reg-shift = <2>;
177 reg-io-width = <4>;
179 clock-names = "baudclk", "apb_pclk";
184 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
187 reg-shift = <2>;
188 reg-io-width = <4>;
190 clock-names = "baudclk", "apb_pclk";
195 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
198 reg-shift = <2>;
199 reg-io-width = <4>;
201 clock-names = "baudclk", "apb_pclk";
203 dma-names = "rx", "tx";
208 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
211 reg-shift = <2>;
212 reg-io-width = <4>;
214 clock-names = "baudclk", "apb_pclk";
216 dma-names = "rx", "tx";
221 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
224 reg-shift = <2>;
225 reg-io-width = <4>;
227 clock-names = "baudclk", "apb_pclk";
229 dma-names = "rx", "tx";
234 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
237 reg-shift = <2>;
238 reg-io-width = <4>;
240 clock-names = "baudclk", "apb_pclk";
242 dma-names = "rx", "tx";
247 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart";
250 reg-shift = <2>;
251 reg-io-width = <4>;
253 clock-names = "baudclk", "apb_pclk";
255 dma-names = "rx", "tx";
260 compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
263 clock-names = "bus";
267 nand_controller: nand-controller@40102000 {
268 compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
272 clock-names = "hclk", "eclk";
273 power-domains = <&sysctrl>;
274 #address-cells = <1>;
275 #size-cells = <0>;
279 dma0: dma-controller@40104000 {
280 compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
283 clock-names = "hclk";
285 dma-channels = <8>;
286 dma-requests = <16>;
287 dma-masters = <1>;
288 #dma-cells = <3>;
290 data-width = <8>;
293 dma1: dma-controller@40105000 {
294 compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
297 clock-names = "hclk";
299 dma-channels = <8>;
300 dma-requests = <16>;
301 dma-masters = <1>;
302 #dma-cells = <3>;
304 data-width = <8>;
308 compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
310 interrupt-parent = <&gic>;
314 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
316 clock-names = "stmmaceth";
317 power-domains = <&sysctrl>;
318 snps,multicast-filter-bins = <256>;
319 snps,perfect-filter-entries = <128>;
320 tx-fifo-depth = <2048>;
321 rx-fifo-depth = <4096>;
325 eth_miic: eth-miic@44030000 {
326 compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
327 #address-cells = <1>;
328 #size-cells = <0>;
334 clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
335 power-domains = <&sysctrl>;
338 mii_conv1: mii-conv@1 {
343 mii_conv2: mii-conv@2 {
348 mii_conv3: mii-conv@3 {
353 mii_conv4: mii-conv@4 {
358 mii_conv5: mii-conv@5 {
365 compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw";
369 clock-names = "hclk", "clk";
370 power-domains = <&sysctrl>;
373 ethernet-ports {
374 #address-cells = <1>;
375 #size-cells = <0>;
379 pcs-handle = <&mii_conv5>;
385 pcs-handle = <&mii_conv4>;
391 pcs-handle = <&mii_conv3>;
397 pcs-handle = <&mii_conv2>;
405 phy-mode = "internal";
407 fixed-link {
409 full-duplex;
415 gic: interrupt-controller@44101000 {
416 compatible = "arm,gic-400", "arm,cortex-a7-gic";
417 interrupt-controller;
418 #interrupt-cells = <3>;
428 compatible = "renesas,r9a06g032-sja1000","renesas,rzn1-sja1000";
430 reg-io-width = <4>;
433 power-domains = <&sysctrl>;
438 compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
440 reg-io-width = <4>;
443 power-domains = <&sysctrl>;
449 compatible = "arm,armv7-timer";
450 interrupt-parent = <&gic>;
451 arm,cpu-registers-not-fw-configured;
452 always-on;
460 usbphy: usb-phy {
461 #phy-cells = <0>;
462 compatible = "usb-nop-xceiv";