33 static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)  in rcar_du_crtc_read()  argument
35 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_read()
37 	return rcar_du_read(rcdu, rcrtc->mmio_offset + reg);  in rcar_du_crtc_read()
40 static void rcar_du_crtc_write(struct rcar_du_crtc *rcrtc, u32 reg, u32 data)  in rcar_du_crtc_write()  argument
42 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_write()
44 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data);  in rcar_du_crtc_write()
47 static void rcar_du_crtc_clr(struct rcar_du_crtc *rcrtc, u32 reg, u32 clr)  in rcar_du_crtc_clr()  argument
49 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_clr()
51 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg,  in rcar_du_crtc_clr()
52 		      rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr);  in rcar_du_crtc_clr()
55 static void rcar_du_crtc_set(struct rcar_du_crtc *rcrtc, u32 reg, u32 set)  in rcar_du_crtc_set()  argument
57 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_set()
59 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg,  in rcar_du_crtc_set()
60 		      rcar_du_read(rcdu, rcrtc->mmio_offset + reg) | set);  in rcar_du_crtc_set()
63 void rcar_du_crtc_dsysr_clr_set(struct rcar_du_crtc *rcrtc, u32 clr, u32 set)  in rcar_du_crtc_dsysr_clr_set()  argument
65 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_dsysr_clr_set()
67 	rcrtc->dsysr = (rcrtc->dsysr & ~clr) | set;  in rcar_du_crtc_dsysr_clr_set()
68 	rcar_du_write(rcdu, rcrtc->mmio_offset + DSYSR, rcrtc->dsysr);  in rcar_du_crtc_dsysr_clr_set()
82 static void rcar_du_dpll_divider(struct rcar_du_crtc *rcrtc,  in rcar_du_dpll_divider()  argument
160 	dev_dbg(rcrtc->dev->dev,  in rcar_du_dpll_divider()
211 static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_set_display_timing()  argument
213 	const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode;  in rcar_du_crtc_set_display_timing()
214 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_set_display_timing()
219 	if (rcdu->info->dpll_mask & (1 << rcrtc->index)) {  in rcar_du_crtc_set_display_timing()
244 		extclk = clk_get_rate(rcrtc->extclock);  in rcar_du_crtc_set_display_timing()
245 		rcar_du_dpll_divider(rcrtc, &dpll, extclk, target);  in rcar_du_crtc_set_display_timing()
252 		if (rcrtc->index == 1)  in rcar_du_crtc_set_display_timing()
259 		rcar_du_group_write(rcrtc->group, DPLLCR, dpllcr);  in rcar_du_crtc_set_display_timing()
262 	} else if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index)) {  in rcar_du_crtc_set_display_timing()
273 		rcar_du_escr_divider(rcrtc->clock, mode_clock,  in rcar_du_crtc_set_display_timing()
275 		if (rcrtc->extclock)  in rcar_du_crtc_set_display_timing()
276 			rcar_du_escr_divider(rcrtc->extclock, mode_clock,  in rcar_du_crtc_set_display_timing()
279 		dev_dbg(rcrtc->dev->dev, "mode clock %lu %s rate %lu\n",  in rcar_du_crtc_set_display_timing()
280 			mode_clock, params.clk == rcrtc->clock ? "cpg" : "ext",  in rcar_du_crtc_set_display_timing()
287 	dev_dbg(rcrtc->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr);  in rcar_du_crtc_set_display_timing()
289 	rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? ESCR13 : ESCR02, escr);  in rcar_du_crtc_set_display_timing()
290 	rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0);  in rcar_du_crtc_set_display_timing()
297 	rcar_du_crtc_write(rcrtc, DSMR, dsmr);  in rcar_du_crtc_set_display_timing()
300 	rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19);  in rcar_du_crtc_set_display_timing()
301 	rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start +  in rcar_du_crtc_set_display_timing()
303 	rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end -  in rcar_du_crtc_set_display_timing()
305 	rcar_du_crtc_write(rcrtc, HCR,  mode->htotal - 1);  in rcar_du_crtc_set_display_timing()
307 	rcar_du_crtc_write(rcrtc, VDSR, mode->crtc_vtotal -  in rcar_du_crtc_set_display_timing()
309 	rcar_du_crtc_write(rcrtc, VDER, mode->crtc_vtotal -  in rcar_du_crtc_set_display_timing()
312 	rcar_du_crtc_write(rcrtc, VSPR, mode->crtc_vtotal -  in rcar_du_crtc_set_display_timing()
315 	rcar_du_crtc_write(rcrtc, VCR,  mode->crtc_vtotal - 1);  in rcar_du_crtc_set_display_timing()
317 	rcar_du_crtc_write(rcrtc, DESR,  mode->htotal - mode->hsync_start - 1);  in rcar_du_crtc_set_display_timing()
318 	rcar_du_crtc_write(rcrtc, DEWR,  mode->hdisplay);  in rcar_du_crtc_set_display_timing()
332 static void rcar_du_crtc_update_planes(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_update_planes()  argument
335 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_update_planes()
343 	for (i = 0; i < rcrtc->group->num_planes; ++i) {  in rcar_du_crtc_update_planes()
344 		struct rcar_du_plane *plane = &rcrtc->group->planes[i];  in rcar_du_crtc_update_planes()
347 		if (plane->plane.state->crtc != &rcrtc->crtc ||  in rcar_du_crtc_update_planes()
383 			dspr = (rcrtc->index % 2) + 1;  in rcar_du_crtc_update_planes()
384 			hwplanes = 1 << (rcrtc->index % 2);  in rcar_du_crtc_update_planes()
386 			dspr = (rcrtc->index % 2) ? 3 : 1;  in rcar_du_crtc_update_planes()
387 			hwplanes = 1 << ((rcrtc->index % 2) ? 2 : 0);  in rcar_du_crtc_update_planes()
400 	mutex_lock(&rcrtc->group->lock);  in rcar_du_crtc_update_planes()
402 	dptsr_planes = rcrtc->index % 2 ? rcrtc->group->dptsr_planes | hwplanes  in rcar_du_crtc_update_planes()
403 		     : rcrtc->group->dptsr_planes & ~hwplanes;  in rcar_du_crtc_update_planes()
405 	if (dptsr_planes != rcrtc->group->dptsr_planes) {  in rcar_du_crtc_update_planes()
406 		rcar_du_group_write(rcrtc->group, DPTSR,  in rcar_du_crtc_update_planes()
408 		rcrtc->group->dptsr_planes = dptsr_planes;  in rcar_du_crtc_update_planes()
410 		if (rcrtc->group->used_crtcs)  in rcar_du_crtc_update_planes()
411 			rcar_du_group_restart(rcrtc->group);  in rcar_du_crtc_update_planes()
415 	if (rcrtc->group->need_restart)  in rcar_du_crtc_update_planes()
416 		rcar_du_group_restart(rcrtc->group);  in rcar_du_crtc_update_planes()
418 	mutex_unlock(&rcrtc->group->lock);  in rcar_du_crtc_update_planes()
420 	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR,  in rcar_du_crtc_update_planes()
428 void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_finish_page_flip()  argument
431 	struct drm_device *dev = rcrtc->crtc.dev;  in rcar_du_crtc_finish_page_flip()
435 	event = rcrtc->event;  in rcar_du_crtc_finish_page_flip()
436 	rcrtc->event = NULL;  in rcar_du_crtc_finish_page_flip()
443 	drm_crtc_send_vblank_event(&rcrtc->crtc, event);  in rcar_du_crtc_finish_page_flip()
444 	wake_up(&rcrtc->flip_wait);  in rcar_du_crtc_finish_page_flip()
447 	drm_crtc_vblank_put(&rcrtc->crtc);  in rcar_du_crtc_finish_page_flip()
450 static bool rcar_du_crtc_page_flip_pending(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_page_flip_pending()  argument
452 	struct drm_device *dev = rcrtc->crtc.dev;  in rcar_du_crtc_page_flip_pending()
457 	pending = rcrtc->event != NULL;  in rcar_du_crtc_page_flip_pending()
463 static void rcar_du_crtc_wait_page_flip(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_wait_page_flip()  argument
465 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_wait_page_flip()
467 	if (wait_event_timeout(rcrtc->flip_wait,  in rcar_du_crtc_wait_page_flip()
468 			       !rcar_du_crtc_page_flip_pending(rcrtc),  in rcar_du_crtc_wait_page_flip()
474 	rcar_du_crtc_finish_page_flip(rcrtc);  in rcar_du_crtc_wait_page_flip()
481 static void rcar_du_crtc_setup(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_setup()  argument
484 	rcar_du_crtc_write(rcrtc, DOOR, DOOR_RGB(0, 0, 0));  in rcar_du_crtc_setup()
485 	rcar_du_crtc_write(rcrtc, BPOR, BPOR_RGB(0, 0, 0));  in rcar_du_crtc_setup()
488 	rcar_du_crtc_set_display_timing(rcrtc);  in rcar_du_crtc_setup()
489 	rcar_du_group_set_routing(rcrtc->group);  in rcar_du_crtc_setup()
492 	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);  in rcar_du_crtc_setup()
495 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))  in rcar_du_crtc_setup()
496 		rcar_du_vsp_enable(rcrtc);  in rcar_du_crtc_setup()
499 	drm_crtc_vblank_on(&rcrtc->crtc);  in rcar_du_crtc_setup()
502 static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_get()  argument
510 	if (rcrtc->initialized)  in rcar_du_crtc_get()
513 	ret = clk_prepare_enable(rcrtc->clock);  in rcar_du_crtc_get()
517 	ret = clk_prepare_enable(rcrtc->extclock);  in rcar_du_crtc_get()
521 	ret = rcar_du_group_get(rcrtc->group);  in rcar_du_crtc_get()
525 	rcar_du_crtc_setup(rcrtc);  in rcar_du_crtc_get()
526 	rcrtc->initialized = true;  in rcar_du_crtc_get()
531 	clk_disable_unprepare(rcrtc->extclock);  in rcar_du_crtc_get()
533 	clk_disable_unprepare(rcrtc->clock);  in rcar_du_crtc_get()
537 static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_put()  argument
539 	rcar_du_group_put(rcrtc->group);  in rcar_du_crtc_put()
541 	clk_disable_unprepare(rcrtc->extclock);  in rcar_du_crtc_put()
542 	clk_disable_unprepare(rcrtc->clock);  in rcar_du_crtc_put()
544 	rcrtc->initialized = false;  in rcar_du_crtc_put()
547 static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_start()  argument
556 	interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE;  in rcar_du_crtc_start()
557 	rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK | DSYSR_SCM_MASK,  in rcar_du_crtc_start()
561 	rcar_du_group_start_stop(rcrtc->group, true);  in rcar_du_crtc_start()
564 static void rcar_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_disable_planes()  argument
566 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_disable_planes()
567 	struct drm_crtc *crtc = &rcrtc->crtc;  in rcar_du_crtc_disable_planes()
580 	spin_lock_irq(&rcrtc->vblank_lock);  in rcar_du_crtc_disable_planes()
581 	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);  in rcar_du_crtc_disable_planes()
582 	status = rcar_du_crtc_read(rcrtc, DSSR);  in rcar_du_crtc_disable_planes()
583 	rcrtc->vblank_count = status & DSSR_VBK ? 2 : 1;  in rcar_du_crtc_disable_planes()
584 	spin_unlock_irq(&rcrtc->vblank_lock);  in rcar_du_crtc_disable_planes()
586 	if (!wait_event_timeout(rcrtc->vblank_wait, rcrtc->vblank_count == 0,  in rcar_du_crtc_disable_planes()
593 static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_stop()  argument
595 	struct drm_crtc *crtc = &rcrtc->crtc;  in rcar_du_crtc_stop()
608 	rcar_du_crtc_disable_planes(rcrtc);  in rcar_du_crtc_stop()
615 	rcar_du_crtc_wait_page_flip(rcrtc);  in rcar_du_crtc_stop()
619 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))  in rcar_du_crtc_stop()
620 		rcar_du_vsp_disable(rcrtc);  in rcar_du_crtc_stop()
629 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_TVM_SYNC))  in rcar_du_crtc_stop()
630 		rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK,  in rcar_du_crtc_stop()
633 	rcar_du_group_start_stop(rcrtc->group, false);  in rcar_du_crtc_stop()
666 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_atomic_enable()  local
668 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_atomic_enable()
670 	rcar_du_crtc_get(rcrtc);  in rcar_du_crtc_atomic_enable()
677 	if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) &&  in rcar_du_crtc_atomic_enable()
680 			rcdu->encoders[RCAR_DU_OUTPUT_LVDS0 + rcrtc->index];  in rcar_du_crtc_atomic_enable()
688 	rcar_du_crtc_start(rcrtc);  in rcar_du_crtc_atomic_enable()
694 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_atomic_disable()  local
696 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_atomic_disable()
698 	rcar_du_crtc_stop(rcrtc);  in rcar_du_crtc_atomic_disable()
699 	rcar_du_crtc_put(rcrtc);  in rcar_du_crtc_atomic_disable()
701 	if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) &&  in rcar_du_crtc_atomic_disable()
704 			rcdu->encoders[RCAR_DU_OUTPUT_LVDS0 + rcrtc->index];  in rcar_du_crtc_atomic_disable()
724 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_atomic_begin()  local
740 	rcar_du_crtc_get(rcrtc);  in rcar_du_crtc_atomic_begin()
742 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))  in rcar_du_crtc_atomic_begin()
743 		rcar_du_vsp_atomic_begin(rcrtc);  in rcar_du_crtc_atomic_begin()
749 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_atomic_flush()  local
750 	struct drm_device *dev = rcrtc->crtc.dev;  in rcar_du_crtc_atomic_flush()
753 	rcar_du_crtc_update_planes(rcrtc);  in rcar_du_crtc_atomic_flush()
759 		rcrtc->event = crtc->state->event;  in rcar_du_crtc_atomic_flush()
764 	if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))  in rcar_du_crtc_atomic_flush()
765 		rcar_du_vsp_atomic_flush(rcrtc);  in rcar_du_crtc_atomic_flush()
772 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_mode_valid()  local
773 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_mode_valid()
803 static void rcar_du_crtc_crc_init(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_crc_init()  argument
805 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_crc_init()
815 	count = rcrtc->vsp->num_planes + 1;  in rcar_du_crtc_crc_init()
825 	for (i = 0; i < rcrtc->vsp->num_planes; ++i) {  in rcar_du_crtc_crc_init()
826 		struct drm_plane *plane = &rcrtc->vsp->planes[i].plane;  in rcar_du_crtc_crc_init()
835 	rcrtc->sources = sources;  in rcar_du_crtc_crc_init()
836 	rcrtc->sources_count = count;  in rcar_du_crtc_crc_init()
847 static void rcar_du_crtc_crc_cleanup(struct rcar_du_crtc *rcrtc)  in rcar_du_crtc_crc_cleanup()  argument
851 	if (!rcrtc->sources)  in rcar_du_crtc_crc_cleanup()
854 	for (i = 0; i < rcrtc->sources_count; i++)  in rcar_du_crtc_crc_cleanup()
855 		kfree(rcrtc->sources[i]);  in rcar_du_crtc_crc_cleanup()
856 	kfree(rcrtc->sources);  in rcar_du_crtc_crc_cleanup()
858 	rcrtc->sources = NULL;  in rcar_du_crtc_crc_cleanup()
859 	rcrtc->sources_count = 0;  in rcar_du_crtc_crc_cleanup()
890 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_cleanup()  local
892 	rcar_du_crtc_crc_cleanup(rcrtc);  in rcar_du_crtc_cleanup()
919 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_enable_vblank()  local
921 	rcar_du_crtc_write(rcrtc, DSRCR, DSRCR_VBCL);  in rcar_du_crtc_enable_vblank()
922 	rcar_du_crtc_set(rcrtc, DIER, DIER_VBE);  in rcar_du_crtc_enable_vblank()
923 	rcrtc->vblank_enable = true;  in rcar_du_crtc_enable_vblank()
930 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_disable_vblank()  local
932 	rcar_du_crtc_clr(rcrtc, DIER, DIER_VBE);  in rcar_du_crtc_disable_vblank()
933 	rcrtc->vblank_enable = false;  in rcar_du_crtc_disable_vblank()
936 static int rcar_du_crtc_parse_crc_source(struct rcar_du_crtc *rcrtc,  in rcar_du_crtc_parse_crc_source()  argument
964 		for (i = 0; i < rcrtc->vsp->num_planes; ++i) {  in rcar_du_crtc_parse_crc_source()
965 			if (index == rcrtc->vsp->planes[i].plane.base.id)  in rcar_du_crtc_parse_crc_source()
977 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_verify_crc_source()  local
980 	if (rcar_du_crtc_parse_crc_source(rcrtc, source_name, &source) < 0) {  in rcar_du_crtc_verify_crc_source()
992 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_get_crc_sources()  local
994 	*count = rcrtc->sources_count;  in rcar_du_crtc_get_crc_sources()
995 	return rcrtc->sources;  in rcar_du_crtc_get_crc_sources()
1001 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);  in rcar_du_crtc_set_crc_source()  local
1009 	ret = rcar_du_crtc_parse_crc_source(rcrtc, source_name, &source);  in rcar_du_crtc_set_crc_source()
1086 	struct rcar_du_crtc *rcrtc = arg;  in rcar_du_crtc_irq()  local
1087 	struct rcar_du_device *rcdu = rcrtc->dev;  in rcar_du_crtc_irq()
1091 	spin_lock(&rcrtc->vblank_lock);  in rcar_du_crtc_irq()
1093 	status = rcar_du_crtc_read(rcrtc, DSSR);  in rcar_du_crtc_irq()
1094 	rcar_du_crtc_write(rcrtc, DSRCR, status & DSRCR_MASK);  in rcar_du_crtc_irq()
1102 		if (rcrtc->vblank_count) {  in rcar_du_crtc_irq()
1103 			if (--rcrtc->vblank_count == 0)  in rcar_du_crtc_irq()
1104 				wake_up(&rcrtc->vblank_wait);  in rcar_du_crtc_irq()
1108 	spin_unlock(&rcrtc->vblank_lock);  in rcar_du_crtc_irq()
1112 			drm_crtc_handle_vblank(&rcrtc->crtc);  in rcar_du_crtc_irq()
1113 			rcar_du_crtc_finish_page_flip(rcrtc);  in rcar_du_crtc_irq()
1135 	struct rcar_du_crtc *rcrtc = &rcdu->crtcs[swindex];  in rcar_du_crtc_create()  local
1136 	struct drm_crtc *crtc = &rcrtc->crtc;  in rcar_du_crtc_create()
1153 	rcrtc->clock = devm_clk_get(rcdu->dev, name);  in rcar_du_crtc_create()
1154 	if (IS_ERR(rcrtc->clock)) {  in rcar_du_crtc_create()
1156 		return PTR_ERR(rcrtc->clock);  in rcar_du_crtc_create()
1162 		rcrtc->extclock = clk;  in rcar_du_crtc_create()
1175 	init_waitqueue_head(&rcrtc->flip_wait);  in rcar_du_crtc_create()
1176 	init_waitqueue_head(&rcrtc->vblank_wait);  in rcar_du_crtc_create()
1177 	spin_lock_init(&rcrtc->vblank_lock);  in rcar_du_crtc_create()
1179 	rcrtc->dev = rcdu;  in rcar_du_crtc_create()
1180 	rcrtc->group = rgrp;  in rcar_du_crtc_create()
1181 	rcrtc->mmio_offset = mmio_offsets[hwindex];  in rcar_du_crtc_create()
1182 	rcrtc->index = hwindex;  in rcar_du_crtc_create()
1183 	rcrtc->dsysr = (rcrtc->index % 2 ? 0 : DSYSR_DRES) | DSYSR_TVM_TVSYNC;  in rcar_du_crtc_create()
1186 		primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane;  in rcar_du_crtc_create()
1218 			       dev_name(rcdu->dev), rcrtc);  in rcar_du_crtc_create()
1225 	rcar_du_crtc_crc_init(rcrtc);  in rcar_du_crtc_create()