Lines Matching refs:gcc
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
790 gcc: clock-controller@100000 { label
791 compatible = "qcom,gcc-msm8998";
876 clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
877 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
878 <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
879 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
880 <&gcc GCC_PCIE_0_AUX_CLK>;
883 power-domains = <&gcc PCIE_0_GDSC>;
895 clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
896 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
897 <&gcc GCC_PCIE_CLKREF_CLK>;
900 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
910 clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
924 power-domains = <&gcc UFS_GDSC>;
937 <&gcc GCC_UFS_AXI_CLK>,
938 <&gcc GCC_AGGRE1_UFS_AXI_CLK>,
939 <&gcc GCC_UFS_AHB_CLK>,
940 <&gcc GCC_UFS_UNIPRO_CORE_CLK>,
942 <&gcc GCC_UFS_TX_SYMBOL_0_CLK>,
943 <&gcc GCC_UFS_RX_SYMBOL_0_CLK>,
944 <&gcc GCC_UFS_RX_SYMBOL_1_CLK>;
955 resets = <&gcc GCC_UFS_BCR>;
970 <&gcc GCC_UFS_CLKREF_CLK>,
971 <&gcc GCC_UFS_PHY_AUX_CLK>;
1463 clocks = <&gcc GCC_CFG_NOC_USB3_AXI_CLK>,
1464 <&gcc GCC_USB30_MASTER_CLK>,
1465 <&gcc GCC_AGGRE1_USB3_AXI_CLK>,
1466 <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1467 <&gcc GCC_USB30_SLEEP_CLK>;
1471 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1472 <&gcc GCC_USB30_MASTER_CLK>;
1479 power-domains = <&gcc USB_30_GDSC>;
1481 resets = <&gcc GCC_USB_30_BCR>;
1505 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
1506 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1507 <&gcc GCC_USB3_CLKREF_CLK>;
1510 resets = <&gcc GCC_USB3_PHY_BCR>,
1511 <&gcc GCC_USB3PHY_PHY_BCR>;
1521 clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
1533 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1534 <&gcc GCC_RX1_USB2_CLKREF_CLK>;
1537 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
1552 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
1553 <&gcc GCC_SDCC2_APPS_CLK>,
1564 clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
1565 <&gcc GCC_BLSP1_AHB_CLK>;
1579 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
1580 <&gcc GCC_BLSP1_AHB_CLK>;
1594 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
1595 <&gcc GCC_BLSP1_AHB_CLK>;
1609 clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
1610 <&gcc GCC_BLSP1_AHB_CLK>;
1624 clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
1625 <&gcc GCC_BLSP1_AHB_CLK>;
1639 clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
1640 <&gcc GCC_BLSP1_AHB_CLK>;
1653 clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>,
1654 <&gcc GCC_BLSP2_AHB_CLK>;
1664 clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
1665 <&gcc GCC_BLSP2_AHB_CLK>;
1679 clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,
1680 <&gcc GCC_BLSP2_AHB_CLK>;
1694 clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>,
1695 <&gcc GCC_BLSP2_AHB_CLK>;
1709 clocks = <&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>,
1710 <&gcc GCC_BLSP2_AHB_CLK>;
1724 clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>,
1725 <&gcc GCC_BLSP2_AHB_CLK>;
1739 clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
1740 <&gcc GCC_BLSP2_AHB_CLK>;