Lines Matching +full:interrupt +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
55 compatible = "arm,cortex-a15";
58 clock-names = "cpu";
59 operating-points-v2 = <&cpu0_opp_table>;
60 #cooling-cells = <2>; /* min followed by max */
64 compatible = "arm,cortex-a15";
67 clock-names = "cpu";
68 operating-points-v2 = <&cpu0_opp_table>;
69 #cooling-cells = <2>; /* min followed by max */
74 compatible = "operating-points-v2";
75 opp-shared;
77 opp-200000000 {
78 opp-hz = /bits/ 64 <200000000>;
79 opp-microvolt = <925000>;
80 clock-latency-ns = <140000>;
82 opp-300000000 {
83 opp-hz = /bits/ 64 <300000000>;
84 opp-microvolt = <937500>;
85 clock-latency-ns = <140000>;
87 opp-400000000 {
88 opp-hz = /bits/ 64 <400000000>;
89 opp-microvolt = <950000>;
90 clock-latency-ns = <140000>;
92 opp-500000000 {
93 opp-hz = /bits/ 64 <500000000>;
94 opp-microvolt = <975000>;
95 clock-latency-ns = <140000>;
97 opp-600000000 {
98 opp-hz = /bits/ 64 <600000000>;
99 opp-microvolt = <1000000>;
100 clock-latency-ns = <140000>;
102 opp-700000000 {
103 opp-hz = /bits/ 64 <700000000>;
104 opp-microvolt = <1012500>;
105 clock-latency-ns = <140000>;
107 opp-800000000 {
108 opp-hz = /bits/ 64 <800000000>;
109 opp-microvolt = <1025000>;
110 clock-latency-ns = <140000>;
112 opp-900000000 {
113 opp-hz = /bits/ 64 <900000000>;
114 opp-microvolt = <1050000>;
115 clock-latency-ns = <140000>;
117 opp-1000000000 {
118 opp-hz = /bits/ 64 <1000000000>;
119 opp-microvolt = <1075000>;
120 clock-latency-ns = <140000>;
121 opp-suspend;
123 opp-1100000000 {
124 opp-hz = /bits/ 64 <1100000000>;
125 opp-microvolt = <1100000>;
126 clock-latency-ns = <140000>;
128 opp-1200000000 {
129 opp-hz = /bits/ 64 <1200000000>;
130 opp-microvolt = <1125000>;
131 clock-latency-ns = <140000>;
133 opp-1300000000 {
134 opp-hz = /bits/ 64 <1300000000>;
135 opp-microvolt = <1150000>;
136 clock-latency-ns = <140000>;
138 opp-1400000000 {
139 opp-hz = /bits/ 64 <1400000000>;
140 opp-microvolt = <1200000>;
141 clock-latency-ns = <140000>;
143 opp-1500000000 {
144 opp-hz = /bits/ 64 <1500000000>;
145 opp-microvolt = <1225000>;
146 clock-latency-ns = <140000>;
148 opp-1600000000 {
149 opp-hz = /bits/ 64 <1600000000>;
150 opp-microvolt = <1250000>;
151 clock-latency-ns = <140000>;
153 opp-1700000000 {
154 opp-hz = /bits/ 64 <1700000000>;
155 opp-microvolt = <1300000>;
156 clock-latency-ns = <140000>;
161 compatible = "arm,cortex-a15-pmu";
162 interrupt-parent = <&combiner>;
168 compatible = "mmio-sram";
170 #address-cells = <1>;
171 #size-cells = <1>;
174 smp-sysram@0 {
175 compatible = "samsung,exynos4210-sysram";
179 smp-sysram@2f000 {
180 compatible = "samsung,exynos4210-sysram-ns";
185 pd_gsc: power-domain@10044000 {
186 compatible = "samsung,exynos4210-pd";
188 #power-domain-cells = <0>;
192 pd_mfc: power-domain@10044040 {
193 compatible = "samsung,exynos4210-pd";
195 #power-domain-cells = <0>;
199 pd_g3d: power-domain@10044060 {
200 compatible = "samsung,exynos4210-pd";
202 #power-domain-cells = <0>;
206 pd_disp1: power-domain@100440a0 {
207 compatible = "samsung,exynos4210-pd";
209 #power-domain-cells = <0>;
213 pd_mau: power-domain@100440c0 {
214 compatible = "samsung,exynos4210-pd";
216 #power-domain-cells = <0>;
220 clock: clock-controller@10010000 {
221 compatible = "samsung,exynos5250-clock";
223 #clock-cells = <1>;
226 clock_audss: audss-clock-controller@3810000 {
227 compatible = "samsung,exynos5250-audss-clock";
229 #clock-cells = <1>;
232 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
233 power-domains = <&pd_mau>;
237 compatible = "samsung,exynos4210-mct";
239 interrupt-controller;
240 #interrupt-cells = <2>;
241 interrupt-parent = <&mct_map>;
245 clock-names = "fin_pll", "mct";
247 mct_map: mct-map {
248 #interrupt-cells = <2>;
249 #address-cells = <0>;
250 #size-cells = <0>;
251 interrupt-map = <0x0 0 &combiner 23 3>,
261 compatible = "samsung,exynos5250-pinctrl";
265 wakup_eint: wakeup-interrupt-controller {
266 compatible = "samsung,exynos4210-wakeup-eint";
267 interrupt-parent = <&gic>;
273 compatible = "samsung,exynos5250-pinctrl";
279 compatible = "samsung,exynos5250-pinctrl";
285 compatible = "samsung,exynos5250-pinctrl";
288 power-domains = <&pd_mau>;
291 pmu_system_controller: system-controller@10040000 {
292 compatible = "samsung,exynos5250-pmu", "syscon";
294 clock-names = "clkout16";
296 #clock-cells = <1>;
297 interrupt-controller;
298 #interrupt-cells = <3>;
299 interrupt-parent = <&gic>;
303 compatible = "samsung,exynos5250-wdt";
307 clock-names = "watchdog";
308 samsung,syscon-phandle = <&pmu_system_controller>;
312 compatible = "samsung,mfc-v6";
315 power-domains = <&pd_mfc>;
317 clock-names = "mfc";
319 iommu-names = "left", "right";
323 compatible = "samsung,exynos5250-rotator";
327 clock-names = "rotator";
332 compatible = "samsung,exynos5250-mali", "arm,mali-t604";
337 interrupt-names = "job", "mmu", "gpu";
339 clock-names = "core";
340 operating-points-v2 = <&gpu_opp_table>;
341 power-domains = <&pd_g3d>;
344 gpu_opp_table: gpu-opp-table {
345 compatible = "operating-points-v2";
347 opp-100000000 {
348 opp-hz = /bits/ 64 <100000000>;
349 opp-microvolt = <925000>;
351 opp-160000000 {
352 opp-hz = /bits/ 64 <160000000>;
353 opp-microvolt = <925000>;
355 opp-266000000 {
356 opp-hz = /bits/ 64 <266000000>;
357 opp-microvolt = <1025000>;
359 opp-350000000 {
360 opp-hz = /bits/ 64 <350000000>;
361 opp-microvolt = <1075000>;
363 opp-400000000 {
364 opp-hz = /bits/ 64 <400000000>;
365 opp-microvolt = <1125000>;
367 opp-450000000 {
368 opp-hz = /bits/ 64 <450000000>;
369 opp-microvolt = <1150000>;
371 opp-533000000 {
372 opp-hz = /bits/ 64 <533000000>;
373 opp-microvolt = <1250000>;
379 compatible = "samsung,exynos5250-tmu";
383 clock-names = "tmu_apbif";
384 #thermal-sensor-cells = <0>;
388 compatible = "snps,dwc-ahci";
389 samsung,sata-freq = <66>;
393 clock-names = "sata", "sclk_sata";
395 phy-names = "sata-phy";
396 ports-implemented = <0x1>;
400 sata_phy: sata-phy@12170000 {
401 compatible = "samsung,exynos5250-sata-phy";
404 clock-names = "sata_phyctrl";
405 #phy-cells = <0>;
406 samsung,syscon-phandle = <&pmu_system_controller>;
410 /* i2c_0-3 are defined in exynos5.dtsi */
412 compatible = "samsung,s3c2440-i2c";
415 #address-cells = <1>;
416 #size-cells = <0>;
418 clock-names = "i2c";
419 pinctrl-names = "default";
420 pinctrl-0 = <&i2c4_bus>;
425 compatible = "samsung,s3c2440-i2c";
428 #address-cells = <1>;
429 #size-cells = <0>;
431 clock-names = "i2c";
432 pinctrl-names = "default";
433 pinctrl-0 = <&i2c5_bus>;
438 compatible = "samsung,s3c2440-i2c";
441 #address-cells = <1>;
442 #size-cells = <0>;
444 clock-names = "i2c";
445 pinctrl-names = "default";
446 pinctrl-0 = <&i2c6_bus>;
451 compatible = "samsung,s3c2440-i2c";
454 #address-cells = <1>;
455 #size-cells = <0>;
457 clock-names = "i2c";
458 pinctrl-names = "default";
459 pinctrl-0 = <&i2c7_bus>;
464 compatible = "samsung,s3c2440-hdmiphy-i2c";
467 #address-cells = <1>;
468 #size-cells = <0>;
470 clock-names = "i2c";
474 compatible = "samsung,exynos4212-hdmiphy";
480 compatible = "samsung,exynos5-sata-phy-i2c";
482 #address-cells = <1>;
483 #size-cells = <0>;
485 clock-names = "i2c";
490 compatible = "samsung,exynos4210-spi";
496 dma-names = "tx", "rx";
497 #address-cells = <1>;
498 #size-cells = <0>;
500 clock-names = "spi", "spi_busclk0";
501 pinctrl-names = "default";
502 pinctrl-0 = <&spi0_bus>;
506 compatible = "samsung,exynos4210-spi";
512 dma-names = "tx", "rx";
513 #address-cells = <1>;
514 #size-cells = <0>;
516 clock-names = "spi", "spi_busclk0";
517 pinctrl-names = "default";
518 pinctrl-0 = <&spi1_bus>;
522 compatible = "samsung,exynos4210-spi";
528 dma-names = "tx", "rx";
529 #address-cells = <1>;
530 #size-cells = <0>;
532 clock-names = "spi", "spi_busclk0";
533 pinctrl-names = "default";
534 pinctrl-0 = <&spi2_bus>;
538 compatible = "samsung,exynos5250-dw-mshc";
540 #address-cells = <1>;
541 #size-cells = <0>;
544 clock-names = "biu", "ciu";
545 fifo-depth = <0x80>;
550 compatible = "samsung,exynos5250-dw-mshc";
552 #address-cells = <1>;
553 #size-cells = <0>;
556 clock-names = "biu", "ciu";
557 fifo-depth = <0x80>;
562 compatible = "samsung,exynos5250-dw-mshc";
564 #address-cells = <1>;
565 #size-cells = <0>;
568 clock-names = "biu", "ciu";
569 fifo-depth = <0x80>;
574 compatible = "samsung,exynos5250-dw-mshc";
577 #address-cells = <1>;
578 #size-cells = <0>;
580 clock-names = "biu", "ciu";
581 fifo-depth = <0x80>;
586 compatible = "samsung,s5pv210-i2s";
592 dma-names = "tx", "rx", "tx-sec";
596 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
597 samsung,idma-addr = <0x03000000>;
598 pinctrl-names = "default";
599 pinctrl-0 = <&i2s0_bus>;
600 power-domains = <&pd_mau>;
601 #clock-cells = <1>;
602 #sound-dai-cells = <1>;
606 compatible = "samsung,s3c6410-i2s";
611 dma-names = "tx", "rx";
613 clock-names = "iis", "i2s_opclk0";
614 pinctrl-names = "default";
615 pinctrl-0 = <&i2s1_bus>;
616 power-domains = <&pd_mau>;
617 #sound-dai-cells = <1>;
621 compatible = "samsung,s3c6410-i2s";
626 dma-names = "tx", "rx";
628 clock-names = "iis", "i2s_opclk0";
629 pinctrl-names = "default";
630 pinctrl-0 = <&i2s2_bus>;
631 power-domains = <&pd_mau>;
632 #sound-dai-cells = <1>;
636 compatible = "samsung,exynos5250-dwusb3";
638 clock-names = "usbdrd30";
639 #address-cells = <1>;
640 #size-cells = <1>;
648 phy-names = "usb2-phy", "usb3-phy";
653 compatible = "samsung,exynos5250-usbdrd-phy";
656 clock-names = "phy", "ref";
657 samsung,pmu-syscon = <&pmu_system_controller>;
658 #phy-cells = <1>;
662 compatible = "samsung,exynos4210-ehci";
667 clock-names = "usbhost";
669 phy-names = "host";
673 compatible = "samsung,exynos4210-ohci";
678 clock-names = "usbhost";
680 phy-names = "host";
684 compatible = "samsung,exynos5250-usb2-phy";
687 clock-names = "phy", "ref";
688 #phy-cells = <1>;
689 samsung,sysreg-phandle = <&sysreg_system_controller>;
690 samsung,pmureg-phandle = <&pmu_system_controller>;
694 #address-cells = <1>;
695 #size-cells = <1>;
696 compatible = "simple-bus";
697 interrupt-parent = <&gic>;
705 clock-names = "apb_pclk";
706 #dma-cells = <1>;
707 #dma-channels = <8>;
708 #dma-requests = <32>;
716 clock-names = "apb_pclk";
717 #dma-cells = <1>;
718 #dma-channels = <8>;
719 #dma-requests = <32>;
727 clock-names = "apb_pclk";
728 #dma-cells = <1>;
729 #dma-channels = <8>;
730 #dma-requests = <1>;
738 clock-names = "apb_pclk";
739 #dma-cells = <1>;
740 #dma-channels = <8>;
741 #dma-requests = <1>;
746 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
749 power-domains = <&pd_gsc>;
751 clock-names = "gscl";
756 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
759 power-domains = <&pd_gsc>;
761 clock-names = "gscl";
766 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
769 power-domains = <&pd_gsc>;
771 clock-names = "gscl";
776 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
779 power-domains = <&pd_gsc>;
781 clock-names = "gscl";
786 compatible = "samsung,exynos4212-hdmi";
788 power-domains = <&pd_disp1>;
793 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
795 samsung,syscon-phandle = <&pmu_system_controller>;
797 #sound-dai-cells = <0>;
802 compatible = "samsung,s5p-cec";
806 clock-names = "hdmicec";
807 samsung,syscon-phandle = <&pmu_system_controller>;
808 hdmi-phandle = <&hdmi>;
809 pinctrl-names = "default";
810 pinctrl-0 = <&hdmi_cec>;
815 compatible = "samsung,exynos5250-mixer";
817 power-domains = <&pd_disp1>;
821 clock-names = "mixer", "hdmi", "sclk_hdmi";
826 dp_phy: video-phy {
827 compatible = "samsung,exynos5250-dp-video-phy";
828 samsung,pmu-syscon = <&pmu_system_controller>;
829 #phy-cells = <0>;
832 mipi_phy: video-phy@10040710 {
833 compatible = "samsung,s5pv210-mipi-video-phy";
835 #phy-cells = <1>;
840 compatible = "samsung,exynos4210-mipi-dsi";
843 samsung,power-domain = <&pd_disp1>;
845 phy-names = "dsim";
847 clock-names = "bus_clk", "sclk_mipi";
849 #address-cells = <1>;
850 #size-cells = <0>;
854 compatible = "samsung,exynos-adc-v1";
858 clock-names = "adc";
859 #io-channel-cells = <1>;
860 io-channel-ranges;
861 samsung,syscon-phandle = <&pmu_system_controller>;
866 compatible = "samsung,exynos-sysmmu";
868 interrupt-parent = <&combiner>;
870 clock-names = "sysmmu", "master";
872 #iommu-cells = <0>;
876 compatible = "samsung,exynos-sysmmu";
878 interrupt-parent = <&combiner>;
880 power-domains = <&pd_mfc>;
881 clock-names = "sysmmu", "master";
883 #iommu-cells = <0>;
887 compatible = "samsung,exynos-sysmmu";
889 interrupt-parent = <&combiner>;
891 power-domains = <&pd_mfc>;
892 clock-names = "sysmmu", "master";
894 #iommu-cells = <0>;
898 compatible = "samsung,exynos-sysmmu";
900 interrupt-parent = <&combiner>;
902 clock-names = "sysmmu", "master";
904 #iommu-cells = <0>;
908 compatible = "samsung,exynos-sysmmu";
910 interrupt-parent = <&combiner>;
912 power-domains = <&pd_gsc>;
913 clock-names = "sysmmu", "master";
915 #iommu-cells = <0>;
919 compatible = "samsung,exynos-sysmmu";
921 interrupt-parent = <&combiner>;
923 clock-names = "sysmmu";
925 #iommu-cells = <0>;
929 compatible = "samsung,exynos-sysmmu";
931 interrupt-parent = <&combiner>;
933 clock-names = "sysmmu";
935 #iommu-cells = <0>;
939 compatible = "samsung,exynos-sysmmu";
941 interrupt-parent = <&combiner>;
943 clock-names = "sysmmu";
945 #iommu-cells = <0>;
949 compatible = "samsung,exynos-sysmmu";
951 interrupt-parent = <&combiner>;
953 clock-names = "sysmmu";
955 #iommu-cells = <0>;
959 compatible = "samsung,exynos-sysmmu";
961 interrupt-parent = <&combiner>;
963 clock-names = "sysmmu";
965 #iommu-cells = <0>;
969 compatible = "samsung,exynos-sysmmu";
971 interrupt-parent = <&combiner>;
973 clock-names = "sysmmu";
975 #iommu-cells = <0>;
979 compatible = "samsung,exynos-sysmmu";
981 interrupt-parent = <&combiner>;
983 clock-names = "sysmmu";
985 #iommu-cells = <0>;
989 compatible = "samsung,exynos-sysmmu";
991 interrupt-parent = <&combiner>;
993 clock-names = "sysmmu";
995 #iommu-cells = <0>;
999 compatible = "samsung,exynos-sysmmu";
1001 interrupt-parent = <&combiner>;
1003 clock-names = "sysmmu";
1005 #iommu-cells = <0>;
1009 compatible = "samsung,exynos-sysmmu";
1011 interrupt-parent = <&combiner>;
1013 clock-names = "sysmmu";
1015 #iommu-cells = <0>;
1019 compatible = "samsung,exynos-sysmmu";
1021 interrupt-parent = <&combiner>;
1023 power-domains = <&pd_gsc>;
1024 clock-names = "sysmmu", "master";
1026 #iommu-cells = <0>;
1030 compatible = "samsung,exynos-sysmmu";
1032 interrupt-parent = <&combiner>;
1034 power-domains = <&pd_gsc>;
1035 clock-names = "sysmmu", "master";
1037 #iommu-cells = <0>;
1041 compatible = "samsung,exynos-sysmmu";
1043 interrupt-parent = <&combiner>;
1045 power-domains = <&pd_gsc>;
1046 clock-names = "sysmmu", "master";
1048 #iommu-cells = <0>;
1052 compatible = "samsung,exynos-sysmmu";
1054 interrupt-parent = <&combiner>;
1056 power-domains = <&pd_gsc>;
1057 clock-names = "sysmmu", "master";
1059 #iommu-cells = <0>;
1063 compatible = "samsung,exynos-sysmmu";
1065 interrupt-parent = <&combiner>;
1067 power-domains = <&pd_gsc>;
1068 clock-names = "sysmmu", "master";
1070 #iommu-cells = <0>;
1074 compatible = "samsung,exynos-sysmmu";
1076 interrupt-parent = <&combiner>;
1078 power-domains = <&pd_gsc>;
1079 clock-names = "sysmmu", "master";
1081 #iommu-cells = <0>;
1085 compatible = "samsung,exynos-sysmmu";
1087 interrupt-parent = <&combiner>;
1089 power-domains = <&pd_disp1>;
1090 clock-names = "sysmmu", "master";
1092 #iommu-cells = <0>;
1096 compatible = "samsung,exynos-sysmmu";
1098 interrupt-parent = <&combiner>;
1100 power-domains = <&pd_disp1>;
1101 clock-names = "sysmmu", "master";
1103 #iommu-cells = <0>;
1107 thermal-zones {
1108 cpu_thermal: cpu-thermal {
1109 polling-delay-passive = <0>;
1110 polling-delay = <0>;
1111 thermal-sensors = <&tmu 0>;
1113 cooling-maps {
1116 cooling-device = <&cpu0 9 9>, <&cpu1 9 9>;
1120 cooling-device = <&cpu0 15 15>,
1128 compatible = "arm,armv7-timer";
1135 * of U-Boot on Exynos don't set the CNTFRQ register,
1138 clock-frequency = <24000000>;
1143 power-domains = <&pd_disp1>;
1145 clock-names = "dp";
1147 phy-names = "dp";
1151 power-domains = <&pd_disp1>;
1153 clock-names = "sclk_fimd", "fimd";
1160 clock-names = "fimg2d";
1166 clock-names = "i2c";
1167 pinctrl-names = "default";
1168 pinctrl-0 = <&i2c0_bus>;
1173 clock-names = "i2c";
1174 pinctrl-names = "default";
1175 pinctrl-0 = <&i2c1_bus>;
1180 clock-names = "i2c";
1181 pinctrl-names = "default";
1182 pinctrl-0 = <&i2c2_bus>;
1187 clock-names = "i2c";
1188 pinctrl-names = "default";
1189 pinctrl-0 = <&i2c3_bus>;
1194 clock-names = "secss";
1199 clock-names = "timers";
1204 clock-names = "rtc";
1205 interrupt-parent = <&pmu_system_controller>;
1211 clock-names = "uart", "clk_uart_baud0";
1213 dma-names = "rx", "tx";
1218 clock-names = "uart", "clk_uart_baud0";
1220 dma-names = "rx", "tx";
1225 clock-names = "uart", "clk_uart_baud0";
1227 dma-names = "rx", "tx";
1232 clock-names = "uart", "clk_uart_baud0";
1234 dma-names = "rx", "tx";
1239 clock-names = "secss";
1244 clock-names = "secss";
1247 #include "exynos5250-pinctrl.dtsi"
1248 #include "exynos-syscon-restart.dtsi"