Lines Matching +full:spi +full:- +full:rx +full:- +full:delay +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for Atmel AT32 and AT91 SPI Controllers
12 #include <linux/delay.h>
13 #include <linux/dma-mapping.h>
17 #include <linux/spi/spi.h>
25 #include <trace/events/spi.h>
27 /* SPI register offsets */
216 (((value) & ((1 << SPI_##name##_SIZE) - 1)) << SPI_##name##_OFFSET)
218 (((value) >> SPI_##name##_OFFSET) & ((1 << SPI_##name##_SIZE) - 1))
220 (((old) & ~(((1 << SPI_##name##_SIZE) - 1) << SPI_##name##_OFFSET)) \
225 readl_relaxed((port)->regs + SPI_##reg)
227 writel_relaxed((value), (port)->regs + SPI_##reg)
229 writew_relaxed((value), (port)->regs + SPI_##reg)
248 * The core SPI transfer engine just talks to a register bank to set up
285 /* Controller-specific per-slave state */
294 * Version 2 of the SPI controller has
295 * - CR.LASTXFER
296 * - SPI_MR.DIV32 may become FDIV or must-be-zero (here: always zero)
297 * - SPI_SR.TXEMPTY, SPI_SR.NSSR (and corresponding irqs)
298 * - SPI_CSRx.CSAAT
299 * - SPI_CSRx.SBCR allows faster clocking
303 return as->caps.is_spi2; in atmel_spi_is_v2()
307 * Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby
308 * they assume that spi slave device state will not change on deselect, so
314 * it lets us support active-high chipselects despite the controller's
315 * belief that only active-low devices/systems exists.
324 static void cs_activate(struct atmel_spi *as, struct spi_device *spi) in cs_activate() argument
326 struct atmel_spi_device *asd = spi->controller_state; in cs_activate()
330 if (spi->cs_gpiod) in cs_activate()
331 chip_select = as->native_cs_for_gpio; in cs_activate()
333 chip_select = spi->chip_select; in cs_activate()
336 spi_writel(as, CSR0 + 4 * chip_select, asd->csr); in cs_activate()
337 /* For the low SPI version, there is a issue that PDC transfer in cs_activate()
340 spi_writel(as, CSR0, asd->csr); in cs_activate()
341 if (as->caps.has_wdrbt) { in cs_activate()
356 u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; in cs_activate()
361 for (i = 0; i < spi->master->num_chipselect; i++) { in cs_activate()
373 dev_dbg(&spi->dev, "activate NPCS, mr %08x\n", mr); in cs_activate()
376 static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) in cs_deactivate() argument
381 if (spi->cs_gpiod) in cs_deactivate()
382 chip_select = as->native_cs_for_gpio; in cs_deactivate()
384 chip_select = spi->chip_select; in cs_deactivate()
395 dev_dbg(&spi->dev, "DEactivate NPCS, mr %08x\n", mr); in cs_deactivate()
397 if (!spi->cs_gpiod) in cs_deactivate()
401 static void atmel_spi_lock(struct atmel_spi *as) __acquires(&as->lock) in atmel_spi_lock()
403 spin_lock_irqsave(&as->lock, as->flags); in atmel_spi_lock()
406 static void atmel_spi_unlock(struct atmel_spi *as) __releases(&as->lock) in atmel_spi_unlock()
408 spin_unlock_irqrestore(&as->lock, as->flags); in atmel_spi_unlock()
413 return is_vmalloc_addr(xfer->tx_buf) || is_vmalloc_addr(xfer->rx_buf); in atmel_spi_is_vmalloc_xfer()
419 return as->use_dma && xfer->len >= DMA_MIN_BYTES; in atmel_spi_use_dma()
423 struct spi_device *spi, in atmel_spi_can_dma() argument
440 struct spi_master *master = platform_get_drvdata(as->pdev); in atmel_spi_dma_slave_config()
444 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; in atmel_spi_dma_slave_config()
445 slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; in atmel_spi_dma_slave_config()
447 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in atmel_spi_dma_slave_config()
448 slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; in atmel_spi_dma_slave_config()
451 slave_config->dst_addr = (dma_addr_t)as->phybase + SPI_TDR; in atmel_spi_dma_slave_config()
452 slave_config->src_addr = (dma_addr_t)as->phybase + SPI_RDR; in atmel_spi_dma_slave_config()
453 slave_config->src_maxburst = 1; in atmel_spi_dma_slave_config()
454 slave_config->dst_maxburst = 1; in atmel_spi_dma_slave_config()
455 slave_config->device_fc = false; in atmel_spi_dma_slave_config()
471 slave_config->direction = DMA_MEM_TO_DEV; in atmel_spi_dma_slave_config()
472 if (dmaengine_slave_config(master->dma_tx, slave_config)) { in atmel_spi_dma_slave_config()
473 dev_err(&as->pdev->dev, in atmel_spi_dma_slave_config()
475 err = -EINVAL; in atmel_spi_dma_slave_config()
479 * This driver configures the spi controller for master mode (MSTR bit in atmel_spi_dma_slave_config()
486 slave_config->direction = DMA_DEV_TO_MEM; in atmel_spi_dma_slave_config()
487 if (dmaengine_slave_config(master->dma_rx, slave_config)) { in atmel_spi_dma_slave_config()
488 dev_err(&as->pdev->dev, in atmel_spi_dma_slave_config()
489 "failed to configure rx dma channel\n"); in atmel_spi_dma_slave_config()
490 err = -EINVAL; in atmel_spi_dma_slave_config()
500 struct device *dev = &as->pdev->dev; in atmel_spi_configure_dma()
503 master->dma_tx = dma_request_chan(dev, "tx"); in atmel_spi_configure_dma()
504 if (IS_ERR(master->dma_tx)) { in atmel_spi_configure_dma()
505 err = PTR_ERR(master->dma_tx); in atmel_spi_configure_dma()
510 master->dma_rx = dma_request_chan(dev, "rx"); in atmel_spi_configure_dma()
511 if (IS_ERR(master->dma_rx)) { in atmel_spi_configure_dma()
512 err = PTR_ERR(master->dma_rx); in atmel_spi_configure_dma()
517 dev_dbg(dev, "No RX DMA channel, DMA is disabled\n"); in atmel_spi_configure_dma()
525 dev_info(&as->pdev->dev, in atmel_spi_configure_dma()
526 "Using %s (tx) and %s (rx) for DMA transfers\n", in atmel_spi_configure_dma()
527 dma_chan_name(master->dma_tx), in atmel_spi_configure_dma()
528 dma_chan_name(master->dma_rx)); in atmel_spi_configure_dma()
532 if (!IS_ERR(master->dma_rx)) in atmel_spi_configure_dma()
533 dma_release_channel(master->dma_rx); in atmel_spi_configure_dma()
534 if (!IS_ERR(master->dma_tx)) in atmel_spi_configure_dma()
535 dma_release_channel(master->dma_tx); in atmel_spi_configure_dma()
537 master->dma_tx = master->dma_rx = NULL; in atmel_spi_configure_dma()
543 if (master->dma_rx) in atmel_spi_stop_dma()
544 dmaengine_terminate_all(master->dma_rx); in atmel_spi_stop_dma()
545 if (master->dma_tx) in atmel_spi_stop_dma()
546 dmaengine_terminate_all(master->dma_tx); in atmel_spi_stop_dma()
551 if (master->dma_rx) { in atmel_spi_release_dma()
552 dma_release_channel(master->dma_rx); in atmel_spi_release_dma()
553 master->dma_rx = NULL; in atmel_spi_release_dma()
555 if (master->dma_tx) { in atmel_spi_release_dma()
556 dma_release_channel(master->dma_tx); in atmel_spi_release_dma()
557 master->dma_tx = NULL; in atmel_spi_release_dma()
567 if (is_vmalloc_addr(as->current_transfer->rx_buf) && in dma_callback()
569 memcpy(as->current_transfer->rx_buf, as->addr_rx_bbuf, in dma_callback()
570 as->current_transfer->len); in dma_callback()
572 complete(&as->xfer_completion); in dma_callback()
582 unsigned long xfer_pos = xfer->len - as->current_remaining_bytes; in atmel_spi_next_xfer_single()
584 dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_pio\n"); in atmel_spi_next_xfer_single()
593 if (xfer->bits_per_word > 8) in atmel_spi_next_xfer_single()
594 spi_writel(as, TDR, *(u16 *)(xfer->tx_buf + xfer_pos)); in atmel_spi_next_xfer_single()
596 spi_writel(as, TDR, *(u8 *)(xfer->tx_buf + xfer_pos)); in atmel_spi_next_xfer_single()
598 dev_dbg(master->dev.parent, in atmel_spi_next_xfer_single()
599 " start pio xfer %p: len %u tx %p rx %p bitpw %d\n", in atmel_spi_next_xfer_single()
600 xfer, xfer->len, xfer->tx_buf, xfer->rx_buf, in atmel_spi_next_xfer_single()
601 xfer->bits_per_word); in atmel_spi_next_xfer_single()
615 u32 offset = xfer->len - as->current_remaining_bytes; in atmel_spi_next_xfer_fifo()
616 const u16 *words = (const u16 *)((u8 *)xfer->tx_buf + offset); in atmel_spi_next_xfer_fifo()
617 const u8 *bytes = (const u8 *)((u8 *)xfer->tx_buf + offset); in atmel_spi_next_xfer_fifo()
621 dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_fifo\n"); in atmel_spi_next_xfer_fifo()
624 current_remaining_data = ((xfer->bits_per_word > 8) ? in atmel_spi_next_xfer_fifo()
625 ((u32)as->current_remaining_bytes >> 1) : in atmel_spi_next_xfer_fifo()
626 (u32)as->current_remaining_bytes); in atmel_spi_next_xfer_fifo()
627 num_data = min(current_remaining_data, as->fifo_size); in atmel_spi_next_xfer_fifo()
629 /* Flush RX and TX FIFOs */ in atmel_spi_next_xfer_fifo()
634 /* Set RX FIFO Threshold to the number of data to transfer */ in atmel_spi_next_xfer_fifo()
643 if (xfer->bits_per_word > 8) { in atmel_spi_next_xfer_fifo()
652 num_data -= 2; in atmel_spi_next_xfer_fifo()
656 if (xfer->bits_per_word > 8) in atmel_spi_next_xfer_fifo()
662 num_data--; in atmel_spi_next_xfer_fifo()
665 dev_dbg(master->dev.parent, in atmel_spi_next_xfer_fifo()
666 " start fifo xfer %p: len %u tx %p rx %p bitpw %d\n", in atmel_spi_next_xfer_fifo()
667 xfer, xfer->len, xfer->tx_buf, xfer->rx_buf, in atmel_spi_next_xfer_fifo()
668 xfer->bits_per_word); in atmel_spi_next_xfer_fifo()
671 * Enable RX FIFO Threshold Flag interrupt to be notified about in atmel_spi_next_xfer_fifo()
685 if (as->fifo_size) in atmel_spi_next_xfer_pio()
699 struct dma_chan *rxchan = master->dma_rx; in atmel_spi_next_xfer_dma_submit()
700 struct dma_chan *txchan = master->dma_tx; in atmel_spi_next_xfer_dma_submit()
706 dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_dma_submit\n"); in atmel_spi_next_xfer_dma_submit()
710 return -ENODEV; in atmel_spi_next_xfer_dma_submit()
713 *plen = xfer->len; in atmel_spi_next_xfer_dma_submit()
716 xfer->bits_per_word)) in atmel_spi_next_xfer_dma_submit()
723 as->dma_addr_rx_bbuf, in atmel_spi_next_xfer_dma_submit()
724 xfer->len, in atmel_spi_next_xfer_dma_submit()
730 xfer->rx_sg.sgl, in atmel_spi_next_xfer_dma_submit()
731 xfer->rx_sg.nents, in atmel_spi_next_xfer_dma_submit()
741 memcpy(as->addr_tx_bbuf, xfer->tx_buf, xfer->len); in atmel_spi_next_xfer_dma_submit()
743 as->dma_addr_tx_bbuf, in atmel_spi_next_xfer_dma_submit()
744 xfer->len, DMA_MEM_TO_DEV, in atmel_spi_next_xfer_dma_submit()
749 xfer->tx_sg.sgl, in atmel_spi_next_xfer_dma_submit()
750 xfer->tx_sg.nents, in atmel_spi_next_xfer_dma_submit()
758 dev_dbg(master->dev.parent, in atmel_spi_next_xfer_dma_submit()
759 " start dma xfer %p: len %u tx %p/%08llx rx %p/%08llx\n", in atmel_spi_next_xfer_dma_submit()
760 xfer, xfer->len, xfer->tx_buf, (unsigned long long)xfer->tx_dma, in atmel_spi_next_xfer_dma_submit()
761 xfer->rx_buf, (unsigned long long)xfer->rx_dma); in atmel_spi_next_xfer_dma_submit()
766 /* Put the callback on the RX transfer only, that should finish last */ in atmel_spi_next_xfer_dma_submit()
767 rxdesc->callback = dma_callback; in atmel_spi_next_xfer_dma_submit()
768 rxdesc->callback_param = master; in atmel_spi_next_xfer_dma_submit()
770 /* Submit and fire RX and TX with TX last so we're ready to read! */ in atmel_spi_next_xfer_dma_submit()
771 cookie = rxdesc->tx_submit(rxdesc); in atmel_spi_next_xfer_dma_submit()
774 cookie = txdesc->tx_submit(txdesc); in atmel_spi_next_xfer_dma_submit()
777 rxchan->device->device_issue_pending(rxchan); in atmel_spi_next_xfer_dma_submit()
778 txchan->device->device_issue_pending(txchan); in atmel_spi_next_xfer_dma_submit()
786 return -ENOMEM; in atmel_spi_next_xfer_dma_submit()
795 *rx_dma = xfer->rx_dma + xfer->len - *plen; in atmel_spi_next_xfer_data()
796 *tx_dma = xfer->tx_dma + xfer->len - *plen; in atmel_spi_next_xfer_data()
797 if (*plen > master->max_dma_len) in atmel_spi_next_xfer_data()
798 *plen = master->max_dma_len; in atmel_spi_next_xfer_data()
802 struct spi_device *spi, in atmel_spi_set_xfer_speed() argument
809 if (spi->cs_gpiod) in atmel_spi_set_xfer_speed()
810 chip_select = as->native_cs_for_gpio; in atmel_spi_set_xfer_speed()
812 chip_select = spi->chip_select; in atmel_spi_set_xfer_speed()
815 bus_hz = as->spi_clk; in atmel_spi_set_xfer_speed()
823 scbr = DIV_ROUND_UP(bus_hz, xfer->speed_hz); in atmel_spi_set_xfer_speed()
830 dev_err(&spi->dev, in atmel_spi_set_xfer_speed()
832 xfer->speed_hz, scbr, bus_hz/255); in atmel_spi_set_xfer_speed()
833 return -EINVAL; in atmel_spi_set_xfer_speed()
836 dev_err(&spi->dev, in atmel_spi_set_xfer_speed()
838 xfer->speed_hz, scbr, bus_hz); in atmel_spi_set_xfer_speed()
839 return -EINVAL; in atmel_spi_set_xfer_speed()
844 xfer->effective_speed_hz = bus_hz / scbr; in atmel_spi_set_xfer_speed()
851 * lock is held, spi irq is blocked
862 len = as->current_remaining_bytes; in atmel_spi_pdc_next_xfer()
864 as->current_remaining_bytes -= len; in atmel_spi_pdc_next_xfer()
869 if (xfer->bits_per_word > 8) in atmel_spi_pdc_next_xfer()
874 dev_dbg(&master->dev, in atmel_spi_pdc_next_xfer()
875 " start xfer %p: len %u tx %p/%08llx rx %p/%08llx\n", in atmel_spi_pdc_next_xfer()
876 xfer, xfer->len, xfer->tx_buf, in atmel_spi_pdc_next_xfer()
877 (unsigned long long)xfer->tx_dma, xfer->rx_buf, in atmel_spi_pdc_next_xfer()
878 (unsigned long long)xfer->rx_dma); in atmel_spi_pdc_next_xfer()
880 if (as->current_remaining_bytes) { in atmel_spi_pdc_next_xfer()
881 len = as->current_remaining_bytes; in atmel_spi_pdc_next_xfer()
883 as->current_remaining_bytes -= len; in atmel_spi_pdc_next_xfer()
888 if (xfer->bits_per_word > 8) in atmel_spi_pdc_next_xfer()
893 dev_dbg(&master->dev, in atmel_spi_pdc_next_xfer()
894 " next xfer %p: len %u tx %p/%08llx rx %p/%08llx\n", in atmel_spi_pdc_next_xfer()
895 xfer, xfer->len, xfer->tx_buf, in atmel_spi_pdc_next_xfer()
896 (unsigned long long)xfer->tx_dma, xfer->rx_buf, in atmel_spi_pdc_next_xfer()
897 (unsigned long long)xfer->rx_dma); in atmel_spi_pdc_next_xfer()
916 * - The buffer is either valid for CPU access, else NULL
917 * - If the buffer is valid, so is its DMA address
919 * This driver manages the dma address unless message->is_dma_mapped.
924 struct device *dev = &as->pdev->dev; in atmel_spi_dma_map_xfer()
926 xfer->tx_dma = xfer->rx_dma = INVALID_DMA_ADDRESS; in atmel_spi_dma_map_xfer()
927 if (xfer->tx_buf) { in atmel_spi_dma_map_xfer()
930 void *nonconst_tx = (void *)xfer->tx_buf; in atmel_spi_dma_map_xfer()
932 xfer->tx_dma = dma_map_single(dev, in atmel_spi_dma_map_xfer()
933 nonconst_tx, xfer->len, in atmel_spi_dma_map_xfer()
935 if (dma_mapping_error(dev, xfer->tx_dma)) in atmel_spi_dma_map_xfer()
936 return -ENOMEM; in atmel_spi_dma_map_xfer()
938 if (xfer->rx_buf) { in atmel_spi_dma_map_xfer()
939 xfer->rx_dma = dma_map_single(dev, in atmel_spi_dma_map_xfer()
940 xfer->rx_buf, xfer->len, in atmel_spi_dma_map_xfer()
942 if (dma_mapping_error(dev, xfer->rx_dma)) { in atmel_spi_dma_map_xfer()
943 if (xfer->tx_buf) in atmel_spi_dma_map_xfer()
945 xfer->tx_dma, xfer->len, in atmel_spi_dma_map_xfer()
947 return -ENOMEM; in atmel_spi_dma_map_xfer()
956 if (xfer->tx_dma != INVALID_DMA_ADDRESS) in atmel_spi_dma_unmap_xfer()
957 dma_unmap_single(master->dev.parent, xfer->tx_dma, in atmel_spi_dma_unmap_xfer()
958 xfer->len, DMA_TO_DEVICE); in atmel_spi_dma_unmap_xfer()
959 if (xfer->rx_dma != INVALID_DMA_ADDRESS) in atmel_spi_dma_unmap_xfer()
960 dma_unmap_single(master->dev.parent, xfer->rx_dma, in atmel_spi_dma_unmap_xfer()
961 xfer->len, DMA_FROM_DEVICE); in atmel_spi_dma_unmap_xfer()
974 unsigned long xfer_pos = xfer->len - as->current_remaining_bytes; in atmel_spi_pump_single_data()
976 if (xfer->bits_per_word > 8) { in atmel_spi_pump_single_data()
977 rxp16 = (u16 *)(((u8 *)xfer->rx_buf) + xfer_pos); in atmel_spi_pump_single_data()
980 rxp = ((u8 *)xfer->rx_buf) + xfer_pos; in atmel_spi_pump_single_data()
983 if (xfer->bits_per_word > 8) { in atmel_spi_pump_single_data()
984 if (as->current_remaining_bytes > 2) in atmel_spi_pump_single_data()
985 as->current_remaining_bytes -= 2; in atmel_spi_pump_single_data()
987 as->current_remaining_bytes = 0; in atmel_spi_pump_single_data()
989 as->current_remaining_bytes--; in atmel_spi_pump_single_data()
998 u32 offset = xfer->len - as->current_remaining_bytes; in atmel_spi_pump_fifo_data()
999 u16 *words = (u16 *)((u8 *)xfer->rx_buf + offset); in atmel_spi_pump_fifo_data()
1000 u8 *bytes = (u8 *)((u8 *)xfer->rx_buf + offset); in atmel_spi_pump_fifo_data()
1004 num_bytes = ((xfer->bits_per_word > 8) ? in atmel_spi_pump_fifo_data()
1008 if (as->current_remaining_bytes > num_bytes) in atmel_spi_pump_fifo_data()
1009 as->current_remaining_bytes -= num_bytes; in atmel_spi_pump_fifo_data()
1011 as->current_remaining_bytes = 0; in atmel_spi_pump_fifo_data()
1014 if (xfer->bits_per_word > 8) in atmel_spi_pump_fifo_data()
1015 as->current_remaining_bytes &= ~0x1; in atmel_spi_pump_fifo_data()
1020 if (xfer->bits_per_word > 8) in atmel_spi_pump_fifo_data()
1024 num_data--; in atmel_spi_pump_fifo_data()
1036 if (as->fifo_size) in atmel_spi_pump_pio_data()
1061 dev_warn(master->dev.parent, "overrun\n"); in atmel_spi_pio_interrupt()
1066 * bounce buffer and msg->actual_len will not be in atmel_spi_pio_interrupt()
1072 as->done_status = -EIO; in atmel_spi_pio_interrupt()
1078 complete(&as->xfer_completion); in atmel_spi_pio_interrupt()
1083 if (as->current_remaining_bytes) { in atmel_spi_pio_interrupt()
1085 xfer = as->current_transfer; in atmel_spi_pio_interrupt()
1087 if (!as->current_remaining_bytes) in atmel_spi_pio_interrupt()
1090 complete(&as->xfer_completion); in atmel_spi_pio_interrupt()
1125 as->done_status = -EIO; in atmel_spi_pdc_interrupt()
1127 complete(&as->xfer_completion); in atmel_spi_pdc_interrupt()
1134 complete(&as->xfer_completion); in atmel_spi_pdc_interrupt()
1140 static int atmel_word_delay_csr(struct spi_device *spi, struct atmel_spi *as) in atmel_word_delay_csr() argument
1142 struct spi_delay *delay = &spi->word_delay; in atmel_word_delay_csr() local
1143 u32 value = delay->value; in atmel_word_delay_csr()
1145 switch (delay->unit) { in atmel_word_delay_csr()
1152 return -EINVAL; in atmel_word_delay_csr()
1155 return (as->spi_clk / 1000000 * value) >> 5; in atmel_word_delay_csr()
1161 struct spi_master *master = platform_get_drvdata(as->pdev); in initialize_native_cs_for_gpio()
1163 if (!as->native_cs_free) in initialize_native_cs_for_gpio()
1166 if (!master->cs_gpiods) in initialize_native_cs_for_gpio()
1179 if (master->cs_gpiods[i]) in initialize_native_cs_for_gpio()
1180 as->native_cs_free |= BIT(i); in initialize_native_cs_for_gpio()
1182 if (as->native_cs_free) in initialize_native_cs_for_gpio()
1183 as->native_cs_for_gpio = ffs(as->native_cs_free); in initialize_native_cs_for_gpio()
1186 static int atmel_spi_setup(struct spi_device *spi) in atmel_spi_setup() argument
1191 unsigned int bits = spi->bits_per_word; in atmel_spi_setup()
1195 as = spi_master_get_devdata(spi->master); in atmel_spi_setup()
1198 if (!spi->cs_gpiod && (spi->mode & SPI_CS_HIGH)) { in atmel_spi_setup()
1199 dev_warn(&spi->dev, "setup: non GPIO CS can't be active-high\n"); in atmel_spi_setup()
1200 return -EINVAL; in atmel_spi_setup()
1210 if (spi->cs_gpiod && as->native_cs_free) { in atmel_spi_setup()
1211 dev_err(&spi->dev, in atmel_spi_setup()
1213 return -EBUSY; in atmel_spi_setup()
1216 if (spi->cs_gpiod) in atmel_spi_setup()
1217 chip_select = as->native_cs_for_gpio; in atmel_spi_setup()
1219 chip_select = spi->chip_select; in atmel_spi_setup()
1221 csr = SPI_BF(BITS, bits - 8); in atmel_spi_setup()
1222 if (spi->mode & SPI_CPOL) in atmel_spi_setup()
1224 if (!(spi->mode & SPI_CPHA)) in atmel_spi_setup()
1227 if (!spi->cs_gpiod) in atmel_spi_setup()
1231 word_delay_csr = atmel_word_delay_csr(spi, as); in atmel_spi_setup()
1240 asd = spi->controller_state; in atmel_spi_setup()
1244 return -ENOMEM; in atmel_spi_setup()
1246 spi->controller_state = asd; in atmel_spi_setup()
1249 asd->csr = csr; in atmel_spi_setup()
1251 dev_dbg(&spi->dev, in atmel_spi_setup()
1252 "setup: bpw %u mode 0x%x -> csr%d %08x\n", in atmel_spi_setup()
1253 bits, spi->mode, spi->chip_select, csr); in atmel_spi_setup()
1261 static void atmel_spi_set_cs(struct spi_device *spi, bool enable) in atmel_spi_set_cs() argument
1263 struct atmel_spi *as = spi_master_get_devdata(spi->master); in atmel_spi_set_cs()
1264 /* the core doesn't really pass us enable/disable, but CS HIGH vs CS LOW in atmel_spi_set_cs()
1268 enable = (!!(spi->mode & SPI_CS_HIGH) == enable); in atmel_spi_set_cs()
1271 cs_activate(as, spi); in atmel_spi_set_cs()
1273 cs_deactivate(as, spi); in atmel_spi_set_cs()
1279 struct spi_device *spi, in atmel_spi_one_transfer() argument
1292 asd = spi->controller_state; in atmel_spi_one_transfer()
1293 bits = (asd->csr >> 4) & 0xf; in atmel_spi_one_transfer()
1294 if (bits != xfer->bits_per_word - 8) { in atmel_spi_one_transfer()
1295 dev_dbg(&spi->dev, in atmel_spi_one_transfer()
1297 return -ENOPROTOOPT; in atmel_spi_one_transfer()
1304 if ((!master->cur_msg->is_dma_mapped) in atmel_spi_one_transfer()
1305 && as->use_pdc) { in atmel_spi_one_transfer()
1307 return -ENOMEM; in atmel_spi_one_transfer()
1310 atmel_spi_set_xfer_speed(as, spi, xfer); in atmel_spi_one_transfer()
1312 as->done_status = 0; in atmel_spi_one_transfer()
1313 as->current_transfer = xfer; in atmel_spi_one_transfer()
1314 as->current_remaining_bytes = xfer->len; in atmel_spi_one_transfer()
1315 while (as->current_remaining_bytes) { in atmel_spi_one_transfer()
1316 reinit_completion(&as->xfer_completion); in atmel_spi_one_transfer()
1318 if (as->use_pdc) { in atmel_spi_one_transfer()
1323 len = as->current_remaining_bytes; in atmel_spi_one_transfer()
1327 dev_err(&spi->dev, in atmel_spi_one_transfer()
1329 as->done_status = ret; in atmel_spi_one_transfer()
1332 as->current_remaining_bytes -= len; in atmel_spi_one_transfer()
1333 if (as->current_remaining_bytes < 0) in atmel_spi_one_transfer()
1334 as->current_remaining_bytes = 0; in atmel_spi_one_transfer()
1342 dma_timeout = wait_for_completion_timeout(&as->xfer_completion, in atmel_spi_one_transfer()
1345 dev_err(&spi->dev, "spi transfer timeout\n"); in atmel_spi_one_transfer()
1346 as->done_status = -EIO; in atmel_spi_one_transfer()
1349 if (as->done_status) in atmel_spi_one_transfer()
1353 if (as->done_status) { in atmel_spi_one_transfer()
1354 if (as->use_pdc) { in atmel_spi_one_transfer()
1355 dev_warn(master->dev.parent, in atmel_spi_one_transfer()
1367 for (timeout = 1000; timeout; timeout--) in atmel_spi_one_transfer()
1371 dev_warn(master->dev.parent, in atmel_spi_one_transfer()
1384 if (!master->cur_msg->is_dma_mapped in atmel_spi_one_transfer()
1385 && as->use_pdc) in atmel_spi_one_transfer()
1388 if (as->use_pdc) in atmel_spi_one_transfer()
1391 return as->done_status; in atmel_spi_one_transfer()
1394 static void atmel_spi_cleanup(struct spi_device *spi) in atmel_spi_cleanup() argument
1396 struct atmel_spi_device *asd = spi->controller_state; in atmel_spi_cleanup()
1401 spi->controller_state = NULL; in atmel_spi_cleanup()
1416 as->caps.is_spi2 = version > 0x121; in atmel_get_caps()
1417 as->caps.has_wdrbt = version >= 0x210; in atmel_get_caps()
1418 as->caps.has_dma_support = version >= 0x212; in atmel_get_caps()
1419 as->caps.has_pdc_support = version < 0x212; in atmel_get_caps()
1428 if (as->fifo_size) in atmel_spi_init()
1431 if (as->caps.has_wdrbt) { in atmel_spi_init()
1438 if (as->use_pdc) in atmel_spi_init()
1453 pinctrl_pm_select_default_state(&pdev->dev); in atmel_spi_probe()
1457 return -ENXIO; in atmel_spi_probe()
1463 clk = devm_clk_get(&pdev->dev, "spi_clk"); in atmel_spi_probe()
1467 /* setup spi core then atmel-specific driver state */ in atmel_spi_probe()
1468 master = spi_alloc_master(&pdev->dev, sizeof(*as)); in atmel_spi_probe()
1470 return -ENOMEM; in atmel_spi_probe()
1472 /* the spi->mode bits understood by this driver: */ in atmel_spi_probe()
1473 master->use_gpio_descriptors = true; in atmel_spi_probe()
1474 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; in atmel_spi_probe()
1475 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); in atmel_spi_probe()
1476 master->dev.of_node = pdev->dev.of_node; in atmel_spi_probe()
1477 master->bus_num = pdev->id; in atmel_spi_probe()
1478 master->num_chipselect = 4; in atmel_spi_probe()
1479 master->setup = atmel_spi_setup; in atmel_spi_probe()
1480 master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX | in atmel_spi_probe()
1482 master->transfer_one = atmel_spi_one_transfer; in atmel_spi_probe()
1483 master->set_cs = atmel_spi_set_cs; in atmel_spi_probe()
1484 master->cleanup = atmel_spi_cleanup; in atmel_spi_probe()
1485 master->auto_runtime_pm = true; in atmel_spi_probe()
1486 master->max_dma_len = SPI_MAX_DMA_XFER; in atmel_spi_probe()
1487 master->can_dma = atmel_spi_can_dma; in atmel_spi_probe()
1492 spin_lock_init(&as->lock); in atmel_spi_probe()
1494 as->pdev = pdev; in atmel_spi_probe()
1495 as->regs = devm_ioremap_resource(&pdev->dev, regs); in atmel_spi_probe()
1496 if (IS_ERR(as->regs)) { in atmel_spi_probe()
1497 ret = PTR_ERR(as->regs); in atmel_spi_probe()
1500 as->phybase = regs->start; in atmel_spi_probe()
1501 as->irq = irq; in atmel_spi_probe()
1502 as->clk = clk; in atmel_spi_probe()
1504 init_completion(&as->xfer_completion); in atmel_spi_probe()
1508 as->use_dma = false; in atmel_spi_probe()
1509 as->use_pdc = false; in atmel_spi_probe()
1510 if (as->caps.has_dma_support) { in atmel_spi_probe()
1513 as->use_dma = true; in atmel_spi_probe()
1514 } else if (ret == -EPROBE_DEFER) { in atmel_spi_probe()
1517 } else if (as->caps.has_pdc_support) { in atmel_spi_probe()
1518 as->use_pdc = true; in atmel_spi_probe()
1522 as->addr_rx_bbuf = dma_alloc_coherent(&pdev->dev, in atmel_spi_probe()
1524 &as->dma_addr_rx_bbuf, in atmel_spi_probe()
1526 if (!as->addr_rx_bbuf) { in atmel_spi_probe()
1527 as->use_dma = false; in atmel_spi_probe()
1529 as->addr_tx_bbuf = dma_alloc_coherent(&pdev->dev, in atmel_spi_probe()
1531 &as->dma_addr_tx_bbuf, in atmel_spi_probe()
1533 if (!as->addr_tx_bbuf) { in atmel_spi_probe()
1534 as->use_dma = false; in atmel_spi_probe()
1535 dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER, in atmel_spi_probe()
1536 as->addr_rx_bbuf, in atmel_spi_probe()
1537 as->dma_addr_rx_bbuf); in atmel_spi_probe()
1540 if (!as->use_dma) in atmel_spi_probe()
1541 dev_info(master->dev.parent, in atmel_spi_probe()
1545 if (as->caps.has_dma_support && !as->use_dma) in atmel_spi_probe()
1546 dev_info(&pdev->dev, "Atmel SPI Controller using PIO only\n"); in atmel_spi_probe()
1548 if (as->use_pdc) { in atmel_spi_probe()
1549 ret = devm_request_irq(&pdev->dev, irq, atmel_spi_pdc_interrupt, in atmel_spi_probe()
1550 0, dev_name(&pdev->dev), master); in atmel_spi_probe()
1552 ret = devm_request_irq(&pdev->dev, irq, atmel_spi_pio_interrupt, in atmel_spi_probe()
1553 0, dev_name(&pdev->dev), master); in atmel_spi_probe()
1563 as->spi_clk = clk_get_rate(clk); in atmel_spi_probe()
1565 as->fifo_size = 0; in atmel_spi_probe()
1566 if (!of_property_read_u32(pdev->dev.of_node, "atmel,fifo-size", in atmel_spi_probe()
1567 &as->fifo_size)) { in atmel_spi_probe()
1568 dev_info(&pdev->dev, "Using FIFO (%u data)\n", as->fifo_size); in atmel_spi_probe()
1573 pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_TIMEOUT); in atmel_spi_probe()
1574 pm_runtime_use_autosuspend(&pdev->dev); in atmel_spi_probe()
1575 pm_runtime_set_active(&pdev->dev); in atmel_spi_probe()
1576 pm_runtime_enable(&pdev->dev); in atmel_spi_probe()
1578 ret = devm_spi_register_master(&pdev->dev, master); in atmel_spi_probe()
1583 dev_info(&pdev->dev, "Atmel SPI Controller version 0x%x at 0x%08lx (irq %d)\n", in atmel_spi_probe()
1584 atmel_get_version(as), (unsigned long)regs->start, in atmel_spi_probe()
1590 pm_runtime_disable(&pdev->dev); in atmel_spi_probe()
1591 pm_runtime_set_suspended(&pdev->dev); in atmel_spi_probe()
1593 if (as->use_dma) in atmel_spi_probe()
1610 pm_runtime_get_sync(&pdev->dev); in atmel_spi_remove()
1613 if (as->use_dma) { in atmel_spi_remove()
1617 dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER, in atmel_spi_remove()
1618 as->addr_tx_bbuf, in atmel_spi_remove()
1619 as->dma_addr_tx_bbuf); in atmel_spi_remove()
1620 dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER, in atmel_spi_remove()
1621 as->addr_rx_bbuf, in atmel_spi_remove()
1622 as->dma_addr_rx_bbuf); in atmel_spi_remove()
1626 spin_lock_irq(&as->lock); in atmel_spi_remove()
1630 spin_unlock_irq(&as->lock); in atmel_spi_remove()
1632 clk_disable_unprepare(as->clk); in atmel_spi_remove()
1634 pm_runtime_put_noidle(&pdev->dev); in atmel_spi_remove()
1635 pm_runtime_disable(&pdev->dev); in atmel_spi_remove()
1646 clk_disable_unprepare(as->clk); in atmel_spi_runtime_suspend()
1659 return clk_prepare_enable(as->clk); in atmel_spi_runtime_resume()
1685 ret = clk_prepare_enable(as->clk); in atmel_spi_resume()
1691 clk_disable_unprepare(as->clk); in atmel_spi_resume()
1715 { .compatible = "atmel,at91rm9200-spi" },
1732 MODULE_DESCRIPTION("Atmel AT32/AT91 SPI Controller driver");