8  * - When outputing the source clock directly, the PWM logic will be bypassed
22 #include <linux/pwm.h>
113 				struct pwm_device *pwm,  in sun4i_pwm_get_state()  argument
126 	 * PWM chapter in H6 manual has a diagram which explains that if bypass  in sun4i_pwm_get_state()
130 	if ((val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) &&  in sun4i_pwm_get_state()
139 	if ((PWM_REG_PRESCAL(val, pwm->hwpwm) == PWM_PRESCAL_MASK) &&  in sun4i_pwm_get_state()
143 		prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)];  in sun4i_pwm_get_state()
148 	if (val & BIT_CH(PWM_ACT_STATE, pwm->hwpwm))  in sun4i_pwm_get_state()
153 	if ((val & BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) ==  in sun4i_pwm_get_state()
154 	    BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm))  in sun4i_pwm_get_state()
159 	val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm));  in sun4i_pwm_get_state()
231 static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,  in sun4i_pwm_apply()  argument
242 	pwm_get_state(pwm, &cstate);  in sun4i_pwm_apply()
247 			dev_err(chip->dev, "failed to enable PWM clock\n");  in sun4i_pwm_apply()
266 			ctrl |= BIT_CH(PWM_BYPASS, pwm->hwpwm);  in sun4i_pwm_apply()
273 		ctrl &= ~BIT_CH(PWM_BYPASS, pwm->hwpwm);  in sun4i_pwm_apply()
276 	if (PWM_REG_PRESCAL(ctrl, pwm->hwpwm) != prescaler) {  in sun4i_pwm_apply()
278 		ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);  in sun4i_pwm_apply()
281 		ctrl &= ~BIT_CH(PWM_PRESCAL_MASK, pwm->hwpwm);  in sun4i_pwm_apply()
282 		ctrl |= BIT_CH(prescaler, pwm->hwpwm);  in sun4i_pwm_apply()
286 	sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));  in sun4i_pwm_apply()
287 	sun4i_pwm->next_period[pwm->hwpwm] = jiffies +  in sun4i_pwm_apply()
291 		ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm);  in sun4i_pwm_apply()
293 		ctrl |= BIT_CH(PWM_ACT_STATE, pwm->hwpwm);  in sun4i_pwm_apply()
295 	ctrl |= BIT_CH(PWM_CLK_GATING, pwm->hwpwm);  in sun4i_pwm_apply()
298 		ctrl |= BIT_CH(PWM_EN, pwm->hwpwm);  in sun4i_pwm_apply()
309 	if (time_before(now, sun4i_pwm->next_period[pwm->hwpwm])) {  in sun4i_pwm_apply()
310 		delay_us = jiffies_to_usecs(sun4i_pwm->next_period[pwm->hwpwm] -  in sun4i_pwm_apply()
320 	ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);  in sun4i_pwm_apply()
321 	ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm);  in sun4i_pwm_apply()
365 		.compatible = "allwinner,sun4i-a10-pwm",
368 		.compatible = "allwinner,sun5i-a10s-pwm",
371 		.compatible = "allwinner,sun5i-a13-pwm",
374 		.compatible = "allwinner,sun7i-a20-pwm",
377 		.compatible = "allwinner,sun8i-h3-pwm",
380 		.compatible = "allwinner,sun50i-a64-pwm",
383 		.compatible = "allwinner,sun50i-h6-pwm",
393 	struct sun4i_pwm_chip *pwm;  in sun4i_pwm_probe()  local
396 	pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);  in sun4i_pwm_probe()
397 	if (!pwm)  in sun4i_pwm_probe()
400 	pwm->data = of_device_get_match_data(&pdev->dev);  in sun4i_pwm_probe()
401 	if (!pwm->data)  in sun4i_pwm_probe()
404 	pwm->base = devm_platform_ioremap_resource(pdev, 0);  in sun4i_pwm_probe()
405 	if (IS_ERR(pwm->base))  in sun4i_pwm_probe()
406 		return PTR_ERR(pwm->base);  in sun4i_pwm_probe()
416 	 * unnamed one of the PWM device) and if this is not found we fall  in sun4i_pwm_probe()
417 	 * back to the first clock of the PWM.  in sun4i_pwm_probe()
419 	pwm->clk = devm_clk_get_optional(&pdev->dev, "mod");  in sun4i_pwm_probe()
420 	if (IS_ERR(pwm->clk))  in sun4i_pwm_probe()
421 		return dev_err_probe(&pdev->dev, PTR_ERR(pwm->clk),  in sun4i_pwm_probe()
424 	if (!pwm->clk) {  in sun4i_pwm_probe()
425 		pwm->clk = devm_clk_get(&pdev->dev, NULL);  in sun4i_pwm_probe()
426 		if (IS_ERR(pwm->clk))  in sun4i_pwm_probe()
427 			return dev_err_probe(&pdev->dev, PTR_ERR(pwm->clk),  in sun4i_pwm_probe()
431 	pwm->bus_clk = devm_clk_get_optional(&pdev->dev, "bus");  in sun4i_pwm_probe()
432 	if (IS_ERR(pwm->bus_clk))  in sun4i_pwm_probe()
433 		return dev_err_probe(&pdev->dev, PTR_ERR(pwm->bus_clk),  in sun4i_pwm_probe()
436 	pwm->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);  in sun4i_pwm_probe()
437 	if (IS_ERR(pwm->rst))  in sun4i_pwm_probe()
438 		return dev_err_probe(&pdev->dev, PTR_ERR(pwm->rst),  in sun4i_pwm_probe()
442 	ret = reset_control_deassert(pwm->rst);  in sun4i_pwm_probe()
453 	ret = clk_prepare_enable(pwm->bus_clk);  in sun4i_pwm_probe()
460 	pwm->chip.dev = &pdev->dev;  in sun4i_pwm_probe()
461 	pwm->chip.ops = &sun4i_pwm_ops;  in sun4i_pwm_probe()
462 	pwm->chip.npwm = pwm->data->npwm;  in sun4i_pwm_probe()
464 	spin_lock_init(&pwm->ctrl_lock);  in sun4i_pwm_probe()
466 	ret = pwmchip_add(&pwm->chip);  in sun4i_pwm_probe()
468 		dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);  in sun4i_pwm_probe()
472 	platform_set_drvdata(pdev, pwm);  in sun4i_pwm_probe()
477 	clk_disable_unprepare(pwm->bus_clk);  in sun4i_pwm_probe()
479 	reset_control_assert(pwm->rst);  in sun4i_pwm_probe()
486 	struct sun4i_pwm_chip *pwm = platform_get_drvdata(pdev);  in sun4i_pwm_remove()  local
488 	pwmchip_remove(&pwm->chip);  in sun4i_pwm_remove()
490 	clk_disable_unprepare(pwm->bus_clk);  in sun4i_pwm_remove()
491 	reset_control_assert(pwm->rst);  in sun4i_pwm_remove()
498 		.name = "sun4i-pwm",
506 MODULE_ALIAS("platform:sun4i-pwm");
508 MODULE_DESCRIPTION("Allwinner sun4i PWM driver");