Lines Matching +full:stm32mp15 +full:- +full:fmc2
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/dma-mapping.h>
53 /* FMC2 Controller Registers */
281 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init()
283 struct stm32_fmc2_timings *timings = &nand->timings; in stm32_fmc2_nfc_timings_init()
287 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
289 FIELD_PREP(FMC2_PCR_TCLR, timings->tclr) | in stm32_fmc2_nfc_timings_init()
290 FIELD_PREP(FMC2_PCR_TAR, timings->tar)); in stm32_fmc2_nfc_timings_init()
293 pmem = FIELD_PREP(FMC2_PMEM_MEMSET, timings->tset_mem); in stm32_fmc2_nfc_timings_init()
294 pmem |= FIELD_PREP(FMC2_PMEM_MEMWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
295 pmem |= FIELD_PREP(FMC2_PMEM_MEMHOLD, timings->thold_mem); in stm32_fmc2_nfc_timings_init()
296 pmem |= FIELD_PREP(FMC2_PMEM_MEMHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
297 regmap_write(nfc->regmap, FMC2_PMEM, pmem); in stm32_fmc2_nfc_timings_init()
300 patt = FIELD_PREP(FMC2_PATT_ATTSET, timings->tset_att); in stm32_fmc2_nfc_timings_init()
301 patt |= FIELD_PREP(FMC2_PATT_ATTWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
302 patt |= FIELD_PREP(FMC2_PATT_ATTHOLD, timings->thold_att); in stm32_fmc2_nfc_timings_init()
303 patt |= FIELD_PREP(FMC2_PATT_ATTHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
304 regmap_write(nfc->regmap, FMC2_PATT, patt); in stm32_fmc2_nfc_timings_init()
309 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_setup()
315 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_setup()
318 } else if (chip->ecc.strength == FMC2_ECC_BCH4) { in stm32_fmc2_nfc_setup()
324 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_setup()
331 regmap_update_bits(nfc->regmap, FMC2_PCR, pcr_mask, pcr); in stm32_fmc2_nfc_setup()
336 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_select_chip()
341 if (nand->cs_used[chipnr] == nfc->cs_sel) in stm32_fmc2_nfc_select_chip()
344 nfc->cs_sel = nand->cs_used[chipnr]; in stm32_fmc2_nfc_select_chip()
348 if (nfc->dma_tx_ch && nfc->dma_rx_ch) { in stm32_fmc2_nfc_select_chip()
350 dma_cfg.src_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
351 dma_cfg.dst_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
357 ret = dmaengine_slave_config(nfc->dma_tx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
359 dev_err(nfc->dev, "tx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
363 ret = dmaengine_slave_config(nfc->dma_rx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
365 dev_err(nfc->dev, "rx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
370 if (nfc->dma_ecc_ch) { in stm32_fmc2_nfc_select_chip()
376 dma_cfg.src_addr = nfc->io_phys_addr; in stm32_fmc2_nfc_select_chip()
377 dma_cfg.src_addr += chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
381 ret = dmaengine_slave_config(nfc->dma_ecc_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
383 dev_err(nfc->dev, "ECC DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
388 nfc->dma_ecc_len = chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
402 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_PWID, pcr); in stm32_fmc2_nfc_set_buswidth_16()
407 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_ECCEN, in stm32_fmc2_nfc_set_ecc()
413 nfc->irq_state = FMC2_IRQ_SEQ; in stm32_fmc2_nfc_enable_seq_irq()
415 regmap_update_bits(nfc->regmap, FMC2_CSQIER, in stm32_fmc2_nfc_enable_seq_irq()
421 regmap_update_bits(nfc->regmap, FMC2_CSQIER, FMC2_CSQIER_TCIE, 0); in stm32_fmc2_nfc_disable_seq_irq()
423 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_seq_irq()
428 regmap_write(nfc->regmap, FMC2_CSQICR, FMC2_CSQICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_seq_irq()
433 nfc->irq_state = FMC2_IRQ_BCH; in stm32_fmc2_nfc_enable_bch_irq()
436 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
439 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
445 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_disable_bch_irq()
448 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_bch_irq()
453 regmap_write(nfc->regmap, FMC2_BCHICR, FMC2_BCHICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_bch_irq()
462 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_hwctl()
466 if (chip->ecc.strength != FMC2_ECC_HAM) { in stm32_fmc2_nfc_hwctl()
467 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_hwctl()
470 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_hwctl()
481 * max of 1-bit)
493 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_ham_calculate()
497 ret = regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_ham_calculate()
501 dev_err(nfc->dev, "ham timeout\n"); in stm32_fmc2_nfc_ham_calculate()
505 regmap_read(nfc->regmap, FMC2_HECCR, &heccr); in stm32_fmc2_nfc_ham_calculate()
538 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
554 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
569 * max of 4-bit/8-bit)
574 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_calculate()
578 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_calculate()
580 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_calculate()
582 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_calculate()
586 regmap_read(nfc->regmap, FMC2_BCHPBR1, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
592 regmap_read(nfc->regmap, FMC2_BCHPBR2, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
597 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_bch_calculate()
600 regmap_read(nfc->regmap, FMC2_BCHPBR3, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
606 regmap_read(nfc->regmap, FMC2_BCHPBR4, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
632 return -EBADMSG; in stm32_fmc2_nfc_bch_decode()
657 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_correct()
661 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_correct()
663 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_correct()
665 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_correct()
668 regmap_bulk_read(nfc->regmap, FMC2_BCHDSR0, ecc_sta, 5); in stm32_fmc2_nfc_bch_correct()
672 return stm32_fmc2_nfc_bch_decode(chip->ecc.size, dat, ecc_sta); in stm32_fmc2_nfc_bch_correct()
679 int ret, i, s, stat, eccsize = chip->ecc.size; in stm32_fmc2_nfc_read_page()
680 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_read_page()
681 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_read_page()
682 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_read_page()
684 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_read_page()
685 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_read_page()
692 for (i = mtd->writesize + FMC2_BBM_LEN, s = 0; s < eccsteps; in stm32_fmc2_nfc_read_page()
694 chip->ecc.hwctl(chip, NAND_ECC_READ); in stm32_fmc2_nfc_read_page()
709 stat = chip->ecc.correct(chip, p, ecc_code, ecc_calc); in stm32_fmc2_nfc_read_page()
710 if (stat == -EBADMSG) in stm32_fmc2_nfc_read_page()
718 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_read_page()
720 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_read_page()
727 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_read_page()
728 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_read_page()
741 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_rw_page_init()
743 u32 ecc_offset = mtd->writesize + FMC2_BBM_LEN; in stm32_fmc2_nfc_rw_page_init()
750 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_rw_page_init()
754 * - Set Program Page/Page Read command in stm32_fmc2_nfc_rw_page_init()
755 * - Enable DMA request data in stm32_fmc2_nfc_rw_page_init()
756 * - Set timings in stm32_fmc2_nfc_rw_page_init()
768 * - Set Random Data Input/Random Data Read command in stm32_fmc2_nfc_rw_page_init()
769 * - Enable the sequencer to access the Spare data area in stm32_fmc2_nfc_rw_page_init()
770 * - Enable DMA request status decoding for read in stm32_fmc2_nfc_rw_page_init()
771 * - Set timings in stm32_fmc2_nfc_rw_page_init()
787 * - Set the number of sectors to be written in stm32_fmc2_nfc_rw_page_init()
788 * - Set timings in stm32_fmc2_nfc_rw_page_init()
790 cfg[2] = FIELD_PREP(FMC2_CSQCFGR3_SNBR, chip->ecc.steps - 1); in stm32_fmc2_nfc_rw_page_init()
793 if (chip->options & NAND_ROW_ADDR_3) in stm32_fmc2_nfc_rw_page_init()
808 * - Set chip enable number in stm32_fmc2_nfc_rw_page_init()
809 * - Set ECC byte offset in the spare area in stm32_fmc2_nfc_rw_page_init()
810 * - Calculate the number of address cycles to be issued in stm32_fmc2_nfc_rw_page_init()
811 * - Set byte 5 of address cycle if needed in stm32_fmc2_nfc_rw_page_init()
813 cfg[4] = FIELD_PREP(FMC2_CSQCAR2_NANDCEN, nfc->cs_sel); in stm32_fmc2_nfc_rw_page_init()
814 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_rw_page_init()
818 if (chip->options & NAND_ROW_ADDR_3) { in stm32_fmc2_nfc_rw_page_init()
825 regmap_bulk_write(nfc->regmap, FMC2_CSQCFGR1, cfg, 5); in stm32_fmc2_nfc_rw_page_init()
837 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_xfer()
840 struct dma_chan *dma_ch = nfc->dma_rx_ch; in stm32_fmc2_nfc_xfer()
843 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_xfer()
844 int eccsize = chip->ecc.size; in stm32_fmc2_nfc_xfer()
853 dma_ch = nfc->dma_tx_ch; in stm32_fmc2_nfc_xfer()
856 for_each_sg(nfc->dma_data_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
861 ret = dma_map_sg(nfc->dev, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
866 desc_data = dmaengine_prep_slave_sg(dma_ch, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
870 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
874 reinit_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_xfer()
875 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_xfer()
876 desc_data->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
877 desc_data->callback_param = &nfc->dma_data_complete; in stm32_fmc2_nfc_xfer()
886 p = nfc->ecc_buf; in stm32_fmc2_nfc_xfer()
887 for_each_sg(nfc->dma_ecc_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
888 sg_set_buf(sg, p, nfc->dma_ecc_len); in stm32_fmc2_nfc_xfer()
889 p += nfc->dma_ecc_len; in stm32_fmc2_nfc_xfer()
892 ret = dma_map_sg(nfc->dev, nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
897 desc_ecc = dmaengine_prep_slave_sg(nfc->dma_ecc_ch, in stm32_fmc2_nfc_xfer()
898 nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
902 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
906 reinit_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_xfer()
907 desc_ecc->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
908 desc_ecc->callback_param = &nfc->dma_ecc_complete; in stm32_fmc2_nfc_xfer()
913 dma_async_issue_pending(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
920 regmap_update_bits(nfc->regmap, FMC2_CSQCR, in stm32_fmc2_nfc_xfer()
924 if (!wait_for_completion_timeout(&nfc->complete, timeout)) { in stm32_fmc2_nfc_xfer()
925 dev_err(nfc->dev, "seq timeout\n"); in stm32_fmc2_nfc_xfer()
929 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
930 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
935 if (!wait_for_completion_timeout(&nfc->dma_data_complete, timeout)) { in stm32_fmc2_nfc_xfer()
936 dev_err(nfc->dev, "data DMA timeout\n"); in stm32_fmc2_nfc_xfer()
938 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
943 if (!wait_for_completion_timeout(&nfc->dma_ecc_complete, in stm32_fmc2_nfc_xfer()
945 dev_err(nfc->dev, "ECC DMA timeout\n"); in stm32_fmc2_nfc_xfer()
946 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
947 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
953 dma_unmap_sg(nfc->dev, nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
957 dma_unmap_sg(nfc->dev, nfc->dma_data_sg.sgl, eccsteps, dma_data_dir); in stm32_fmc2_nfc_xfer()
978 ret = nand_change_write_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_write()
979 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_write()
993 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page()
1006 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page_raw()
1018 regmap_read(nfc->regmap, FMC2_CSQEMSR, &csqemsr); in stm32_fmc2_nfc_get_mapping_status()
1027 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_correct()
1028 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_seq_correct()
1029 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_seq_correct()
1030 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_seq_correct()
1031 int i, s, eccsize = chip->ecc.size; in stm32_fmc2_nfc_seq_correct()
1032 u32 *ecc_sta = (u32 *)nfc->ecc_buf; in stm32_fmc2_nfc_seq_correct()
1063 if (stat == -EBADMSG) in stm32_fmc2_nfc_seq_correct()
1072 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_seq_correct()
1074 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_seq_correct()
1086 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_read_page()
1087 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_seq_read_page()
1088 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_seq_read_page()
1092 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page()
1109 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1110 chip->oob_poi, in stm32_fmc2_nfc_seq_read_page()
1111 mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1117 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1118 chip->oob_poi, mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1122 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in stm32_fmc2_nfc_seq_read_page()
1123 chip->ecc.total); in stm32_fmc2_nfc_seq_read_page()
1128 return chip->ecc.correct(chip, buf, ecc_code, ecc_calc); in stm32_fmc2_nfc_seq_read_page()
1137 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page_raw()
1151 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page_raw()
1152 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_read_page_raw()
1162 if (nfc->irq_state == FMC2_IRQ_SEQ) in stm32_fmc2_nfc_irq()
1165 else if (nfc->irq_state == FMC2_IRQ_BCH) in stm32_fmc2_nfc_irq()
1169 complete(&nfc->complete); in stm32_fmc2_nfc_irq()
1177 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_read_data()
1178 void __iomem *io_addr_r = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_read_data()
1180 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1181 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_read_data()
1188 len -= sizeof(u8); in stm32_fmc2_nfc_read_data()
1195 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1203 len -= sizeof(u32); in stm32_fmc2_nfc_read_data()
1210 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1216 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1217 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_read_data()
1224 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_write_data()
1225 void __iomem *io_addr_w = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_write_data()
1227 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1228 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_write_data()
1235 len -= sizeof(u8); in stm32_fmc2_nfc_write_data()
1242 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1250 len -= sizeof(u32); in stm32_fmc2_nfc_write_data()
1257 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1263 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1264 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_write_data()
1271 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_waitrdy()
1276 if (regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_waitrdy()
1279 dev_warn(nfc->dev, "Waitrdy timeout\n"); in stm32_fmc2_nfc_waitrdy()
1283 ndelay(PSEC_TO_NSEC(timings->tWB_max)); in stm32_fmc2_nfc_waitrdy()
1286 regmap_write(nfc->regmap, FMC2_ICR, FMC2_ICR_CIHLF); in stm32_fmc2_nfc_waitrdy()
1289 return regmap_read_poll_timeout(nfc->regmap, FMC2_ISR, isr, in stm32_fmc2_nfc_waitrdy()
1298 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_exec_op()
1306 ret = stm32_fmc2_nfc_select_chip(chip, op->cs); in stm32_fmc2_nfc_exec_op()
1310 for (op_id = 0; op_id < op->ninstrs; op_id++) { in stm32_fmc2_nfc_exec_op()
1311 instr = &op->instrs[op_id]; in stm32_fmc2_nfc_exec_op()
1313 switch (instr->type) { in stm32_fmc2_nfc_exec_op()
1315 writeb_relaxed(instr->ctx.cmd.opcode, in stm32_fmc2_nfc_exec_op()
1316 nfc->cmd_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1320 for (i = 0; i < instr->ctx.addr.naddrs; i++) in stm32_fmc2_nfc_exec_op()
1321 writeb_relaxed(instr->ctx.addr.addrs[i], in stm32_fmc2_nfc_exec_op()
1322 nfc->addr_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1326 stm32_fmc2_nfc_read_data(chip, instr->ctx.data.buf.in, in stm32_fmc2_nfc_exec_op()
1327 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1328 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1332 stm32_fmc2_nfc_write_data(chip, instr->ctx.data.buf.out, in stm32_fmc2_nfc_exec_op()
1333 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1334 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1338 timeout = instr->ctx.waitrdy.timeout_ms; in stm32_fmc2_nfc_exec_op()
1351 regmap_read(nfc->regmap, FMC2_PCR, &pcr); in stm32_fmc2_nfc_init()
1354 nfc->cs_sel = -1; in stm32_fmc2_nfc_init()
1381 /* Enable FMC2 controller */ in stm32_fmc2_nfc_init()
1382 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_init()
1383 regmap_update_bits(nfc->regmap, FMC2_BCR1, in stm32_fmc2_nfc_init()
1386 regmap_write(nfc->regmap, FMC2_PCR, pcr); in stm32_fmc2_nfc_init()
1387 regmap_write(nfc->regmap, FMC2_PMEM, FMC2_PMEM_DEFAULT); in stm32_fmc2_nfc_init()
1388 regmap_write(nfc->regmap, FMC2_PATT, FMC2_PATT_DEFAULT); in stm32_fmc2_nfc_init()
1394 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_calc_timings()
1396 struct stm32_fmc2_timings *tims = &nand->timings; in stm32_fmc2_nfc_calc_timings()
1397 unsigned long hclk = clk_get_rate(nfc->clk); in stm32_fmc2_nfc_calc_timings()
1402 tar = max_t(unsigned long, hclkp, sdrt->tAR_min); in stm32_fmc2_nfc_calc_timings()
1403 timing = DIV_ROUND_UP(tar, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1404 tims->tar = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1406 tclr = max_t(unsigned long, hclkp, sdrt->tCLR_min); in stm32_fmc2_nfc_calc_timings()
1407 timing = DIV_ROUND_UP(tclr, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1408 tims->tclr = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1410 tims->thiz = FMC2_THIZ; in stm32_fmc2_nfc_calc_timings()
1411 thiz = (tims->thiz + 1) * hclkp; in stm32_fmc2_nfc_calc_timings()
1418 twait = max_t(unsigned long, hclkp, sdrt->tRP_min); in stm32_fmc2_nfc_calc_timings()
1419 twait = max_t(unsigned long, twait, sdrt->tWP_min); in stm32_fmc2_nfc_calc_timings()
1420 twait = max_t(unsigned long, twait, sdrt->tREA_max + FMC2_TIO); in stm32_fmc2_nfc_calc_timings()
1422 tims->twait = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1425 * tSETUP_MEM > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1426 * tSETUP_MEM > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1427 * tSETUP_MEM > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1430 if (sdrt->tCS_min > twait && (tset_mem < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1431 tset_mem = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1432 if (sdrt->tALS_min > twait && (tset_mem < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1433 tset_mem = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1434 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1435 (tset_mem < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1436 tset_mem = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1438 tims->tset_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1442 * tHOLD_MEM > tREH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1443 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT) in stm32_fmc2_nfc_calc_timings()
1445 thold_mem = max_t(unsigned long, hclkp, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1446 if (sdrt->tREH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1447 (thold_mem < sdrt->tREH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1448 thold_mem = sdrt->tREH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1449 if ((sdrt->tRC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1450 (thold_mem < sdrt->tRC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1451 thold_mem = sdrt->tRC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1452 if ((sdrt->tWC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1453 (thold_mem < sdrt->tWC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1454 thold_mem = sdrt->tWC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1456 tims->thold_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1459 * tSETUP_ATT > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1460 * tSETUP_ATT > tCLS - tWAIT in stm32_fmc2_nfc_calc_timings()
1461 * tSETUP_ATT > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1462 * tSETUP_ATT > tRHW - tHOLD_MEM in stm32_fmc2_nfc_calc_timings()
1463 * tSETUP_ATT > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1466 if (sdrt->tCS_min > twait && (tset_att < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1467 tset_att = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1468 if (sdrt->tCLS_min > twait && (tset_att < sdrt->tCLS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1469 tset_att = sdrt->tCLS_min - twait; in stm32_fmc2_nfc_calc_timings()
1470 if (sdrt->tALS_min > twait && (tset_att < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1471 tset_att = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1472 if (sdrt->tRHW_min > thold_mem && in stm32_fmc2_nfc_calc_timings()
1473 (tset_att < sdrt->tRHW_min - thold_mem)) in stm32_fmc2_nfc_calc_timings()
1474 tset_att = sdrt->tRHW_min - thold_mem; in stm32_fmc2_nfc_calc_timings()
1475 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1476 (tset_att < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1477 tset_att = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1479 tims->tset_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1487 * tHOLD_ATT > tWB + tIO + tSYNC - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1488 * tHOLD_ATT > tADL - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1489 * tHOLD_ATT > tWH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1490 * tHOLD_ATT > tWHR - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1491 * tHOLD_ATT > tRC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1492 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1494 thold_att = max_t(unsigned long, hclkp, sdrt->tALH_min); in stm32_fmc2_nfc_calc_timings()
1495 thold_att = max_t(unsigned long, thold_att, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1496 thold_att = max_t(unsigned long, thold_att, sdrt->tCLH_min); in stm32_fmc2_nfc_calc_timings()
1497 thold_att = max_t(unsigned long, thold_att, sdrt->tCOH_min); in stm32_fmc2_nfc_calc_timings()
1498 thold_att = max_t(unsigned long, thold_att, sdrt->tDH_min); in stm32_fmc2_nfc_calc_timings()
1499 if ((sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC > tset_mem) && in stm32_fmc2_nfc_calc_timings()
1500 (thold_att < sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1501 thold_att = sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem; in stm32_fmc2_nfc_calc_timings()
1502 if (sdrt->tADL_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1503 (thold_att < sdrt->tADL_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1504 thold_att = sdrt->tADL_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1505 if (sdrt->tWH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1506 (thold_att < sdrt->tWH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1507 thold_att = sdrt->tWH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1508 if (sdrt->tWHR_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1509 (thold_att < sdrt->tWHR_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1510 thold_att = sdrt->tWHR_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1511 if ((sdrt->tRC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1512 (thold_att < sdrt->tRC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1513 thold_att = sdrt->tRC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1514 if ((sdrt->tWC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1515 (thold_att < sdrt->tWC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1516 thold_att = sdrt->tWC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1518 tims->thold_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1543 nfc->dma_tx_ch = dma_request_chan(nfc->dev, "tx"); in stm32_fmc2_nfc_dma_setup()
1544 if (IS_ERR(nfc->dma_tx_ch)) { in stm32_fmc2_nfc_dma_setup()
1545 ret = PTR_ERR(nfc->dma_tx_ch); in stm32_fmc2_nfc_dma_setup()
1546 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1547 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1549 nfc->dma_tx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1553 nfc->dma_rx_ch = dma_request_chan(nfc->dev, "rx"); in stm32_fmc2_nfc_dma_setup()
1554 if (IS_ERR(nfc->dma_rx_ch)) { in stm32_fmc2_nfc_dma_setup()
1555 ret = PTR_ERR(nfc->dma_rx_ch); in stm32_fmc2_nfc_dma_setup()
1556 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1557 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1559 nfc->dma_rx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1563 nfc->dma_ecc_ch = dma_request_chan(nfc->dev, "ecc"); in stm32_fmc2_nfc_dma_setup()
1564 if (IS_ERR(nfc->dma_ecc_ch)) { in stm32_fmc2_nfc_dma_setup()
1565 ret = PTR_ERR(nfc->dma_ecc_ch); in stm32_fmc2_nfc_dma_setup()
1566 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1567 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1569 nfc->dma_ecc_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1573 ret = sg_alloc_table(&nfc->dma_ecc_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1578 nfc->ecc_buf = devm_kzalloc(nfc->dev, FMC2_MAX_ECC_BUF_LEN, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1579 if (!nfc->ecc_buf) in stm32_fmc2_nfc_dma_setup()
1580 return -ENOMEM; in stm32_fmc2_nfc_dma_setup()
1582 ret = sg_alloc_table(&nfc->dma_data_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1586 init_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_dma_setup()
1587 init_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_dma_setup()
1592 if (ret == -ENODEV) { in stm32_fmc2_nfc_dma_setup()
1593 dev_warn(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1603 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_nand_callbacks_setup()
1609 if (nfc->dma_tx_ch && nfc->dma_rx_ch && nfc->dma_ecc_ch) { in stm32_fmc2_nfc_nand_callbacks_setup()
1611 chip->ecc.correct = stm32_fmc2_nfc_seq_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1612 chip->ecc.write_page = stm32_fmc2_nfc_seq_write_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1613 chip->ecc.read_page = stm32_fmc2_nfc_seq_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1614 chip->ecc.write_page_raw = stm32_fmc2_nfc_seq_write_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1615 chip->ecc.read_page_raw = stm32_fmc2_nfc_seq_read_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1618 chip->ecc.hwctl = stm32_fmc2_nfc_hwctl; in stm32_fmc2_nfc_nand_callbacks_setup()
1619 if (chip->ecc.strength == FMC2_ECC_HAM) { in stm32_fmc2_nfc_nand_callbacks_setup()
1621 chip->ecc.calculate = stm32_fmc2_nfc_ham_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1622 chip->ecc.correct = stm32_fmc2_nfc_ham_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1623 chip->ecc.options |= NAND_ECC_GENERIC_ERASED_CHECK; in stm32_fmc2_nfc_nand_callbacks_setup()
1626 chip->ecc.calculate = stm32_fmc2_nfc_bch_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1627 chip->ecc.correct = stm32_fmc2_nfc_bch_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1628 chip->ecc.read_page = stm32_fmc2_nfc_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1633 if (chip->ecc.strength == FMC2_ECC_HAM) in stm32_fmc2_nfc_nand_callbacks_setup()
1634 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 4 : 3; in stm32_fmc2_nfc_nand_callbacks_setup()
1635 else if (chip->ecc.strength == FMC2_ECC_BCH8) in stm32_fmc2_nfc_nand_callbacks_setup()
1636 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 14 : 13; in stm32_fmc2_nfc_nand_callbacks_setup()
1638 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 8 : 7; in stm32_fmc2_nfc_nand_callbacks_setup()
1645 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_ecc()
1648 return -ERANGE; in stm32_fmc2_nfc_ooblayout_ecc()
1650 oobregion->length = ecc->total; in stm32_fmc2_nfc_ooblayout_ecc()
1651 oobregion->offset = FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_ecc()
1660 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_free()
1663 return -ERANGE; in stm32_fmc2_nfc_ooblayout_free()
1665 oobregion->length = mtd->oobsize - ecc->total - FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1666 oobregion->offset = ecc->total + FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1696 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_attach_chip()
1707 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) { in stm32_fmc2_nfc_attach_chip()
1708 dev_err(nfc->dev, in stm32_fmc2_nfc_attach_chip()
1710 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1714 if (!chip->ecc.size) in stm32_fmc2_nfc_attach_chip()
1715 chip->ecc.size = FMC2_ECC_STEP_SIZE; in stm32_fmc2_nfc_attach_chip()
1717 if (!chip->ecc.strength) in stm32_fmc2_nfc_attach_chip()
1718 chip->ecc.strength = FMC2_ECC_BCH8; in stm32_fmc2_nfc_attach_chip()
1721 mtd->oobsize - FMC2_BBM_LEN); in stm32_fmc2_nfc_attach_chip()
1723 dev_err(nfc->dev, "no valid ECC settings set\n"); in stm32_fmc2_nfc_attach_chip()
1727 if (mtd->writesize / chip->ecc.size > FMC2_MAX_SG) { in stm32_fmc2_nfc_attach_chip()
1728 dev_err(nfc->dev, "nand page size is not supported\n"); in stm32_fmc2_nfc_attach_chip()
1729 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1732 if (chip->bbt_options & NAND_BBT_USE_FLASH) in stm32_fmc2_nfc_attach_chip()
1733 chip->bbt_options |= NAND_BBT_NO_OOB; in stm32_fmc2_nfc_attach_chip()
1753 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_parse_child()
1757 if (!of_get_property(dn, "reg", &nand->ncs)) in stm32_fmc2_nfc_parse_child()
1758 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1760 nand->ncs /= sizeof(u32); in stm32_fmc2_nfc_parse_child()
1761 if (!nand->ncs) { in stm32_fmc2_nfc_parse_child()
1762 dev_err(nfc->dev, "invalid reg property size\n"); in stm32_fmc2_nfc_parse_child()
1763 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1766 for (i = 0; i < nand->ncs; i++) { in stm32_fmc2_nfc_parse_child()
1769 dev_err(nfc->dev, "could not retrieve reg property: %d\n", in stm32_fmc2_nfc_parse_child()
1775 dev_err(nfc->dev, "invalid reg value: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1776 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1779 if (nfc->cs_assigned & BIT(cs)) { in stm32_fmc2_nfc_parse_child()
1780 dev_err(nfc->dev, "cs already assigned: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1781 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1784 nfc->cs_assigned |= BIT(cs); in stm32_fmc2_nfc_parse_child()
1785 nand->cs_used[i] = cs; in stm32_fmc2_nfc_parse_child()
1788 nand_set_flash_node(&nand->chip, dn); in stm32_fmc2_nfc_parse_child()
1795 struct device_node *dn = nfc->dev->of_node; in stm32_fmc2_nfc_parse_dt()
1801 dev_err(nfc->dev, "NAND chip not defined\n"); in stm32_fmc2_nfc_parse_dt()
1802 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1806 dev_err(nfc->dev, "too many NAND chips defined\n"); in stm32_fmc2_nfc_parse_dt()
1807 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1823 struct device *dev = nfc->dev; in stm32_fmc2_nfc_set_cdev()
1826 if (dev->parent && of_device_is_compatible(dev->parent->of_node, in stm32_fmc2_nfc_set_cdev()
1827 "st,stm32mp1-fmc2-ebi")) in stm32_fmc2_nfc_set_cdev()
1830 if (of_device_is_compatible(dev->of_node, "st,stm32mp1-fmc2-nfc")) { in stm32_fmc2_nfc_set_cdev()
1832 nfc->cdev = dev->parent; in stm32_fmc2_nfc_set_cdev()
1837 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1841 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1843 nfc->cdev = dev; in stm32_fmc2_nfc_set_cdev()
1850 struct device *dev = &pdev->dev; in stm32_fmc2_nfc_probe()
1863 return -ENOMEM; in stm32_fmc2_nfc_probe()
1865 nfc->dev = dev; in stm32_fmc2_nfc_probe()
1866 nand_controller_init(&nfc->base); in stm32_fmc2_nfc_probe()
1867 nfc->base.ops = &stm32_fmc2_nfc_controller_ops; in stm32_fmc2_nfc_probe()
1877 ret = of_address_to_resource(nfc->cdev->of_node, 0, &cres); in stm32_fmc2_nfc_probe()
1881 nfc->io_phys_addr = cres.start; in stm32_fmc2_nfc_probe()
1883 nfc->regmap = device_node_to_regmap(nfc->cdev->of_node); in stm32_fmc2_nfc_probe()
1884 if (IS_ERR(nfc->regmap)) in stm32_fmc2_nfc_probe()
1885 return PTR_ERR(nfc->regmap); in stm32_fmc2_nfc_probe()
1887 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_probe()
1892 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_probe()
1896 nfc->data_base[chip_cs] = devm_ioremap_resource(dev, res); in stm32_fmc2_nfc_probe()
1897 if (IS_ERR(nfc->data_base[chip_cs])) in stm32_fmc2_nfc_probe()
1898 return PTR_ERR(nfc->data_base[chip_cs]); in stm32_fmc2_nfc_probe()
1900 nfc->data_phys_addr[chip_cs] = res->start; in stm32_fmc2_nfc_probe()
1904 nfc->cmd_base[chip_cs] = devm_ioremap_resource(dev, res); in stm32_fmc2_nfc_probe()
1905 if (IS_ERR(nfc->cmd_base[chip_cs])) in stm32_fmc2_nfc_probe()
1906 return PTR_ERR(nfc->cmd_base[chip_cs]); in stm32_fmc2_nfc_probe()
1910 nfc->addr_base[chip_cs] = devm_ioremap_resource(dev, res); in stm32_fmc2_nfc_probe()
1911 if (IS_ERR(nfc->addr_base[chip_cs])) in stm32_fmc2_nfc_probe()
1912 return PTR_ERR(nfc->addr_base[chip_cs]); in stm32_fmc2_nfc_probe()
1926 init_completion(&nfc->complete); in stm32_fmc2_nfc_probe()
1928 nfc->clk = devm_clk_get(nfc->cdev, NULL); in stm32_fmc2_nfc_probe()
1929 if (IS_ERR(nfc->clk)) in stm32_fmc2_nfc_probe()
1930 return PTR_ERR(nfc->clk); in stm32_fmc2_nfc_probe()
1932 ret = clk_prepare_enable(nfc->clk); in stm32_fmc2_nfc_probe()
1941 if (ret == -EPROBE_DEFER) in stm32_fmc2_nfc_probe()
1954 nand = &nfc->nand; in stm32_fmc2_nfc_probe()
1955 chip = &nand->chip; in stm32_fmc2_nfc_probe()
1957 mtd->dev.parent = dev; in stm32_fmc2_nfc_probe()
1959 chip->controller = &nfc->base; in stm32_fmc2_nfc_probe()
1960 chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE | in stm32_fmc2_nfc_probe()
1964 ret = nand_scan(chip, nand->ncs); in stm32_fmc2_nfc_probe()
1980 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_probe()
1981 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_probe()
1982 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_probe()
1983 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_probe()
1984 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_probe()
1985 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_probe()
1987 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_probe()
1988 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_probe()
1991 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_probe()
1999 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_remove()
2000 struct nand_chip *chip = &nand->chip; in stm32_fmc2_nfc_remove()
2007 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_remove()
2008 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_remove()
2009 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_remove()
2010 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_remove()
2011 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_remove()
2012 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_remove()
2014 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_remove()
2015 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_remove()
2017 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_remove()
2026 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_suspend()
2036 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_resume()
2041 ret = clk_prepare_enable(nfc->clk); in stm32_fmc2_nfc_resume()
2050 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_resume()
2053 nand_reset(&nand->chip, chip_cs); in stm32_fmc2_nfc_resume()
2063 {.compatible = "st,stm32mp15-fmc2"},
2064 {.compatible = "st,stm32mp1-fmc2-nfc"},
2082 MODULE_DESCRIPTION("STMicroelectronics STM32 FMC2 NFC driver");