Lines Matching +full:vm +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved.
14 #include <linux/dma-iommu.h>
34 #include <linux/irqchip/arm-gic-v3.h>
35 #include <linux/irqchip/arm-gic-v4.h>
40 #include "irq-gic-common.h"
63 * Collection structure - just an ID, and a redistributor address to
73 * The ITS_BASER structure - contains memory information, cached
86 * The ITS structure - contains most of the infrastructure, with the
87 * top-level MSI domain, the command queue, the collections, and the
120 #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS))
121 #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP))
122 #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1)
130 if (gic_rdists->has_rvpeid && \
131 gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \
132 nvpeid = 1 + (gic_rdists->gicd_typer2 & \
148 struct its_vm *vm; member
154 * The ITS view of a device - belongs to an ITS, owns an interrupt
156 * LPIs are injected into a guest (GICv4), the event_map.vm field
194 #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist))
195 #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu))
196 #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base)
203 static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) in require_its_list_vmovp() argument
205 return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); in require_its_list_vmovp()
208 static u16 get_its_list(struct its_vm *vm) in get_its_list() argument
217 if (require_its_list_vmovp(vm, its)) in get_its_list()
218 __set_bit(its->list_nr, &its_list); in get_its_list()
227 return d->hwirq - its_dev->event_map.lpi_base; in its_get_event_id()
233 struct its_node *its = its_dev->its; in dev_event_to_col()
235 return its->collections + its_dev->event_map.col_map[event]; in dev_event_to_col()
241 if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) in dev_event_to_vlpi_map()
244 return &its_dev->event_map.vlpi_maps[event]; in dev_event_to_vlpi_map()
261 raw_spin_lock_irqsave(&vpe->vpe_lock, *flags); in vpe_to_cpuid_lock()
262 return vpe->col_idx; in vpe_to_cpuid_lock()
267 raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); in vpe_to_cpuid_unlock()
272 struct its_vlpi_map *map = get_vlpi_map(d); in irq_to_cpuid_lock() local
275 if (map) { in irq_to_cpuid_lock()
276 cpu = vpe_to_cpuid_lock(map->vpe, flags); in irq_to_cpuid_lock()
280 cpu = its_dev->event_map.col_map[its_get_event_id(d)]; in irq_to_cpuid_lock()
290 struct its_vlpi_map *map = get_vlpi_map(d); in irq_to_cpuid_unlock() local
292 if (map) in irq_to_cpuid_unlock()
293 vpe_to_cpuid_unlock(map->vpe, flags); in irq_to_cpuid_unlock()
298 if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) in valid_col()
306 if (valid_col(its->collections + vpe->col_idx)) in valid_vpe()
313 * ITS command descriptors - parameters to be encoded in a command
441 its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); in its_encode_cmd()
446 its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); in its_encode_devid()
451 its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); in its_encode_event_id()
456 its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); in its_encode_phys_id()
461 its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); in its_encode_size()
466 its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); in its_encode_itt()
471 its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); in its_encode_valid()
476 its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); in its_encode_target()
481 its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); in its_encode_collection()
486 its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); in its_encode_vpeid()
491 its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); in its_encode_virt_id()
496 its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); in its_encode_db_phys_id()
501 its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); in its_encode_db_valid()
506 its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); in its_encode_seq_num()
511 its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); in its_encode_its_list()
516 its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); in its_encode_vpt_addr()
521 its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); in its_encode_vpt_size()
526 its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); in its_encode_vconf_addr()
531 its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); in its_encode_alloc()
536 its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); in its_encode_ptz()
542 its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); in its_encode_vmapp_default_db()
548 its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); in its_encode_vmovp_default_db()
553 its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); in its_encode_db()
558 its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32); in its_encode_sgi_intid()
563 its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20); in its_encode_sgi_priority()
568 its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10); in its_encode_sgi_group()
573 its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9); in its_encode_sgi_clear()
578 its_mask_encode(&cmd->raw_cmd[0], en, 8, 8); in its_encode_sgi_enable()
584 cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); in its_fixup_cmd()
585 cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); in its_fixup_cmd()
586 cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); in its_fixup_cmd()
587 cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); in its_fixup_cmd()
595 u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); in its_build_mapd_cmd()
597 itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); in its_build_mapd_cmd()
601 its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); in its_build_mapd_cmd()
602 its_encode_size(cmd, size - 1); in its_build_mapd_cmd()
604 its_encode_valid(cmd, desc->its_mapd_cmd.valid); in its_build_mapd_cmd()
616 its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); in its_build_mapc_cmd()
617 its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); in its_build_mapc_cmd()
618 its_encode_valid(cmd, desc->its_mapc_cmd.valid); in its_build_mapc_cmd()
622 return desc->its_mapc_cmd.col; in its_build_mapc_cmd()
631 col = dev_event_to_col(desc->its_mapti_cmd.dev, in its_build_mapti_cmd()
632 desc->its_mapti_cmd.event_id); in its_build_mapti_cmd()
635 its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); in its_build_mapti_cmd()
636 its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); in its_build_mapti_cmd()
637 its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); in its_build_mapti_cmd()
638 its_encode_collection(cmd, col->col_id); in its_build_mapti_cmd()
651 col = dev_event_to_col(desc->its_movi_cmd.dev, in its_build_movi_cmd()
652 desc->its_movi_cmd.event_id); in its_build_movi_cmd()
655 its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); in its_build_movi_cmd()
656 its_encode_event_id(cmd, desc->its_movi_cmd.event_id); in its_build_movi_cmd()
657 its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); in its_build_movi_cmd()
670 col = dev_event_to_col(desc->its_discard_cmd.dev, in its_build_discard_cmd()
671 desc->its_discard_cmd.event_id); in its_build_discard_cmd()
674 its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); in its_build_discard_cmd()
675 its_encode_event_id(cmd, desc->its_discard_cmd.event_id); in its_build_discard_cmd()
688 col = dev_event_to_col(desc->its_inv_cmd.dev, in its_build_inv_cmd()
689 desc->its_inv_cmd.event_id); in its_build_inv_cmd()
692 its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); in its_build_inv_cmd()
693 its_encode_event_id(cmd, desc->its_inv_cmd.event_id); in its_build_inv_cmd()
706 col = dev_event_to_col(desc->its_int_cmd.dev, in its_build_int_cmd()
707 desc->its_int_cmd.event_id); in its_build_int_cmd()
710 its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); in its_build_int_cmd()
711 its_encode_event_id(cmd, desc->its_int_cmd.event_id); in its_build_int_cmd()
724 col = dev_event_to_col(desc->its_clear_cmd.dev, in its_build_clear_cmd()
725 desc->its_clear_cmd.event_id); in its_build_clear_cmd()
728 its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); in its_build_clear_cmd()
729 its_encode_event_id(cmd, desc->its_clear_cmd.event_id); in its_build_clear_cmd()
741 its_encode_collection(cmd, desc->its_invall_cmd.col->col_id); in its_build_invall_cmd()
753 its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); in its_build_vinvall_cmd()
757 return valid_vpe(its, desc->its_vinvall_cmd.vpe); in its_build_vinvall_cmd()
769 its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); in its_build_vmapp_cmd()
770 its_encode_valid(cmd, desc->its_vmapp_cmd.valid); in its_build_vmapp_cmd()
772 if (!desc->its_vmapp_cmd.valid) { in its_build_vmapp_cmd()
774 alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); in its_build_vmapp_cmd()
781 vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); in its_build_vmapp_cmd()
782 target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmapp_cmd()
786 its_encode_vpt_size(cmd, LPI_NRBITS - 1); in its_build_vmapp_cmd()
791 vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); in its_build_vmapp_cmd()
793 alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); in its_build_vmapp_cmd()
801 * VPT is empty on map. This is why we never advertise PTZ. in its_build_vmapp_cmd()
805 its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); in its_build_vmapp_cmd()
810 return valid_vpe(its, desc->its_vmapp_cmd.vpe); in its_build_vmapp_cmd()
819 if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) in its_build_vmapti_cmd()
820 db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; in its_build_vmapti_cmd()
825 its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); in its_build_vmapti_cmd()
826 its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); in its_build_vmapti_cmd()
827 its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); in its_build_vmapti_cmd()
829 its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); in its_build_vmapti_cmd()
833 return valid_vpe(its, desc->its_vmapti_cmd.vpe); in its_build_vmapti_cmd()
842 if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) in its_build_vmovi_cmd()
843 db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; in its_build_vmovi_cmd()
848 its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); in its_build_vmovi_cmd()
849 its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); in its_build_vmovi_cmd()
850 its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); in its_build_vmovi_cmd()
856 return valid_vpe(its, desc->its_vmovi_cmd.vpe); in its_build_vmovi_cmd()
865 target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmovp_cmd()
867 its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); in its_build_vmovp_cmd()
868 its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); in its_build_vmovp_cmd()
869 its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); in its_build_vmovp_cmd()
874 its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); in its_build_vmovp_cmd()
879 return valid_vpe(its, desc->its_vmovp_cmd.vpe); in its_build_vmovp_cmd()
886 struct its_vlpi_map *map; in its_build_vinv_cmd() local
888 map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, in its_build_vinv_cmd()
889 desc->its_inv_cmd.event_id); in its_build_vinv_cmd()
892 its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); in its_build_vinv_cmd()
893 its_encode_event_id(cmd, desc->its_inv_cmd.event_id); in its_build_vinv_cmd()
897 return valid_vpe(its, map->vpe); in its_build_vinv_cmd()
904 struct its_vlpi_map *map; in its_build_vint_cmd() local
906 map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, in its_build_vint_cmd()
907 desc->its_int_cmd.event_id); in its_build_vint_cmd()
910 its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); in its_build_vint_cmd()
911 its_encode_event_id(cmd, desc->its_int_cmd.event_id); in its_build_vint_cmd()
915 return valid_vpe(its, map->vpe); in its_build_vint_cmd()
922 struct its_vlpi_map *map; in its_build_vclear_cmd() local
924 map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, in its_build_vclear_cmd()
925 desc->its_clear_cmd.event_id); in its_build_vclear_cmd()
928 its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); in its_build_vclear_cmd()
929 its_encode_event_id(cmd, desc->its_clear_cmd.event_id); in its_build_vclear_cmd()
933 return valid_vpe(its, map->vpe); in its_build_vclear_cmd()
944 its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); in its_build_invdb_cmd()
948 return valid_vpe(its, desc->its_invdb_cmd.vpe); in its_build_invdb_cmd()
959 its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id); in its_build_vsgi_cmd()
960 its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi); in its_build_vsgi_cmd()
961 its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority); in its_build_vsgi_cmd()
962 its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group); in its_build_vsgi_cmd()
963 its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear); in its_build_vsgi_cmd()
964 its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable); in its_build_vsgi_cmd()
968 return valid_vpe(its, desc->its_vsgi_cmd.vpe); in its_build_vsgi_cmd()
974 return (ptr - its->cmd_base) * sizeof(*ptr); in its_cmd_ptr_to_offset()
982 widx = its->cmd_write - its->cmd_base; in its_queue_full()
983 ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); in its_queue_full()
998 count--; in its_allocate_entry()
1007 cmd = its->cmd_write++; in its_allocate_entry()
1010 if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) in its_allocate_entry()
1011 its->cmd_write = its->cmd_base; in its_allocate_entry()
1014 cmd->raw_cmd[0] = 0; in its_allocate_entry()
1015 cmd->raw_cmd[1] = 0; in its_allocate_entry()
1016 cmd->raw_cmd[2] = 0; in its_allocate_entry()
1017 cmd->raw_cmd[3] = 0; in its_allocate_entry()
1024 u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); in its_post_commands()
1026 writel_relaxed(wr, its->base + GITS_CWRITER); in its_post_commands()
1028 return its->cmd_write; in its_post_commands()
1037 if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) in its_flush_cmd()
1060 rd_idx = readl_relaxed(its->base + GITS_CREADR); in its_wait_for_range_completion()
1064 * potential wrap-around into account. in its_wait_for_range_completion()
1066 delta = rd_idx - prev_idx; in its_wait_for_range_completion()
1074 count--; in its_wait_for_range_completion()
1078 return -1; in its_wait_for_range_completion()
1099 raw_spin_lock_irqsave(&its->lock, flags); \
1103 raw_spin_unlock_irqrestore(&its->lock, flags); \
1119 rd_idx = readl_relaxed(its->base + GITS_CREADR); \
1121 raw_spin_unlock_irqrestore(&its->lock, flags); \
1132 its_encode_target(sync_cmd, sync_col->target_address); in its_build_sync_cmd()
1145 its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); in BUILD_SINGLE_CMD_FUNC()
1160 its_send_single_command(dev->its, its_build_int_cmd, &desc); in BUILD_SINGLE_CMD_FUNC()
1170 its_send_single_command(dev->its, its_build_clear_cmd, &desc); in its_send_clear()
1180 its_send_single_command(dev->its, its_build_inv_cmd, &desc); in its_send_inv()
1190 its_send_single_command(dev->its, its_build_mapd_cmd, &desc); in its_send_mapd()
1212 its_send_single_command(dev->its, its_build_mapti_cmd, &desc); in its_send_mapti()
1224 its_send_single_command(dev->its, its_build_movi_cmd, &desc); in its_send_movi()
1234 its_send_single_command(dev->its, its_build_discard_cmd, &desc); in its_send_discard()
1248 struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); in its_send_vmapti() local
1251 desc.its_vmapti_cmd.vpe = map->vpe; in its_send_vmapti()
1253 desc.its_vmapti_cmd.virt_id = map->vintid; in its_send_vmapti()
1255 desc.its_vmapti_cmd.db_enabled = map->db_enabled; in its_send_vmapti()
1257 its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); in its_send_vmapti()
1262 struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); in its_send_vmovi() local
1265 desc.its_vmovi_cmd.vpe = map->vpe; in its_send_vmovi()
1268 desc.its_vmovi_cmd.db_enabled = map->db_enabled; in its_send_vmovi()
1270 its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); in its_send_vmovi()
1280 desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; in its_send_vmapp()
1290 int col_id = vpe->col_idx; in its_send_vmovp()
1296 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1307 * Wall <-- Head. in its_send_vmovp()
1312 desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); in its_send_vmovp()
1319 if (!require_its_list_vmovp(vpe->its_vm, its)) in its_send_vmovp()
1322 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1348 its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); in its_send_vinv()
1362 its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); in its_send_vint()
1376 its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); in its_send_vclear()
1388 * irqchip functions - assumes MSI, mostly.
1392 struct its_vlpi_map *map = get_vlpi_map(d); in lpi_write_config() local
1397 if (map) { in lpi_write_config()
1398 va = page_address(map->vm->vprop_page); in lpi_write_config()
1399 hwirq = map->vintid; in lpi_write_config()
1402 map->properties &= ~clr; in lpi_write_config()
1403 map->properties |= set | LPI_PROP_GROUP1; in lpi_write_config()
1405 va = gic_rdists->prop_table_va; in lpi_write_config()
1406 hwirq = d->hwirq; in lpi_write_config()
1409 cfg = va + hwirq - 8192; in lpi_write_config()
1418 if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) in lpi_write_config()
1432 struct its_vlpi_map *map = get_vlpi_map(d); in direct_lpi_inv() local
1438 if (map) { in direct_lpi_inv()
1441 WARN_ON(!is_v4_1(its_dev->its)); in direct_lpi_inv()
1444 val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); in direct_lpi_inv()
1445 val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); in direct_lpi_inv()
1447 val = d->hwirq; in direct_lpi_inv()
1452 raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); in direct_lpi_inv()
1453 rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; in direct_lpi_inv()
1457 raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); in direct_lpi_inv()
1466 if (gic_rdists->has_direct_lpi && in lpi_update_config()
1467 (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) in lpi_update_config()
1479 struct its_vlpi_map *map; in its_vlpi_set_doorbell() local
1482 * GICv4.1 does away with the per-LPI nonsense, nothing to do in its_vlpi_set_doorbell()
1485 if (is_v4_1(its_dev->its)) in its_vlpi_set_doorbell()
1488 map = dev_event_to_vlpi_map(its_dev, event); in its_vlpi_set_doorbell()
1490 if (map->db_enabled == enable) in its_vlpi_set_doorbell()
1493 map->db_enabled = enable; in its_vlpi_set_doorbell()
1527 return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); in its_read_lpi_count()
1529 return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); in its_read_lpi_count()
1535 atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); in its_inc_lpi_count()
1537 atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); in its_inc_lpi_count()
1543 atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); in its_dec_lpi_count()
1545 atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); in its_dec_lpi_count()
1577 return -ENOMEM; in its_select_cpu()
1579 node = its_dev->its->numa_node; in its_select_cpu()
1608 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) in its_select_cpu()
1626 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && in its_select_cpu()
1635 pr_debug("IRQ%d -> %*pbl CPU%d\n", d->irq, cpumask_pr_args(aff_mask), cpu); in its_select_cpu()
1649 return -EINVAL; in its_set_affinity()
1651 prev_cpu = its_dev->event_map.col_map[id]; in its_set_affinity()
1664 target_col = &its_dev->its->collections[cpu]; in its_set_affinity()
1666 its_dev->event_map.col_map[id] = cpu; in its_set_affinity()
1676 return -EINVAL; in its_set_affinity()
1681 struct its_node *its = its_dev->its; in its_irq_get_msi_base()
1683 return its->phys_base + GITS_TRANSLATER; in its_irq_get_msi_base()
1692 its = its_dev->its; in its_irq_compose_msi_msg()
1693 addr = its->get_msi_base(its_dev); in its_irq_compose_msi_msg()
1695 msg->address_lo = lower_32_bits(addr); in its_irq_compose_msi_msg()
1696 msg->address_hi = upper_32_bits(addr); in its_irq_compose_msi_msg()
1697 msg->data = its_get_event_id(d); in its_irq_compose_msi_msg()
1710 return -EINVAL; in its_irq_set_irqchip_state()
1738 * (b) Or the ITSs do not use a list map, meaning that VMOVP is cheap enough
1741 * If neither (a) nor (b) is true, then we map vPEs on demand.
1746 if (!its_list_map || gic_rdists->has_rvpeid) in gic_requires_eager_mapping()
1752 static void its_map_vm(struct its_node *its, struct its_vm *vm) in its_map_vm() argument
1762 * If the VM wasn't mapped yet, iterate over the vpes and get in its_map_vm()
1765 vm->vlpi_count[its->list_nr]++; in its_map_vm()
1767 if (vm->vlpi_count[its->list_nr] == 1) { in its_map_vm()
1770 for (i = 0; i < vm->nr_vpes; i++) { in its_map_vm()
1771 struct its_vpe *vpe = vm->vpes[i]; in its_map_vm()
1772 struct irq_data *d = irq_get_irq_data(vpe->irq); in its_map_vm()
1774 /* Map the VPE to the first possible CPU */ in its_map_vm()
1775 vpe->col_idx = cpumask_first(cpu_online_mask); in its_map_vm()
1778 irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); in its_map_vm()
1785 static void its_unmap_vm(struct its_node *its, struct its_vm *vm) in its_unmap_vm() argument
1795 if (!--vm->vlpi_count[its->list_nr]) { in its_unmap_vm()
1798 for (i = 0; i < vm->nr_vpes; i++) in its_unmap_vm()
1799 its_send_vmapp(its, vm->vpes[i], false); in its_unmap_vm()
1811 if (!info->map) in its_vlpi_map()
1812 return -EINVAL; in its_vlpi_map()
1814 raw_spin_lock(&its_dev->event_map.vlpi_lock); in its_vlpi_map()
1816 if (!its_dev->event_map.vm) { in its_vlpi_map()
1819 maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), in its_vlpi_map()
1822 ret = -ENOMEM; in its_vlpi_map()
1826 its_dev->event_map.vm = info->map->vm; in its_vlpi_map()
1827 its_dev->event_map.vlpi_maps = maps; in its_vlpi_map()
1828 } else if (its_dev->event_map.vm != info->map->vm) { in its_vlpi_map()
1829 ret = -EINVAL; in its_vlpi_map()
1834 its_dev->event_map.vlpi_maps[event] = *info->map; in its_vlpi_map()
1841 its_map_vm(its_dev->its, info->map->vm); in its_vlpi_map()
1850 lpi_write_config(d, 0xff, info->map->properties); in its_vlpi_map()
1859 its_dev->event_map.nr_vlpis++; in its_vlpi_map()
1863 raw_spin_unlock(&its_dev->event_map.vlpi_lock); in its_vlpi_map()
1870 struct its_vlpi_map *map; in its_vlpi_get() local
1873 raw_spin_lock(&its_dev->event_map.vlpi_lock); in its_vlpi_get()
1875 map = get_vlpi_map(d); in its_vlpi_get()
1877 if (!its_dev->event_map.vm || !map) { in its_vlpi_get()
1878 ret = -EINVAL; in its_vlpi_get()
1883 *info->map = *map; in its_vlpi_get()
1886 raw_spin_unlock(&its_dev->event_map.vlpi_lock); in its_vlpi_get()
1896 raw_spin_lock(&its_dev->event_map.vlpi_lock); in its_vlpi_unmap()
1898 if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { in its_vlpi_unmap()
1899 ret = -EINVAL; in its_vlpi_unmap()
1908 its_send_mapti(its_dev, d->hwirq, event); in its_vlpi_unmap()
1913 /* Potentially unmap the VM from this ITS */ in its_vlpi_unmap()
1914 its_unmap_vm(its_dev->its, its_dev->event_map.vm); in its_vlpi_unmap()
1920 if (!--its_dev->event_map.nr_vlpis) { in its_vlpi_unmap()
1921 its_dev->event_map.vm = NULL; in its_vlpi_unmap()
1922 kfree(its_dev->event_map.vlpi_maps); in its_vlpi_unmap()
1926 raw_spin_unlock(&its_dev->event_map.vlpi_lock); in its_vlpi_unmap()
1934 if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) in its_vlpi_prop_update()
1935 return -EINVAL; in its_vlpi_prop_update()
1937 if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) in its_vlpi_prop_update()
1938 lpi_update_config(d, 0xff, info->config); in its_vlpi_prop_update()
1940 lpi_write_config(d, 0xff, info->config); in its_vlpi_prop_update()
1941 its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); in its_vlpi_prop_update()
1952 if (!is_v4(its_dev->its)) in its_irq_set_vcpu_affinity()
1953 return -EINVAL; in its_irq_set_vcpu_affinity()
1959 switch (info->cmd_type) { in its_irq_set_vcpu_affinity()
1971 return -EINVAL; in its_irq_set_vcpu_affinity()
2020 range->base_id = base; in mk_lpi_range()
2021 range->span = span; in mk_lpi_range()
2030 int err = -ENOSPC; in alloc_lpi_range()
2035 if (range->span >= nr_lpis) { in alloc_lpi_range()
2036 *base = range->base_id; in alloc_lpi_range()
2037 range->base_id += nr_lpis; in alloc_lpi_range()
2038 range->span -= nr_lpis; in alloc_lpi_range()
2040 if (range->span == 0) { in alloc_lpi_range()
2041 list_del(&range->entry); in alloc_lpi_range()
2058 if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) in merge_lpi_ranges()
2060 if (a->base_id + a->span != b->base_id) in merge_lpi_ranges()
2062 b->base_id = a->base_id; in merge_lpi_ranges()
2063 b->span += a->span; in merge_lpi_ranges()
2064 list_del(&a->entry); in merge_lpi_ranges()
2074 return -ENOMEM; in free_lpi_range()
2079 if (old->base_id < base) in free_lpi_range()
2083 * old is the last element with ->base_id smaller than base, in free_lpi_range()
2085 * ->base_id smaller than base, &old->entry ends up pointing in free_lpi_range()
2089 list_add(&new->entry, &old->entry); in free_lpi_range()
2103 u32 lpis = (1UL << id_bits) - 8192; in its_lpi_init()
2107 numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); in its_lpi_init()
2138 err = -ENOSPC; in its_lpi_alloc()
2164 /* Priority 0xa0, Group-1, disabled */ in gic_reset_prop_table()
2198 * memory map. in gic_check_reserved_range()
2203 addr_end = addr + size - 1; in gic_check_reserved_range()
2227 if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { in its_setup_lpi_prop_table()
2233 gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); in its_setup_lpi_prop_table()
2234 gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, in its_setup_lpi_prop_table()
2237 gic_reset_prop_table(gic_rdists->prop_table_va); in its_setup_lpi_prop_table()
2242 GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), in its_setup_lpi_prop_table()
2247 return -ENOMEM; in its_setup_lpi_prop_table()
2250 gic_rdists->prop_table_pa = page_to_phys(page); in its_setup_lpi_prop_table()
2251 gic_rdists->prop_table_va = page_address(page); in its_setup_lpi_prop_table()
2252 WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, in its_setup_lpi_prop_table()
2257 &gic_rdists->prop_table_pa); in its_setup_lpi_prop_table()
2274 u32 idx = baser - its->tables; in its_read_baser()
2276 return gits_read_baser(its->base + GITS_BASER + (idx << 3)); in its_read_baser()
2282 u32 idx = baser - its->tables; in its_write_baser()
2284 gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); in its_write_baser()
2285 baser->val = its_read_baser(its, baser); in its_write_baser()
2299 psz = baser->psz; in its_setup_baser()
2302 pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", in its_setup_baser()
2303 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2309 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); in its_setup_baser()
2311 return -ENOMEM; in its_setup_baser()
2323 return -ENXIO; in its_setup_baser()
2333 ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | in its_setup_baser()
2334 ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | in its_setup_baser()
2354 tmp = baser->val; in its_setup_baser()
2362 * non-cacheable as well. in its_setup_baser()
2374 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2377 return -ENXIO; in its_setup_baser()
2380 baser->order = order; in its_setup_baser()
2381 baser->base = base; in its_setup_baser()
2382 baser->psz = psz; in its_setup_baser()
2386 &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), in its_setup_baser()
2404 u32 psz = baser->psz; in its_parse_indirect_baser()
2410 * Find out whether hw supports a single or two-level table by in its_parse_indirect_baser()
2414 indirect = !!(baser->val & GITS_BASER_INDIRECT); in its_parse_indirect_baser()
2424 ids -= ilog2(psz / (int)esz); in its_parse_indirect_baser()
2433 * massive waste of memory if two-level device table in its_parse_indirect_baser()
2438 new_order = MAX_ORDER - 1; in its_parse_indirect_baser()
2440 pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", in its_parse_indirect_baser()
2441 &its->phys_base, its_base_type_string[type], in its_parse_indirect_baser()
2470 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); in compute_its_aff()
2472 val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); in compute_its_aff()
2481 if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) in find_sibling_its()
2492 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in find_sibling_its()
2499 baser = its->tables[2].val; in find_sibling_its()
2514 if (its->tables[i].base) { in its_free_tables()
2515 free_pages((unsigned long)its->tables[i].base, in its_free_tables()
2516 its->tables[i].order); in its_free_tables()
2517 its->tables[i].base = NULL; in its_free_tables()
2550 if (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser->val) == gpsz) in its_probe_baser_psz()
2562 return -1; in its_probe_baser_psz()
2566 baser->psz = psz; in its_probe_baser_psz()
2576 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) in its_alloc_tables()
2581 struct its_baser *baser = its->tables + i; in its_alloc_tables()
2592 return -ENXIO; in its_alloc_tables()
2595 order = get_order(baser->psz); in its_alloc_tables()
2609 *baser = sibling->tables[2]; in its_alloc_tables()
2610 its_write_baser(its, baser, baser->val); in its_alloc_tables()
2627 cache = baser->val & GITS_BASER_CACHEABILITY_MASK; in its_alloc_tables()
2628 shr = baser->val & GITS_BASER_SHAREABILITY_MASK; in its_alloc_tables()
2649 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in inherit_vpe_l1_table_from_its()
2656 baser = its->tables[2].val; in inherit_vpe_l1_table_from_its()
2661 gic_data_rdist()->vpe_l1_base = its->tables[2].base; in inherit_vpe_l1_table_from_its()
2681 val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); in inherit_vpe_l1_table_from_its()
2699 void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; in inherit_vpe_l1_table_from_rd()
2717 gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base; in inherit_vpe_l1_table_from_rd()
2718 *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; in inherit_vpe_l1_table_from_rd()
2728 void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; in allocate_vpe_l2_table()
2734 if (!gic_rdists->has_rvpeid) in allocate_vpe_l2_table()
2737 /* Skip non-present CPUs */ in allocate_vpe_l2_table()
2771 table = gic_data_rdist_cpu(cpu)->vpe_l1_base; in allocate_vpe_l2_table()
2804 if (!gic_rdists->has_rvpeid) in allocate_vpe_l1_table()
2823 val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); in allocate_vpe_l1_table()
2827 gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_ATOMIC); in allocate_vpe_l1_table()
2828 if (!gic_data_rdist()->vpe_table_mask) in allocate_vpe_l1_table()
2829 return -ENOMEM; in allocate_vpe_l1_table()
2887 val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); in allocate_vpe_l1_table()
2896 return -ENOMEM; in allocate_vpe_l1_table()
2898 gic_data_rdist()->vpe_l1_base = page_address(page); in allocate_vpe_l1_table()
2910 cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); in allocate_vpe_l1_table()
2914 cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); in allocate_vpe_l1_table()
2923 its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), in its_alloc_collections()
2925 if (!its->collections) in its_alloc_collections()
2926 return -ENOMEM; in its_alloc_collections()
2929 its->collections[i].target_address = ~0ULL; in its_alloc_collections()
2943 /* Make sure the GIC will observe the zero-ed page */ in its_allocate_pending_table()
2977 * flag the RD tables as pre-allocated if the stars do align. in allocate_lpi_tables()
2981 gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | in allocate_lpi_tables()
3001 return -ENOMEM; in allocate_lpi_tables()
3004 gic_data_rdist_cpu(cpu)->pend_page = pend_page; in allocate_lpi_tables()
3026 count--; in its_clear_vpend_valid()
3047 if (gic_data_rdist()->lpi_enabled) in its_cpu_init_lpis()
3051 if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && in its_cpu_init_lpis()
3059 if (WARN_ON(gic_rdists->prop_table_pa != paddr)) in its_cpu_init_lpis()
3066 its_free_pending_table(gic_data_rdist()->pend_page); in its_cpu_init_lpis()
3067 gic_data_rdist()->pend_page = NULL; in its_cpu_init_lpis()
3072 pend_page = gic_data_rdist()->pend_page; in its_cpu_init_lpis()
3077 val = (gic_rdists->prop_table_pa | in its_cpu_init_lpis()
3080 ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); in its_cpu_init_lpis()
3088 * The HW reports non-shareable, we must in its_cpu_init_lpis()
3098 gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; in its_cpu_init_lpis()
3111 * The HW reports non-shareable, we must remove the in its_cpu_init_lpis()
3125 if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { in its_cpu_init_lpis()
3135 val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; in its_cpu_init_lpis()
3151 * Disable direct injection, and pray that no VM was in its_cpu_init_lpis()
3154 gic_rdists->has_rvpeid = false; in its_cpu_init_lpis()
3155 gic_rdists->has_vlpis = false; in its_cpu_init_lpis()
3161 gic_data_rdist()->lpi_enabled = true; in its_cpu_init_lpis()
3164 gic_data_rdist()->pend_page ? "allocated" : "reserved", in its_cpu_init_lpis()
3174 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { in its_cpu_init_collection()
3178 if (its->numa_node != NUMA_NO_NODE && in its_cpu_init_collection()
3179 its->numa_node != of_node_to_nid(cpu_node)) in its_cpu_init_collection()
3187 if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { in its_cpu_init_collection()
3192 target = gic_data_rdist()->phys_base; in its_cpu_init_collection()
3200 its->collections[cpu].target_address = target; in its_cpu_init_collection()
3201 its->collections[cpu].col_id = cpu; in its_cpu_init_collection()
3203 its_send_mapc(its, &its->collections[cpu], 1); in its_cpu_init_collection()
3204 its_send_invall(its, &its->collections[cpu]); in its_cpu_init_collection()
3224 raw_spin_lock_irqsave(&its->lock, flags); in its_find_device()
3226 list_for_each_entry(tmp, &its->its_device_list, entry) { in its_find_device()
3227 if (tmp->device_id == dev_id) { in its_find_device()
3233 raw_spin_unlock_irqrestore(&its->lock, flags); in its_find_device()
3243 if (GITS_BASER_TYPE(its->tables[i].val) == type) in its_get_baser()
3244 return &its->tables[i]; in its_get_baser()
3258 esz = GITS_BASER_ENTRY_SIZE(baser->val); in its_alloc_table_entry()
3259 if (!(baser->val & GITS_BASER_INDIRECT)) in its_alloc_table_entry()
3260 return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); in its_alloc_table_entry()
3263 idx = id >> ilog2(baser->psz / esz); in its_alloc_table_entry()
3264 if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) in its_alloc_table_entry()
3267 table = baser->base; in its_alloc_table_entry()
3271 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, in its_alloc_table_entry()
3272 get_order(baser->psz)); in its_alloc_table_entry()
3277 if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) in its_alloc_table_entry()
3278 gic_flush_dcache_to_poc(page_address(page), baser->psz); in its_alloc_table_entry()
3283 if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) in its_alloc_table_entry()
3333 if (!gic_rdists->has_rvpeid) in its_alloc_vpe_table()
3373 sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); in its_create_device()
3374 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; in its_create_device()
3375 itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); in its_create_device()
3397 dev->its = its; in its_create_device()
3398 dev->itt = itt; in its_create_device()
3399 dev->nr_ites = nr_ites; in its_create_device()
3400 dev->event_map.lpi_map = lpi_map; in its_create_device()
3401 dev->event_map.col_map = col_map; in its_create_device()
3402 dev->event_map.lpi_base = lpi_base; in its_create_device()
3403 dev->event_map.nr_lpis = nr_lpis; in its_create_device()
3404 raw_spin_lock_init(&dev->event_map.vlpi_lock); in its_create_device()
3405 dev->device_id = dev_id; in its_create_device()
3406 INIT_LIST_HEAD(&dev->entry); in its_create_device()
3408 raw_spin_lock_irqsave(&its->lock, flags); in its_create_device()
3409 list_add(&dev->entry, &its->its_device_list); in its_create_device()
3410 raw_spin_unlock_irqrestore(&its->lock, flags); in its_create_device()
3412 /* Map device to its ITT */ in its_create_device()
3422 raw_spin_lock_irqsave(&its_dev->its->lock, flags); in its_free_device()
3423 list_del(&its_dev->entry); in its_free_device()
3424 raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); in its_free_device()
3425 kfree(its_dev->event_map.col_map); in its_free_device()
3426 kfree(its_dev->itt); in its_free_device()
3435 idx = bitmap_find_free_region(dev->event_map.lpi_map, in its_alloc_device_irq()
3436 dev->event_map.nr_lpis, in its_alloc_device_irq()
3439 return -ENOSPC; in its_alloc_device_irq()
3441 *hwirq = dev->event_map.lpi_base + idx; in its_alloc_device_irq()
3461 dev_id = info->scratchpad[0].ul; in its_msi_prepare()
3464 its = msi_info->data; in its_msi_prepare()
3466 if (!gic_rdists->has_direct_lpi && in its_msi_prepare()
3468 vpe_proxy.dev->its == its && in its_msi_prepare()
3469 dev_id == vpe_proxy.dev->device_id) { in its_msi_prepare()
3473 return -EINVAL; in its_msi_prepare()
3476 mutex_lock(&its->dev_alloc_lock); in its_msi_prepare()
3484 its_dev->shared = true; in its_msi_prepare()
3491 err = -ENOMEM; in its_msi_prepare()
3495 if (info->flags & MSI_ALLOC_FLAGS_PROXY_DEVICE) in its_msi_prepare()
3496 its_dev->shared = true; in its_msi_prepare()
3500 mutex_unlock(&its->dev_alloc_lock); in its_msi_prepare()
3501 info->scratchpad[0].ptr = its_dev; in its_msi_prepare()
3515 if (irq_domain_get_of_node(domain->parent)) { in its_irq_gic_domain_alloc()
3516 fwspec.fwnode = domain->parent->fwnode; in its_irq_gic_domain_alloc()
3521 } else if (is_fwnode_irqchip(domain->parent->fwnode)) { in its_irq_gic_domain_alloc()
3522 fwspec.fwnode = domain->parent->fwnode; in its_irq_gic_domain_alloc()
3527 return -EINVAL; in its_irq_gic_domain_alloc()
3537 struct its_device *its_dev = info->scratchpad[0].ptr; in its_irq_domain_alloc()
3538 struct its_node *its = its_dev->its; in its_irq_domain_alloc()
3548 err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); in its_irq_domain_alloc()
3563 (int)(hwirq + i - its_dev->event_map.lpi_base), in its_irq_domain_alloc()
3579 return -EINVAL; in its_irq_domain_activate()
3582 its_dev->event_map.col_map[event] = cpu; in its_irq_domain_activate()
3585 /* Map the GIC IRQ and event to the device */ in its_irq_domain_activate()
3586 its_send_mapti(its_dev, d->hwirq, event); in its_irq_domain_activate()
3596 its_dec_lpi_count(d, its_dev->event_map.col_map[event]); in its_irq_domain_deactivate()
3606 struct its_node *its = its_dev->its; in its_irq_domain_free()
3609 bitmap_release_region(its_dev->event_map.lpi_map, in its_irq_domain_free()
3620 mutex_lock(&its->dev_alloc_lock); in its_irq_domain_free()
3626 if (!its_dev->shared && in its_irq_domain_free()
3627 bitmap_empty(its_dev->event_map.lpi_map, in its_irq_domain_free()
3628 its_dev->event_map.nr_lpis)) { in its_irq_domain_free()
3629 its_lpi_free(its_dev->event_map.lpi_map, in its_irq_domain_free()
3630 its_dev->event_map.lpi_base, in its_irq_domain_free()
3631 its_dev->event_map.nr_lpis); in its_irq_domain_free()
3638 mutex_unlock(&its->dev_alloc_lock); in its_irq_domain_free()
3672 if (gic_rdists->has_rvpeid) in its_vpe_db_proxy_unmap_locked()
3676 if (vpe->vpe_proxy_event == -1) in its_vpe_db_proxy_unmap_locked()
3679 its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); in its_vpe_db_proxy_unmap_locked()
3680 vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; in its_vpe_db_proxy_unmap_locked()
3690 vpe_proxy.next_victim = vpe->vpe_proxy_event; in its_vpe_db_proxy_unmap_locked()
3692 vpe->vpe_proxy_event = -1; in its_vpe_db_proxy_unmap_locked()
3698 if (gic_rdists->has_rvpeid) in its_vpe_db_proxy_unmap()
3701 if (!gic_rdists->has_direct_lpi) { in its_vpe_db_proxy_unmap()
3713 if (gic_rdists->has_rvpeid) in its_vpe_db_proxy_map_locked()
3717 if (vpe->vpe_proxy_event != -1) in its_vpe_db_proxy_map_locked()
3724 /* Map the new VPE instead */ in its_vpe_db_proxy_map_locked()
3726 vpe->vpe_proxy_event = vpe_proxy.next_victim; in its_vpe_db_proxy_map_locked()
3727 vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; in its_vpe_db_proxy_map_locked()
3729 vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; in its_vpe_db_proxy_map_locked()
3730 its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); in its_vpe_db_proxy_map_locked()
3739 if (gic_rdists->has_rvpeid) in its_vpe_db_proxy_move()
3742 if (gic_rdists->has_direct_lpi) { in its_vpe_db_proxy_move()
3745 rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; in its_vpe_db_proxy_move()
3746 gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); in its_vpe_db_proxy_move()
3756 target_col = &vpe_proxy.dev->its->collections[to]; in its_vpe_db_proxy_move()
3757 its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); in its_vpe_db_proxy_move()
3758 vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; in its_vpe_db_proxy_move()
3780 * protect us, and that we must ensure nobody samples vpe->col_idx in its_vpe_set_affinity()
3782 * taken on any vLPI handling path that evaluates vpe->col_idx. in its_vpe_set_affinity()
3788 vpe->col_idx = cpu; in its_vpe_set_affinity()
3794 if (gic_data_rdist_cpu(cpu)->vpe_table_mask && in its_vpe_set_affinity()
3795 cpumask_test_cpu(from, gic_data_rdist_cpu(cpu)->vpe_table_mask)) in its_vpe_set_affinity()
3813 if (!gic_rdists->has_vpend_valid_dirty) in its_wait_vpt_parse_complete()
3828 val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & in its_vpe_schedule()
3830 val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; in its_vpe_schedule()
3835 val = virt_to_phys(page_address(vpe->vpt_page)) & in its_vpe_schedule()
3842 * easily. So in the end, vpe->pending_last is only an in its_vpe_schedule()
3845 * would be able to read its coarse map pretty quickly anyway, in its_vpe_schedule()
3849 val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; in its_vpe_schedule()
3861 vpe->idai = !!(val & GICR_VPENDBASER_IDAI); in its_vpe_deschedule()
3862 vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); in its_vpe_deschedule()
3873 if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) in its_vpe_invall()
3890 switch (info->cmd_type) { in its_vpe_set_vcpu_affinity()
3908 return -EINVAL; in its_vpe_set_vcpu_affinity()
3920 cmd(vpe_proxy.dev, vpe->vpe_proxy_event); in its_vpe_send_cmd()
3929 if (gic_rdists->has_direct_lpi) { in its_vpe_send_inv()
3933 raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); in its_vpe_send_inv()
3934 rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; in its_vpe_send_inv()
3935 gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); in its_vpe_send_inv()
3937 raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); in its_vpe_send_inv()
3951 lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); in its_vpe_mask_irq()
3958 lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); in its_vpe_unmask_irq()
3969 return -EINVAL; in its_vpe_set_irqchip_state()
3971 if (gic_rdists->has_direct_lpi) { in its_vpe_set_irqchip_state()
3974 rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; in its_vpe_set_irqchip_state()
3976 gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); in its_vpe_set_irqchip_state()
3978 gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); in its_vpe_set_irqchip_state()
3997 .name = "GICv4-vpe",
4041 lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); in its_vpe_4_1_mask_irq()
4047 lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); in its_vpe_4_1_unmask_irq()
4059 val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; in its_vpe_4_1_schedule()
4060 val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; in its_vpe_4_1_schedule()
4061 val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); in its_vpe_4_1_schedule()
4072 if (info->req_db) { in its_vpe_4_1_deschedule()
4076 * vPE is going to block: make the vPE non-resident with in its_vpe_4_1_deschedule()
4078 * we read-back PendingLast clear, then a doorbell will be in its_vpe_4_1_deschedule()
4085 raw_spin_lock_irqsave(&vpe->vpe_lock, flags); in its_vpe_4_1_deschedule()
4089 vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); in its_vpe_4_1_deschedule()
4090 raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); in its_vpe_4_1_deschedule()
4093 * We're not blocking, so just make the vPE non-resident in its_vpe_4_1_deschedule()
4099 vpe->pending_last = true; in its_vpe_4_1_deschedule()
4111 val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); in its_vpe_4_1_invall()
4115 raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); in its_vpe_4_1_invall()
4116 rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; in its_vpe_4_1_invall()
4120 raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); in its_vpe_4_1_invall()
4129 switch (info->cmd_type) { in its_vpe_4_1_set_vcpu_affinity()
4147 return -EINVAL; in its_vpe_4_1_set_vcpu_affinity()
4152 .name = "GICv4.1-vpe",
4166 desc.its_vsgi_cmd.sgi = d->hwirq; in its_configure_sgi()
4167 desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority; in its_configure_sgi()
4168 desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled; in its_configure_sgi()
4169 desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group; in its_configure_sgi()
4174 * destination VPE is mapped there. Since we map them eagerly at in its_configure_sgi()
4184 vpe->sgi_config[d->hwirq].enabled = false; in its_sgi_mask_irq()
4192 vpe->sgi_config[d->hwirq].enabled = true; in its_sgi_unmask_irq()
4214 return -EINVAL; in its_sgi_set_irqchip_state()
4221 val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); in its_sgi_set_irqchip_state()
4222 val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); in its_sgi_set_irqchip_state()
4223 writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); in its_sgi_set_irqchip_state()
4242 return -EINVAL; in its_sgi_get_irqchip_state()
4247 * - Concurrent vPE affinity change: we must make sure it cannot in its_sgi_get_irqchip_state()
4251 * - Concurrent VSGIPENDR access: As it involves accessing two in its_sgi_get_irqchip_state()
4255 raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); in its_sgi_get_irqchip_state()
4256 base = gic_data_rdist_cpu(cpu)->rd_base + SZ_128K; in its_sgi_get_irqchip_state()
4257 writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); in its_sgi_get_irqchip_state()
4263 count--; in its_sgi_get_irqchip_state()
4273 raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); in its_sgi_get_irqchip_state()
4277 return -ENXIO; in its_sgi_get_irqchip_state()
4279 *val = !!(status & (1 << d->hwirq)); in its_sgi_get_irqchip_state()
4289 switch (info->cmd_type) { in its_sgi_set_vcpu_affinity()
4291 vpe->sgi_config[d->hwirq].priority = info->priority; in its_sgi_set_vcpu_affinity()
4292 vpe->sgi_config[d->hwirq].group = info->group; in its_sgi_set_vcpu_affinity()
4297 return -EINVAL; in its_sgi_set_vcpu_affinity()
4302 .name = "GICv4.1-sgi",
4322 vpe->sgi_config[i].priority = 0; in its_sgi_irq_domain_alloc()
4323 vpe->sgi_config[i].enabled = false; in its_sgi_irq_domain_alloc()
4324 vpe->sgi_config[i].group = false; in its_sgi_irq_domain_alloc()
4357 * - To change the configuration, CLEAR must be set to false, in its_sgi_irq_domain_deactivate()
4359 * - To clear the pending bit, CLEAR must be set to true, leaving in its_sgi_irq_domain_deactivate()
4364 vpe->sgi_config[d->hwirq].enabled = false; in its_sgi_irq_domain_deactivate()
4400 return -ENOMEM; in its_vpe_init()
4406 return -ENOMEM; in its_vpe_init()
4409 raw_spin_lock_init(&vpe->vpe_lock); in its_vpe_init()
4410 vpe->vpe_id = vpe_id; in its_vpe_init()
4411 vpe->vpt_page = vpt_page; in its_vpe_init()
4412 if (gic_rdists->has_rvpeid) in its_vpe_init()
4413 atomic_set(&vpe->vmapp_count, 0); in its_vpe_init()
4415 vpe->vpe_proxy_event = -1; in its_vpe_init()
4423 its_vpe_id_free(vpe->vpe_id); in its_vpe_teardown()
4424 its_free_pending_table(vpe->vpt_page); in its_vpe_teardown()
4431 struct its_vm *vm = domain->host_data; in its_vpe_irq_domain_free() local
4441 BUG_ON(vm != vpe->its_vm); in its_vpe_irq_domain_free()
4443 clear_bit(data->hwirq, vm->db_bitmap); in its_vpe_irq_domain_free()
4448 if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { in its_vpe_irq_domain_free()
4449 its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); in its_vpe_irq_domain_free()
4450 its_free_prop_table(vm->vprop_page); in its_vpe_irq_domain_free()
4458 struct its_vm *vm = args; in its_vpe_irq_domain_alloc() local
4463 BUG_ON(!vm); in its_vpe_irq_domain_alloc()
4467 return -ENOMEM; in its_vpe_irq_domain_alloc()
4471 return -ENOMEM; in its_vpe_irq_domain_alloc()
4477 return -ENOMEM; in its_vpe_irq_domain_alloc()
4480 vm->db_bitmap = bitmap; in its_vpe_irq_domain_alloc()
4481 vm->db_lpi_base = base; in its_vpe_irq_domain_alloc()
4482 vm->nr_db_lpis = nr_ids; in its_vpe_irq_domain_alloc()
4483 vm->vprop_page = vprop_page; in its_vpe_irq_domain_alloc()
4485 if (gic_rdists->has_rvpeid) in its_vpe_irq_domain_alloc()
4489 vm->vpes[i]->vpe_db_lpi = base + i; in its_vpe_irq_domain_alloc()
4490 err = its_vpe_init(vm->vpes[i]); in its_vpe_irq_domain_alloc()
4494 vm->vpes[i]->vpe_db_lpi); in its_vpe_irq_domain_alloc()
4498 irqchip, vm->vpes[i]); in its_vpe_irq_domain_alloc()
4520 * If we use the list map, we issue VMAPP on demand... Unless in its_vpe_irq_domain_activate()
4521 * we're on a GICv4.1 and we eagerly map the VPE on all ITSs in its_vpe_irq_domain_activate()
4527 /* Map the VPE to the first possible CPU */ in its_vpe_irq_domain_activate()
4528 vpe->col_idx = cpumask_first(cpu_online_mask); in its_vpe_irq_domain_activate()
4538 irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); in its_vpe_irq_domain_activate()
4550 * If we use the list map on GICv4.0, we unmap the VPE once no in its_vpe_irq_domain_deactivate()
4551 * VLPIs are associated with the VM. in its_vpe_irq_domain_deactivate()
4568 if (find_4_1_its() && !atomic_read(&vpe->vmapp_count)) in its_vpe_irq_domain_deactivate()
4569 gic_flush_dcache_to_poc(page_address(vpe->vpt_page), in its_vpe_irq_domain_deactivate()
4604 count--; in its_force_quiescent()
4606 return -EBUSY; in its_force_quiescent()
4618 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_cavium_22375()
4619 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); in its_enable_quirk_cavium_22375()
4620 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; in its_enable_quirk_cavium_22375()
4629 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; in its_enable_quirk_cavium_23144()
4639 its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; in its_enable_quirk_qdf2400_e0065()
4640 its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); in its_enable_quirk_qdf2400_e0065()
4647 struct its_node *its = its_dev->its; in its_irq_get_msi_base_pre_its()
4650 * The Socionext Synquacer SoC has a so-called 'pre-ITS', in its_irq_get_msi_base_pre_its()
4651 * which maps 32-bit writes targeted at a separate window of in its_irq_get_msi_base_pre_its()
4656 return its->pre_its_base + (its_dev->device_id << 2); in its_irq_get_msi_base_pre_its()
4665 if (!fwnode_property_read_u32_array(its->fwnode_handle, in its_enable_quirk_socionext_synquacer()
4666 "socionext,synquacer-pre-its", in its_enable_quirk_socionext_synquacer()
4670 its->pre_its_base = pre_its_window[0]; in its_enable_quirk_socionext_synquacer()
4671 its->get_msi_base = its_irq_get_msi_base_pre_its; in its_enable_quirk_socionext_synquacer()
4673 ids = ilog2(pre_its_window[1]) - 2; in its_enable_quirk_socionext_synquacer()
4675 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_socionext_synquacer()
4676 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); in its_enable_quirk_socionext_synquacer()
4679 /* the pre-ITS breaks isolation, so disable MSI remapping */ in its_enable_quirk_socionext_synquacer()
4680 its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; in its_enable_quirk_socionext_synquacer()
4694 its->vlpi_redist_offset = SZ_128K; in its_enable_quirk_hip07_161600802()
4726 * The Socionext Synquacer SoC incorporates ARM's own GIC-500
4727 * implementation, but with a 'pre-ITS' added that requires
4730 .desc = "ITS: Socionext Synquacer pre-ITS",
4750 u32 iidr = readl_relaxed(its->base + GITS_IIDR); in its_enable_quirks()
4764 base = its->base; in its_save_disable()
4765 its->ctlr_save = readl_relaxed(base + GITS_CTLR); in its_save_disable()
4769 &its->phys_base, err); in its_save_disable()
4770 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
4774 its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); in its_save_disable()
4782 base = its->base; in its_save_disable()
4783 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
4801 base = its->base; in its_restore_enable()
4815 &its->phys_base, ret); in its_restore_enable()
4819 gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); in its_restore_enable()
4825 its->cmd_write = its->cmd_base; in its_restore_enable()
4830 struct its_baser *baser = &its->tables[i]; in its_restore_enable()
4832 if (!(baser->val & GITS_BASER_VALID)) in its_restore_enable()
4835 its_write_baser(its, baser, baser->val); in its_restore_enable()
4837 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_restore_enable()
4844 if (its->collections[smp_processor_id()].col_id < in its_restore_enable()
4863 return -ENOMEM; in its_init_domain()
4868 return -ENOMEM; in its_init_domain()
4871 inner_domain->parent = its_parent; in its_init_domain()
4873 inner_domain->flags |= its->msi_domain_flags; in its_init_domain()
4874 info->ops = &its_msi_domain_ops; in its_init_domain()
4875 info->data = its; in its_init_domain()
4876 inner_domain->host_data = info; in its_init_domain()
4887 if (gic_rdists->has_direct_lpi) { in its_init_vpe_domain()
4899 return -ENOMEM; in its_init_vpe_domain()
4902 devid = GENMASK(device_ids(its) - 1, 0); in its_init_vpe_domain()
4907 return -ENOMEM; in its_init_vpe_domain()
4910 BUG_ON(entries > vpe_proxy.dev->nr_ites); in its_init_vpe_domain()
4915 devid, vpe_proxy.dev->nr_ites); in its_init_vpe_domain()
4928 * guaranteed to be single-threaded, hence no in its_compute_its_list_map()
4935 &res->start); in its_compute_its_list_map()
4936 return -EINVAL; in its_compute_its_list_map()
4951 &res->start, its_number); in its_compute_its_list_map()
4952 return -EINVAL; in its_compute_its_list_map()
4968 its_base = ioremap(res->start, SZ_64K); in its_probe_one()
4970 pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); in its_probe_one()
4971 return -ENOMEM; in its_probe_one()
4976 pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); in its_probe_one()
4977 err = -ENODEV; in its_probe_one()
4983 pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); in its_probe_one()
4991 err = -ENOMEM; in its_probe_one()
4995 raw_spin_lock_init(&its->lock); in its_probe_one()
4996 mutex_init(&its->dev_alloc_lock); in its_probe_one()
4997 INIT_LIST_HEAD(&its->entry); in its_probe_one()
4998 INIT_LIST_HEAD(&its->its_device_list); in its_probe_one()
5000 its->typer = typer; in its_probe_one()
5001 its->base = its_base; in its_probe_one()
5002 its->phys_base = res->start; in its_probe_one()
5009 its->list_nr = err; in its_probe_one()
5012 &res->start, err); in its_probe_one()
5014 pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); in its_probe_one()
5020 its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K); in its_probe_one()
5021 if (!its->sgir_base) { in its_probe_one()
5022 err = -ENOMEM; in its_probe_one()
5026 its->mpidr = readl_relaxed(its_base + GITS_MPIDR); in its_probe_one()
5029 &res->start, its->mpidr, svpet); in its_probe_one()
5033 its->numa_node = numa_node; in its_probe_one()
5035 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, in its_probe_one()
5038 err = -ENOMEM; in its_probe_one()
5041 its->cmd_base = (void *)page_address(page); in its_probe_one()
5042 its->cmd_write = its->cmd_base; in its_probe_one()
5043 its->fwnode_handle = handle; in its_probe_one()
5044 its->get_msi_base = its_irq_get_msi_base; in its_probe_one()
5045 its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; in its_probe_one()
5057 baser = (virt_to_phys(its->cmd_base) | in its_probe_one()
5060 (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | in its_probe_one()
5063 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5064 tmp = gits_read_cbaser(its->base + GITS_CBASER); in its_probe_one()
5069 * The HW reports non-shareable, we must in its_probe_one()
5076 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5079 its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; in its_probe_one()
5082 gits_write_cwriter(0, its->base + GITS_CWRITER); in its_probe_one()
5083 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_probe_one()
5087 writel_relaxed(ctlr, its->base + GITS_CTLR); in its_probe_one()
5094 list_add(&its->entry, &its_nodes); in its_probe_one()
5102 free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); in its_probe_one()
5104 if (its->sgir_base) in its_probe_one()
5105 iounmap(its->sgir_base); in its_probe_one()
5110 pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); in its_probe_one()
5127 return -ENXIO; in redist_disable_lpis()
5136 * LPIs before trying to re-enable them. They are already in redist_disable_lpis()
5141 if (gic_data_rdist()->lpi_enabled || in redist_disable_lpis()
5142 (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) in redist_disable_lpis()
5168 return -ETIMEDOUT; in redist_disable_lpis()
5171 timeout--; in redist_disable_lpis()
5181 return -EBUSY; in redist_disable_lpis()
5204 { .compatible = "arm,gic-v3-its", },
5217 if (!of_property_read_bool(np, "msi-controller")) { in its_of_probe()
5218 pr_warn("%pOF: no msi-controller property, ITS ignored\n", in its_of_probe()
5228 its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); in its_of_probe()
5273 return -EINVAL; in gic_acpi_parse_srat_its()
5275 if (its_affinity->header.length < sizeof(*its_affinity)) { in gic_acpi_parse_srat_its()
5277 its_affinity->header.length); in gic_acpi_parse_srat_its()
5278 return -EINVAL; in gic_acpi_parse_srat_its()
5286 node = pxm_to_node(its_affinity->proximity_domain); in gic_acpi_parse_srat_its()
5294 its_srat_maps[its_in_srat].its_id = its_affinity->its_id; in gic_acpi_parse_srat_its()
5296 pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", in gic_acpi_parse_srat_its()
5297 its_affinity->proximity_domain, its_affinity->its_id, node); in gic_acpi_parse_srat_its()
5345 res.start = its_entry->base_address; in gic_acpi_parse_madt_its()
5346 res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; in gic_acpi_parse_madt_its()
5353 return -ENOMEM; in gic_acpi_parse_madt_its()
5356 err = iort_register_domain_token(its_entry->translation_id, res.start, in gic_acpi_parse_madt_its()
5360 &res.start, its_entry->translation_id); in gic_acpi_parse_madt_its()
5365 acpi_get_its_numa_node(its_entry->translation_id)); in gic_acpi_parse_madt_its()
5369 iort_deregister_domain_token(its_entry->translation_id); in gic_acpi_parse_madt_its()
5406 return -ENXIO; in its_init()
5419 if (WARN_ON(!has_v4_1 && rdists->has_rvpeid)) in its_init()
5420 rdists->has_rvpeid = false; in its_init()
5422 if (has_v4 & rdists->has_vlpis) { in its_init()
5432 rdists->has_vlpis = false; in its_init()