334 #define at91_adc_writel(st, reg, val)	writel_relaxed(val, st->base + reg)  macro
536 	at91_adc_writel(st, AT91_SAMA5D2_EMR, emr);  in at91_adc_config_emr()
589 		at91_adc_writel(st, AT91_SAMA5D2_IDR,  in at91_adc_configure_touch()
591 		at91_adc_writel(st, AT91_SAMA5D2_TSMR, 0);  in at91_adc_configure_touch()
617 	at91_adc_writel(st, AT91_SAMA5D2_TSMR, tsmr);  in at91_adc_configure_touch()
622 	at91_adc_writel(st, AT91_SAMA5D2_ACR, acr);  in at91_adc_configure_touch()
629 	at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_PEN);  in at91_adc_configure_touch()
741 	at91_adc_writel(st, AT91_SAMA5D2_TRGR, status);  in at91_adc_configure_trigger()
853 	at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_GOVRE);  in at91_adc_dma_start()
929 		at91_adc_writel(st, AT91_SAMA5D2_COR, cor);  in at91_adc_buffer_prepare()
931 		at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel));  in at91_adc_buffer_prepare()
935 		at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_DRDY);  in at91_adc_buffer_prepare()
971 		at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel));  in at91_adc_buffer_postdisable()
978 		at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_DRDY);  in at91_adc_buffer_postdisable()
1130 		at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START);  in at91_adc_trigger_handler()
1181 	at91_adc_writel(st, AT91_SAMA5D2_MR, mr);  in at91_adc_setup_samp_freq()
1227 	at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_PEN);  in at91_adc_pen_detect_interrupt()
1228 	at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_NOPEN |  in at91_adc_pen_detect_interrupt()
1231 	at91_adc_writel(st, AT91_SAMA5D2_TRGR,  in at91_adc_pen_detect_interrupt()
1241 	at91_adc_writel(st, AT91_SAMA5D2_TRGR,  in at91_adc_no_pen_detect_interrupt()
1243 	at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_NOPEN |  in at91_adc_no_pen_detect_interrupt()
1250 	at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_PEN);  in at91_adc_no_pen_detect_interrupt()
1365 	at91_adc_writel(st, AT91_SAMA5D2_COR, cor);  in at91_adc_read_info_raw()
1366 	at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel));  in at91_adc_read_info_raw()
1367 	at91_adc_writel(st, AT91_SAMA5D2_IER, BIT(chan->channel));  in at91_adc_read_info_raw()
1368 	at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START);  in at91_adc_read_info_raw()
1384 	at91_adc_writel(st, AT91_SAMA5D2_IDR, BIT(chan->channel));  in at91_adc_read_info_raw()
1385 	at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel));  in at91_adc_read_info_raw()
1599 	at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST);  in at91_adc_hw_init()
1600 	at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff);  in at91_adc_hw_init()
1605 	at91_adc_writel(st, AT91_SAMA5D2_MR,  in at91_adc_hw_init()
1903 	at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST);  in at91_adc_suspend()