333 #define at91_adc_readl(st, reg)		readl_relaxed(st->base + reg)  macro
512 	unsigned int emr = at91_adc_readl(st, AT91_SAMA5D2_EMR);  in at91_adc_config_emr()
619 	acr =  at91_adc_readl(st, AT91_SAMA5D2_ACR);  in at91_adc_configure_touch()
645 	val = at91_adc_readl(st, reg);  in at91_adc_touch_pos()
681 	val = at91_adc_readl(st, AT91_SAMA5D2_PRESSR);  in at91_adc_touch_pressure()
732 	u32 status = at91_adc_readl(st, AT91_SAMA5D2_TRGR);  in at91_adc_configure_trigger()
758 	at91_adc_readl(st, AT91_SAMA5D2_LCDR);  in at91_adc_reenable_trigger()
920 		cor = at91_adc_readl(st, AT91_SAMA5D2_COR);  in at91_adc_buffer_prepare()
974 			at91_adc_readl(st, chan->address);  in at91_adc_buffer_postdisable()
981 	at91_adc_readl(st, AT91_SAMA5D2_OVER);  in at91_adc_buffer_postdisable()
1029 	while ((at91_adc_readl(st, AT91_SAMA5D2_ISR) & mask) != mask &&  in at91_adc_trigger_handler_nodma()
1057 			val = at91_adc_readl(st, chan->address);  in at91_adc_trigger_handler_nodma()
1078 	u32 status = at91_adc_readl(st, AT91_SAMA5D2_ISR);  in at91_adc_trigger_handler_dma()
1177 	mr = at91_adc_readl(st, AT91_SAMA5D2_MR);  in at91_adc_setup_samp_freq()
1268 	u32 status = at91_adc_readl(st, AT91_SAMA5D2_ISR);  in at91_adc_interrupt()
1269 	u32 imr = at91_adc_readl(st, AT91_SAMA5D2_IMR);  in at91_adc_interrupt()
1290 		status = at91_adc_readl(st, AT91_SAMA5D2_XPOSR);  in at91_adc_interrupt()
1291 		status = at91_adc_readl(st, AT91_SAMA5D2_YPOSR);  in at91_adc_interrupt()
1292 		status = at91_adc_readl(st, AT91_SAMA5D2_PRESSR);  in at91_adc_interrupt()
1304 		st->conversion_value = at91_adc_readl(st, st->chan->address);  in at91_adc_interrupt()
1388 	at91_adc_readl(st, AT91_SAMA5D2_LCDR);  in at91_adc_read_info_raw()