Lines Matching +full:3 +full:rd
36 #define VSX_REGISTER_XTP(rd) ((((rd) & 1) << 5) | ((rd) & 0xfe)) argument
104 if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1)) in branch_taken()
153 ea = (signed short) (instr & ~3); /* sign-extend */ in dsform_ea()
291 up[0] = byterev_8(up[3]); in do_byte_reverse()
292 up[3] = tmp; in do_byte_reverse()
770 i = IS_LE ? 3 - j : j; in emulate_vsx_load()
774 u32 val = reg->w[IS_LE ? 3 : 0]; in emulate_vsx_load()
776 i = IS_LE ? 3 - j : j; in emulate_vsx_load()
869 i = IS_LE ? 3 - j : j; in emulate_vsx_store()
1017 "1: " op " %2,0,%3\n" \
1021 "3: li %0,%4\n" \
1024 EX_TABLE(1b, 3b) \
1033 "3: li %0,%3\n" \
1036 EX_TABLE(1b, 3b) \
1045 "3: li %0,%3\n" \
1048 EX_TABLE(1b, 3b) \
1058 op->ccval = (regs->ccr & 0x0fffffff) | ((regs->xer >> 3) & 0x10000000); in set_cr0()
1082 struct instruction_op *op, int rd, in add_with_carry() argument
1091 op->reg = rd; in add_with_carry()
1279 unsigned int opcode, ra, rb, rc, rd, spr, u; in analyse_instr() local
1332 rd = 7 - ((word >> 23) & 0x7); in analyse_instr()
1334 rd *= 4; in analyse_instr()
1337 op->ccval = (regs->ccr & ~(0xfUL << rd)) | (val << rd); in analyse_instr()
1372 rd = (word >> 21) & 0x1f; in analyse_instr()
1376 op->ccval = (regs->ccr & ~(1UL << (31 - rd))) | in analyse_instr()
1377 (val << (31 - rd)); in analyse_instr()
1386 switch ((word >> 21) & 3) { in analyse_instr()
1404 rd = (word >> 21) & 0x1f; in analyse_instr()
1417 rd = (suffix >> 21) & 0x1f; in analyse_instr()
1418 op->reg = rd; in analyse_instr()
1419 op->val = regs->gpr[rd]; in analyse_instr()
1435 if (rd & trap_compare(regs->gpr[ra], (short) word)) in analyse_instr()
1439 case 3: /* twi */ in analyse_instr()
1440 if (rd & trap_compare((int)regs->gpr[ra], (short) word)) in analyse_instr()
1456 asm volatile(PPC_MADDHD(%0, %1, %2, %3) : in analyse_instr()
1462 asm volatile(PPC_MADDHDU(%0, %1, %2, %3) : in analyse_instr()
1468 asm volatile(PPC_MADDLD(%0, %1, %2, %3) : in analyse_instr()
1487 add_with_carry(regs, op, rd, ~regs->gpr[ra], imm, 1); in analyse_instr()
1494 if ((rd & 1) == 0) in analyse_instr()
1497 do_cmp_unsigned(regs, op, val, imm, rd >> 2); in analyse_instr()
1504 if ((rd & 1) == 0) in analyse_instr()
1507 do_cmp_signed(regs, op, val, imm, rd >> 2); in analyse_instr()
1512 add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0); in analyse_instr()
1517 add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0); in analyse_instr()
1551 val = DATA32(regs->gpr[rd]); in analyse_instr()
1559 val = DATA32(regs->gpr[rd]); in analyse_instr()
1567 val = DATA32(regs->gpr[rd]); in analyse_instr()
1572 op->val = regs->gpr[rd] | (unsigned short) word; in analyse_instr()
1577 op->val = regs->gpr[rd] | (imm << 16); in analyse_instr()
1581 op->val = regs->gpr[rd] ^ (unsigned short) word; in analyse_instr()
1586 op->val = regs->gpr[rd] ^ (imm << 16); in analyse_instr()
1590 op->val = regs->gpr[rd] & (unsigned short) word; in analyse_instr()
1596 op->val = regs->gpr[rd] & (imm << 16); in analyse_instr()
1603 val = regs->gpr[rd]; in analyse_instr()
1607 switch ((word >> 2) & 3) { in analyse_instr()
1617 case 3: /* rldimi */ in analyse_instr()
1653 if (rd == 0x1f || in analyse_instr()
1654 (rd & trap_compare((int)regs->gpr[ra], in analyse_instr()
1660 if (rd & trap_compare(regs->gpr[ra], regs->gpr[rb])) in analyse_instr()
1668 op->reg = rd; in analyse_instr()
1674 op->reg = rd; in analyse_instr()
1682 op->reg = rd; in analyse_instr()
1707 * 'ra' encodes the CR field number (bfa) in the top 3 bits. in analyse_instr()
1728 val = regs->gpr[rd]; in analyse_instr()
1741 op->reg = rd; in analyse_instr()
1751 op->val = regs->gpr[rd]; in analyse_instr()
1765 if ((rd & 1) == 0) { in analyse_instr()
1771 do_cmp_signed(regs, op, val, val2, rd >> 2); in analyse_instr()
1778 if ((rd & 1) == 0) { in analyse_instr()
1784 do_cmp_unsigned(regs, op, val, val2, rd >> 2); in analyse_instr()
1788 do_cmpb(regs, op, regs->gpr[rd], regs->gpr[rb]); in analyse_instr()
1795 add_with_carry(regs, op, rd, ~regs->gpr[ra], in analyse_instr()
1805 add_with_carry(regs, op, rd, regs->gpr[ra], in analyse_instr()
1833 add_with_carry(regs, op, rd, ~regs->gpr[ra], in analyse_instr()
1838 add_with_carry(regs, op, rd, regs->gpr[ra], in analyse_instr()
1843 add_with_carry(regs, op, rd, ~regs->gpr[ra], 0L, in analyse_instr()
1848 add_with_carry(regs, op, rd, regs->gpr[ra], 0L, in analyse_instr()
1853 add_with_carry(regs, op, rd, ~regs->gpr[ra], -1L, in analyse_instr()
1862 add_with_carry(regs, op, rd, regs->gpr[ra], -1L, in analyse_instr()
1960 val = (unsigned int) regs->gpr[rd]; in analyse_instr()
1965 val = regs->gpr[rd]; in analyse_instr()
1970 op->val = regs->gpr[rd] & regs->gpr[rb]; in analyse_instr()
1974 op->val = regs->gpr[rd] & ~regs->gpr[rb]; in analyse_instr()
1978 do_popcnt(regs, op, regs->gpr[rd], 8); in analyse_instr()
1982 op->val = ~(regs->gpr[rd] | regs->gpr[rb]); in analyse_instr()
1986 do_prty(regs, op, regs->gpr[rd], 32); in analyse_instr()
1990 do_prty(regs, op, regs->gpr[rd], 64); in analyse_instr()
1994 do_bpermd(regs, op, regs->gpr[rd], regs->gpr[rb]); in analyse_instr()
1998 op->val = ~(regs->gpr[rd] ^ regs->gpr[rb]); in analyse_instr()
2002 op->val = regs->gpr[rd] ^ regs->gpr[rb]; in analyse_instr()
2006 do_popcnt(regs, op, regs->gpr[rd], 32); in analyse_instr()
2010 op->val = regs->gpr[rd] | ~regs->gpr[rb]; in analyse_instr()
2014 op->val = regs->gpr[rd] | regs->gpr[rb]; in analyse_instr()
2018 op->val = ~(regs->gpr[rd] & regs->gpr[rb]); in analyse_instr()
2022 do_popcnt(regs, op, regs->gpr[rd], 64); in analyse_instr()
2028 val = (unsigned int) regs->gpr[rd]; in analyse_instr()
2035 val = regs->gpr[rd]; in analyse_instr()
2040 op->val = (signed short) regs->gpr[rd]; in analyse_instr()
2044 op->val = (signed char) regs->gpr[rd]; in analyse_instr()
2048 op->val = (signed int) regs->gpr[rd]; in analyse_instr()
2058 op->val = (regs->gpr[rd] << sh) & 0xffffffffUL; in analyse_instr()
2066 op->val = (regs->gpr[rd] & 0xffffffffUL) >> sh; in analyse_instr()
2074 ival = (signed int) regs->gpr[rd]; in analyse_instr()
2087 ival = (signed int) regs->gpr[rd]; in analyse_instr()
2101 op->val = regs->gpr[rd] << sh; in analyse_instr()
2109 op->val = regs->gpr[rd] >> sh; in analyse_instr()
2117 ival = (signed long int) regs->gpr[rd]; in analyse_instr()
2131 ival = (signed long int) regs->gpr[rd]; in analyse_instr()
2147 val = (signed int) regs->gpr[rd]; in analyse_instr()
2172 op->reg = rd; in analyse_instr()
2178 op->reg = rd; in analyse_instr()
2199 op->reg = rd; in analyse_instr()
2200 op->val = regs->gpr[rd]; in analyse_instr()
2243 if (!((rd & 1) || rd == ra || rd == rb)) in analyse_instr()
2248 if (!(rd & 1)) in analyse_instr()
2422 op->val = byterev_8(regs->gpr[rd]); in analyse_instr()
2432 op->val = byterev_4(regs->gpr[rd]); in analyse_instr()
2448 op->val = byterev_2(regs->gpr[rd]); in analyse_instr()
2453 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2459 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2465 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2473 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2484 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2496 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2505 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2513 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2522 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2533 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2547 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2552 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2559 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2565 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2572 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2578 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2586 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2595 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2604 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2611 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2619 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2626 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2634 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2643 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2652 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2659 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2667 op->reg = rd | ((word & 1) << 5); in analyse_instr()
2720 if (ra >= rd) in analyse_instr()
2722 op->type = MKOP(LOAD_MULTI, 0, 4 * (32 - rd)); in analyse_instr()
2727 op->type = MKOP(STORE_MULTI, 0, 4 * (32 - rd)); in analyse_instr()
2759 if (!((rd & 1) || (rd == ra))) in analyse_instr()
2768 switch (word & 3) { in analyse_instr()
2770 if (rd & 1) in analyse_instr()
2777 op->reg = rd + 32; in analyse_instr()
2782 case 3: /* lxssp */ in analyse_instr()
2785 op->reg = rd + 32; in analyse_instr()
2797 switch (word & 3) { in analyse_instr()
2816 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2841 op->reg = rd + 32; in analyse_instr()
2852 op->reg = rd + 32; in analyse_instr()
2858 case 3: /* stxssp with LSB of DS field = 0 */ in analyse_instr()
2863 op->reg = rd + 32; in analyse_instr()
2874 op->reg = rd + 32; in analyse_instr()
2886 switch (word & 3) { in analyse_instr()
2894 if (!(rd & 1)) in analyse_instr()
2906 rd = (suffix >> 21) & 0x1f; in analyse_instr()
2907 op->reg = rd; in analyse_instr()
2908 op->val = regs->gpr[rd]; in analyse_instr()
2923 op->reg = rd + 32; in analyse_instr()
2929 op->reg = rd + 32; in analyse_instr()
2935 op->reg = rd + 32; in analyse_instr()
2941 op->reg = rd + 32; in analyse_instr()
2955 op->reg = rd + 32; in analyse_instr()
2971 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
2984 op->reg = VSX_REGISTER_XTP(rd); in analyse_instr()
3033 case 3: /* Type 11 Modified Register-to-Register */ in analyse_instr()
3043 if (ra == rd) in analyse_instr()
3080 op->reg = rd; in analyse_instr()
3244 int i, rd, nb; in emulate_loadstore() local
3328 ((regs->xer >> 3) & 0x10000000); in emulate_loadstore()
3388 rd = op->reg; in emulate_loadstore()
3400 regs->gpr[rd] = v32; in emulate_loadstore()
3403 rd = (rd + 1) & 0x1f; in emulate_loadstore()
3459 rd = op->reg; in emulate_loadstore()
3461 unsigned int v32 = regs->gpr[rd]; in emulate_loadstore()
3473 rd = (rd + 1) & 0x1f; in emulate_loadstore()