1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
30 						 int direction)  in cl_stream_prepare()  argument
34 	struct pci_dev *pci = to_pci_dev(sdev->dev);  in cl_stream_prepare()
37 	dsp_stream = hda_dsp_stream_get(sdev, direction);  in cl_stream_prepare()
40 		dev_err(sdev->dev, "error: no stream available\n");  in cl_stream_prepare()
41 		return ERR_PTR(-ENODEV);  in cl_stream_prepare()
43 	hstream = &dsp_stream->hstream;  in cl_stream_prepare()
44 	hstream->substream = NULL;  in cl_stream_prepare()
47 	ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV_SG, &pci->dev, size, dmab);  in cl_stream_prepare()
49 		dev_err(sdev->dev, "error: memory alloc failed: %x\n", ret);  in cl_stream_prepare()
53 	hstream->period_bytes = 0;/* initialize period_bytes */  in cl_stream_prepare()
54 	hstream->format_val = format;  in cl_stream_prepare()
55 	hstream->bufsize = size;  in cl_stream_prepare()
57 	if (direction == SNDRV_PCM_STREAM_CAPTURE) {  in cl_stream_prepare()
60 			dev_err(sdev->dev, "error: iccmax stream prepare failed: %x\n", ret);  in cl_stream_prepare()
66 			dev_err(sdev->dev, "error: hdac prepare failed: %x\n", ret);  in cl_stream_prepare()
75 	hda_dsp_stream_put(sdev, direction, hstream->stream_tag);  in cl_stream_prepare()
87 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;  in cl_dsp_init()
88 	const struct sof_intel_dsp_desc *chip = hda->desc;  in cl_dsp_init()
94 	ret = hda_dsp_core_power_up(sdev, chip->host_managed_cores_mask);  in cl_dsp_init()
96 		if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)  in cl_dsp_init()
97 			dev_err(sdev->dev, "error: dsp core 0/1 power up failed\n");  in cl_dsp_init()
102 	for (i = 0; i < chip->ssp_count; i++) {  in cl_dsp_init()
104 						 chip->ssp_base_offset  in cl_dsp_init()
112 	snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req,  in cl_dsp_init()
113 			  chip->ipc_req_mask | (HDA_DSP_IPC_PURGE_FW |  in cl_dsp_init()
114 			  ((stream_tag - 1) << 9)));  in cl_dsp_init()
119 		if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)  in cl_dsp_init()
120 			dev_err(sdev->dev,  in cl_dsp_init()
122 		ret = -EIO;  in cl_dsp_init()
128 					    chip->ipc_ack, status,  in cl_dsp_init()
129 					    ((status & chip->ipc_ack_mask)  in cl_dsp_init()
130 						    == chip->ipc_ack_mask),  in cl_dsp_init()
135 		if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)  in cl_dsp_init()
136 			dev_err(sdev->dev,  in cl_dsp_init()
144 				       chip->ipc_ack,  in cl_dsp_init()
145 				       chip->ipc_ack_mask,  in cl_dsp_init()
146 				       chip->ipc_ack_mask);  in cl_dsp_init()
149 	ret = hda_dsp_core_power_down(sdev, chip->host_managed_cores_mask & ~(BIT(0)));  in cl_dsp_init()
151 		if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)  in cl_dsp_init()
152 			dev_err(sdev->dev,  in cl_dsp_init()
166 					chip->rom_init_timeout *  in cl_dsp_init()
171 	if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)  in cl_dsp_init()
172 		dev_err(sdev->dev,  in cl_dsp_init()
178 	hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask);  in cl_dsp_init()
186 	struct hdac_stream *hstream = &stream->hstream;  in cl_trigger()
193 					1 << hstream->index,  in cl_trigger()
194 					1 << hstream->index);  in cl_trigger()
203 		hstream->running = true;  in cl_trigger()
213 	struct hdac_stream *hstream = &stream->hstream;  in cl_cleanup()
217 	if (hstream->direction == SNDRV_PCM_STREAM_PLAYBACK)  in cl_cleanup()
223 	hda_dsp_stream_put(sdev, hstream->direction, hstream->stream_tag);  in cl_cleanup()
224 	hstream->running = 0;  in cl_cleanup()
225 	hstream->substream = NULL;  in cl_cleanup()
235 	dmab->area = NULL;  in cl_cleanup()
236 	hstream->bufsize = 0;  in cl_cleanup()
237 	hstream->format_val = 0;  in cl_cleanup()
249 		dev_err(sdev->dev, "error: DMA trigger start failed\n");  in cl_copy_fw()
266 		dev_err(sdev->dev,  in cl_copy_fw()
273 		dev_err(sdev->dev, "error: DMA trigger stop failed\n");  in cl_copy_fw()
283 	struct snd_sof_pdata *plat_data = sdev->pdata;  in hda_dsp_cl_boot_firmware_iccmax()
293 	if (plat_data->fw->size <= plat_data->fw_offset) {  in hda_dsp_cl_boot_firmware_iccmax()
294 		dev_err(sdev->dev, "error: firmware size must be greater than firmware offset\n");  in hda_dsp_cl_boot_firmware_iccmax()
295 		return -EINVAL;  in hda_dsp_cl_boot_firmware_iccmax()
298 	stripped_firmware.size = plat_data->fw->size - plat_data->fw_offset;  in hda_dsp_cl_boot_firmware_iccmax()
302 					  &sdev->dmab_bdl, SNDRV_PCM_STREAM_CAPTURE);  in hda_dsp_cl_boot_firmware_iccmax()
304 		dev_err(sdev->dev, "error: dma prepare for ICCMAX stream failed\n");  in hda_dsp_cl_boot_firmware_iccmax()
314 	ret1 = cl_cleanup(sdev, &sdev->dmab_bdl, iccmax_stream);  in hda_dsp_cl_boot_firmware_iccmax()
316 		dev_err(sdev->dev, "error: ICCMAX stream cleanup failed\n");  in hda_dsp_cl_boot_firmware_iccmax()
331 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;  in hda_dsp_cl_boot_firmware()
332 	struct snd_sof_pdata *plat_data = sdev->pdata;  in hda_dsp_cl_boot_firmware()
333 	const struct sof_dev_desc *desc = plat_data->desc;  in hda_dsp_cl_boot_firmware()
339 	chip_info = desc->chip_info;  in hda_dsp_cl_boot_firmware()
341 	if (plat_data->fw->size <= plat_data->fw_offset) {  in hda_dsp_cl_boot_firmware()
342 		dev_err(sdev->dev, "error: firmware size must be greater than firmware offset\n");  in hda_dsp_cl_boot_firmware()
343 		return -EINVAL;  in hda_dsp_cl_boot_firmware()
346 	stripped_firmware.data = plat_data->fw->data + plat_data->fw_offset;  in hda_dsp_cl_boot_firmware()
347 	stripped_firmware.size = plat_data->fw->size - plat_data->fw_offset;  in hda_dsp_cl_boot_firmware()
350 	init_waitqueue_head(&sdev->boot_wait);  in hda_dsp_cl_boot_firmware()
354 				   &sdev->dmab, SNDRV_PCM_STREAM_PLAYBACK);  in hda_dsp_cl_boot_firmware()
356 		dev_err(sdev->dev, "error: dma prepare for fw loading failed\n");  in hda_dsp_cl_boot_firmware()
360 	memcpy(sdev->dmab.area, stripped_firmware.data,  in hda_dsp_cl_boot_firmware()
365 		dev_dbg(sdev->dev,  in hda_dsp_cl_boot_firmware()
368 		hda->boot_iteration = i + 1;  in hda_dsp_cl_boot_firmware()
369 		ret = cl_dsp_init(sdev, stream->hstream.stream_tag);  in hda_dsp_cl_boot_firmware()
377 		dev_err(sdev->dev, "error: dsp init failed after %d attempts with err: %d\n",  in hda_dsp_cl_boot_firmware()
379 		dev_err(sdev->dev, "ROM error=0x%x: FW status=0x%x\n",  in hda_dsp_cl_boot_firmware()
389 	 * device may trigger in-band wakes for events such as jack  in hda_dsp_cl_boot_firmware()
402 	if (!sdev->first_boot)  in hda_dsp_cl_boot_firmware()
411 		dev_dbg(sdev->dev, "Firmware download successful, booting...\n");  in hda_dsp_cl_boot_firmware()
413 		dev_err(sdev->dev, "error: load fw failed ret: %d\n", ret);  in hda_dsp_cl_boot_firmware()
421 	ret1 = cl_cleanup(sdev, &sdev->dmab, stream);  in hda_dsp_cl_boot_firmware()
423 		dev_err(sdev->dev, "error: Code loader DSP cleanup failed\n");  in hda_dsp_cl_boot_firmware()
435 		return chip_info->init_core_mask;  in hda_dsp_cl_boot_firmware()
459 	if (sdev->first_boot) {  in hda_dsp_post_fw_run()
462 			dev_err(sdev->dev,  in hda_dsp_post_fw_run()
470 	/* re-enable clock gating and power gating */  in hda_dsp_post_fw_run()