353 static inline void stm32_spi_set_bits(struct stm32_spi *spi,  in stm32_spi_set_bits()  function
378 	stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_SPE);  in stm32h7_spi_get_fifo_size()
417 	stm32_spi_set_bits(spi, STM32H7_SPI_CFG1, STM32H7_SPI_CFG1_DSIZE);  in stm32h7_spi_get_bpw_mask()
654 	stm32_spi_set_bits(spi, spi->cfg->regs->en.reg,  in stm32_spi_enable()
1185 	stm32_spi_set_bits(spi, STM32F4_SPI_CR2, cr2);  in stm32f4_spi_transfer_one_irq()
1231 	stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_CSTART);  in stm32h7_spi_transfer_one_irq()
1255 		stm32_spi_set_bits(spi, STM32F4_SPI_CR2, STM32F4_SPI_CR2_ERRIE);  in stm32f4_spi_transfer_one_dma_start()
1269 	stm32_spi_set_bits(spi, STM32H7_SPI_IER, STM32H7_SPI_IER_EOTIE |  in stm32h7_spi_transfer_one_dma_start()
1276 	stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_CSTART);  in stm32h7_spi_transfer_one_dma_start()
1302 		stm32_spi_set_bits(spi, spi->cfg->regs->dma_rx_en.reg,  in stm32_spi_transfer_one_dma()
1358 		stm32_spi_set_bits(spi, spi->cfg->regs->dma_tx_en.reg,  in stm32_spi_transfer_one_dma()
1391 		stm32_spi_set_bits(spi, STM32F4_SPI_CR1, STM32F4_SPI_CR1_DFF);  in stm32f4_spi_set_bpw()
1481 		stm32_spi_set_bits(spi, STM32F4_SPI_CR1,  in stm32f4_spi_set_mode()
1490 		stm32_spi_set_bits(spi, STM32F4_SPI_CR1,  in stm32f4_spi_set_mode()
1516 		stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_HDDIR);  in stm32h7_spi_set_mode()
1736 	stm32_spi_set_bits(spi, STM32F4_SPI_CR1, STM32F4_SPI_CR1_SSI |  in stm32f4_spi_config()
1765 	stm32_spi_set_bits(spi, STM32H7_SPI_CR1, STM32H7_SPI_CR1_SSI |  in stm32h7_spi_config()
1775 	stm32_spi_set_bits(spi, STM32H7_SPI_CFG2, STM32H7_SPI_CFG2_MASTER |  in stm32h7_spi_config()