Lines Matching +full:imx7ulp +full:- +full:tpm
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018-2019 NXP.
6 * - The TPM counter and period counter are shared between
9 * - Changes to polarity cannot be latched at the time of the
11 * - Changing period and duty cycle together isn't atomic,
49 * together as a 2-bit field here.
57 #define PWM_IMX_TPM_MOD_MOD GENMASK(PWM_IMX_TPM_MOD_WIDTH - 1, 0)
92 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); in pwm_imx_tpm_round_state() local
96 rate = clk_get_rate(tpm->clk); in pwm_imx_tpm_round_state()
97 tmp = (u64)state->period * rate; in pwm_imx_tpm_round_state()
102 prescale = ilog2(clock_unit) + 1 - PWM_IMX_TPM_MOD_WIDTH; in pwm_imx_tpm_round_state()
105 return -ERANGE; in pwm_imx_tpm_round_state()
106 p->prescale = prescale; in pwm_imx_tpm_round_state()
109 p->mod = period_count; in pwm_imx_tpm_round_state()
114 real_state->period = DIV_ROUND_CLOSEST_ULL(tmp, rate); in pwm_imx_tpm_round_state()
121 if (!state->enabled) in pwm_imx_tpm_round_state()
122 real_state->duty_cycle = 0; in pwm_imx_tpm_round_state()
124 real_state->duty_cycle = state->duty_cycle; in pwm_imx_tpm_round_state()
126 tmp = (u64)p->mod * real_state->duty_cycle; in pwm_imx_tpm_round_state()
127 p->val = DIV64_U64_ROUND_CLOSEST(tmp, real_state->period); in pwm_imx_tpm_round_state()
129 real_state->polarity = state->polarity; in pwm_imx_tpm_round_state()
130 real_state->enabled = state->enabled; in pwm_imx_tpm_round_state()
139 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); in pwm_imx_tpm_get_state() local
144 state->period = tpm->real_period; in pwm_imx_tpm_get_state()
147 rate = clk_get_rate(tpm->clk); in pwm_imx_tpm_get_state()
148 val = readl(tpm->base + PWM_IMX_TPM_SC); in pwm_imx_tpm_get_state()
150 tmp = readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm)); in pwm_imx_tpm_get_state()
152 state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, rate); in pwm_imx_tpm_get_state()
155 val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm)); in pwm_imx_tpm_get_state()
157 state->polarity = PWM_POLARITY_INVERSED; in pwm_imx_tpm_get_state()
163 state->polarity = PWM_POLARITY_NORMAL; in pwm_imx_tpm_get_state()
166 state->enabled = FIELD_GET(PWM_IMX_TPM_CnSC_ELS, val) ? true : false; in pwm_imx_tpm_get_state()
175 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); in pwm_imx_tpm_apply_hw() local
182 if (state->period != tpm->real_period) { in pwm_imx_tpm_apply_hw()
184 * TPM counter is shared by multiple channels, so in pwm_imx_tpm_apply_hw()
189 if (tpm->user_count > 1) in pwm_imx_tpm_apply_hw()
190 return -EBUSY; in pwm_imx_tpm_apply_hw()
192 val = readl(tpm->base + PWM_IMX_TPM_SC); in pwm_imx_tpm_apply_hw()
195 if (cmod && cur_prescale != p->prescale) in pwm_imx_tpm_apply_hw()
196 return -EBUSY; in pwm_imx_tpm_apply_hw()
198 /* set TPM counter prescale */ in pwm_imx_tpm_apply_hw()
200 val |= FIELD_PREP(PWM_IMX_TPM_SC_PS, p->prescale); in pwm_imx_tpm_apply_hw()
201 writel(val, tpm->base + PWM_IMX_TPM_SC); in pwm_imx_tpm_apply_hw()
211 writel(p->mod, tpm->base + PWM_IMX_TPM_MOD); in pwm_imx_tpm_apply_hw()
212 tpm->real_period = state->period; in pwm_imx_tpm_apply_hw()
219 if (c.enabled && c.polarity != state->polarity) in pwm_imx_tpm_apply_hw()
220 return -EBUSY; in pwm_imx_tpm_apply_hw()
222 if (state->duty_cycle != c.duty_cycle) { in pwm_imx_tpm_apply_hw()
231 writel(p->val, tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm)); in pwm_imx_tpm_apply_hw()
237 timeout = jiffies + msecs_to_jiffies(tpm->real_period / in pwm_imx_tpm_apply_hw()
239 while (readl(tpm->base + PWM_IMX_TPM_MOD) != p->mod in pwm_imx_tpm_apply_hw()
240 || readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm)) in pwm_imx_tpm_apply_hw()
241 != p->val) { in pwm_imx_tpm_apply_hw()
243 return -ETIME; in pwm_imx_tpm_apply_hw()
254 val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm)); in pwm_imx_tpm_apply_hw()
257 if (state->enabled) { in pwm_imx_tpm_apply_hw()
259 * set polarity (for edge-aligned PWM modes) in pwm_imx_tpm_apply_hw()
266 val |= (state->polarity == PWM_POLARITY_NORMAL) ? in pwm_imx_tpm_apply_hw()
270 writel(val, tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm)); in pwm_imx_tpm_apply_hw()
273 if (state->enabled != c.enabled) { in pwm_imx_tpm_apply_hw()
274 val = readl(tpm->base + PWM_IMX_TPM_SC); in pwm_imx_tpm_apply_hw()
275 if (state->enabled) { in pwm_imx_tpm_apply_hw()
276 if (++tpm->enable_count == 1) in pwm_imx_tpm_apply_hw()
279 if (--tpm->enable_count == 0) in pwm_imx_tpm_apply_hw()
282 writel(val, tpm->base + PWM_IMX_TPM_SC); in pwm_imx_tpm_apply_hw()
292 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); in pwm_imx_tpm_apply() local
301 mutex_lock(&tpm->lock); in pwm_imx_tpm_apply()
303 mutex_unlock(&tpm->lock); in pwm_imx_tpm_apply()
310 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); in pwm_imx_tpm_request() local
312 mutex_lock(&tpm->lock); in pwm_imx_tpm_request()
313 tpm->user_count++; in pwm_imx_tpm_request()
314 mutex_unlock(&tpm->lock); in pwm_imx_tpm_request()
321 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); in pwm_imx_tpm_free() local
323 mutex_lock(&tpm->lock); in pwm_imx_tpm_free()
324 tpm->user_count--; in pwm_imx_tpm_free()
325 mutex_unlock(&tpm->lock); in pwm_imx_tpm_free()
338 struct imx_tpm_pwm_chip *tpm; in pwm_imx_tpm_probe() local
342 tpm = devm_kzalloc(&pdev->dev, sizeof(*tpm), GFP_KERNEL); in pwm_imx_tpm_probe()
343 if (!tpm) in pwm_imx_tpm_probe()
344 return -ENOMEM; in pwm_imx_tpm_probe()
346 platform_set_drvdata(pdev, tpm); in pwm_imx_tpm_probe()
348 tpm->base = devm_platform_ioremap_resource(pdev, 0); in pwm_imx_tpm_probe()
349 if (IS_ERR(tpm->base)) in pwm_imx_tpm_probe()
350 return PTR_ERR(tpm->base); in pwm_imx_tpm_probe()
352 tpm->clk = devm_clk_get(&pdev->dev, NULL); in pwm_imx_tpm_probe()
353 if (IS_ERR(tpm->clk)) { in pwm_imx_tpm_probe()
354 ret = PTR_ERR(tpm->clk); in pwm_imx_tpm_probe()
355 if (ret != -EPROBE_DEFER) in pwm_imx_tpm_probe()
356 dev_err(&pdev->dev, in pwm_imx_tpm_probe()
361 ret = clk_prepare_enable(tpm->clk); in pwm_imx_tpm_probe()
363 dev_err(&pdev->dev, in pwm_imx_tpm_probe()
368 tpm->chip.dev = &pdev->dev; in pwm_imx_tpm_probe()
369 tpm->chip.ops = &imx_tpm_pwm_ops; in pwm_imx_tpm_probe()
370 tpm->chip.base = -1; in pwm_imx_tpm_probe()
371 tpm->chip.of_xlate = of_pwm_xlate_with_flags; in pwm_imx_tpm_probe()
372 tpm->chip.of_pwm_n_cells = 3; in pwm_imx_tpm_probe()
375 val = readl(tpm->base + PWM_IMX_TPM_PARAM); in pwm_imx_tpm_probe()
376 tpm->chip.npwm = FIELD_GET(PWM_IMX_TPM_PARAM_CHAN, val); in pwm_imx_tpm_probe()
378 mutex_init(&tpm->lock); in pwm_imx_tpm_probe()
380 ret = pwmchip_add(&tpm->chip); in pwm_imx_tpm_probe()
382 dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret); in pwm_imx_tpm_probe()
383 clk_disable_unprepare(tpm->clk); in pwm_imx_tpm_probe()
391 struct imx_tpm_pwm_chip *tpm = platform_get_drvdata(pdev); in pwm_imx_tpm_remove() local
392 int ret = pwmchip_remove(&tpm->chip); in pwm_imx_tpm_remove()
394 clk_disable_unprepare(tpm->clk); in pwm_imx_tpm_remove()
401 struct imx_tpm_pwm_chip *tpm = dev_get_drvdata(dev); in pwm_imx_tpm_suspend() local
403 if (tpm->enable_count > 0) in pwm_imx_tpm_suspend()
404 return -EBUSY; in pwm_imx_tpm_suspend()
406 clk_disable_unprepare(tpm->clk); in pwm_imx_tpm_suspend()
413 struct imx_tpm_pwm_chip *tpm = dev_get_drvdata(dev); in pwm_imx_tpm_resume() local
416 ret = clk_prepare_enable(tpm->clk); in pwm_imx_tpm_resume()
429 { .compatible = "fsl,imx7ulp-pwm", },
436 .name = "imx7ulp-tpm-pwm",
446 MODULE_DESCRIPTION("i.MX TPM PWM Driver");