Lines Matching full:phy

33 static inline u32 camerarx_read(struct cal_camerarx *phy, u32 offset)  in camerarx_read()  argument
35 return ioread32(phy->base + offset); in camerarx_read()
38 static inline void camerarx_write(struct cal_camerarx *phy, u32 offset, u32 val) in camerarx_write() argument
40 iowrite32(val, phy->base + offset); in camerarx_write()
48 static s64 cal_camerarx_get_external_rate(struct cal_camerarx *phy) in cal_camerarx_get_external_rate() argument
53 ctrl = v4l2_ctrl_find(phy->sensor->ctrl_handler, V4L2_CID_PIXEL_RATE); in cal_camerarx_get_external_rate()
55 phy_err(phy, "no pixel rate control in subdev: %s\n", in cal_camerarx_get_external_rate()
56 phy->sensor->name); in cal_camerarx_get_external_rate()
61 phy_dbg(3, phy, "sensor Pixel Rate: %llu\n", rate); in cal_camerarx_get_external_rate()
66 static void cal_camerarx_lane_config(struct cal_camerarx *phy) in cal_camerarx_lane_config() argument
68 u32 val = cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)); in cal_camerarx_lane_config()
72 &phy->endpoint.bus.mipi_csi2; in cal_camerarx_lane_config()
89 cal_write(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), val); in cal_camerarx_lane_config()
90 phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x\n", in cal_camerarx_lane_config()
91 phy->instance, val); in cal_camerarx_lane_config()
94 static void cal_camerarx_enable(struct cal_camerarx *phy) in cal_camerarx_enable() argument
96 u32 num_lanes = phy->cal->data->camerarx[phy->instance].num_lanes; in cal_camerarx_enable()
98 regmap_field_write(phy->fields[F_CAMMODE], 0); in cal_camerarx_enable()
99 /* Always enable all lanes at the phy control level */ in cal_camerarx_enable()
100 regmap_field_write(phy->fields[F_LANEENABLE], (1 << num_lanes) - 1); in cal_camerarx_enable()
102 if (phy->fields[F_CSI_MODE]) in cal_camerarx_enable()
103 regmap_field_write(phy->fields[F_CSI_MODE], 1); in cal_camerarx_enable()
104 regmap_field_write(phy->fields[F_CTRLCLKEN], 1); in cal_camerarx_enable()
107 void cal_camerarx_disable(struct cal_camerarx *phy) in cal_camerarx_disable() argument
109 regmap_field_write(phy->fields[F_CTRLCLKEN], 0); in cal_camerarx_disable()
119 static void cal_camerarx_config(struct cal_camerarx *phy, s64 external_rate, in cal_camerarx_config() argument
126 &phy->endpoint.bus.mipi_csi2; in cal_camerarx_config()
140 phy_dbg(1, phy, "csi2_ddrclk_khz: %d\n", csi2_ddrclk_khz); in cal_camerarx_config()
144 phy_dbg(1, phy, "ths_term: %d (0x%02x)\n", ths_term, ths_term); in cal_camerarx_config()
148 phy_dbg(1, phy, "ths_settle: %d (0x%02x)\n", ths_settle, ths_settle); in cal_camerarx_config()
150 reg0 = camerarx_read(phy, CAL_CSI2_PHY_REG0); in cal_camerarx_config()
156 phy_dbg(1, phy, "CSI2_%d_REG0 = 0x%08x\n", phy->instance, reg0); in cal_camerarx_config()
157 camerarx_write(phy, CAL_CSI2_PHY_REG0, reg0); in cal_camerarx_config()
159 reg1 = camerarx_read(phy, CAL_CSI2_PHY_REG1); in cal_camerarx_config()
166 phy_dbg(1, phy, "CSI2_%d_REG1 = 0x%08x\n", phy->instance, reg1); in cal_camerarx_config()
167 camerarx_write(phy, CAL_CSI2_PHY_REG1, reg1); in cal_camerarx_config()
170 static void cal_camerarx_power(struct cal_camerarx *phy, bool enable) in cal_camerarx_power() argument
178 cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_power()
184 current_state = cal_read_field(phy->cal, in cal_camerarx_power()
185 CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_power()
195 phy_err(phy, "Failed to power %s complexio\n", in cal_camerarx_power()
199 static void cal_camerarx_wait_reset(struct cal_camerarx *phy) in cal_camerarx_wait_reset() argument
205 if (cal_read_field(phy->cal, in cal_camerarx_wait_reset()
206 CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_wait_reset()
213 if (cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_wait_reset()
216 phy_err(phy, "Timeout waiting for Complex IO reset done\n"); in cal_camerarx_wait_reset()
219 static void cal_camerarx_wait_stop_state(struct cal_camerarx *phy) in cal_camerarx_wait_stop_state() argument
225 if (cal_read_field(phy->cal, in cal_camerarx_wait_stop_state()
226 CAL_CSI2_TIMING(phy->instance), in cal_camerarx_wait_stop_state()
232 if (cal_read_field(phy->cal, CAL_CSI2_TIMING(phy->instance), in cal_camerarx_wait_stop_state()
234 phy_err(phy, "Timeout waiting for stop state\n"); in cal_camerarx_wait_stop_state()
237 int cal_camerarx_start(struct cal_camerarx *phy, const struct cal_fmt *fmt) in cal_camerarx_start() argument
244 external_rate = cal_camerarx_get_external_rate(phy); in cal_camerarx_start()
248 ret = v4l2_subdev_call(phy->sensor, core, s_power, 1); in cal_camerarx_start()
250 phy_err(phy, "power on failed in subdev\n"); in cal_camerarx_start()
255 * CSI-2 PHY Link Initialization Sequence, according to the DRA74xP / in cal_camerarx_start()
262 * receive signals/data from the CSI-2 PHY. in cal_camerarx_start()
266 cal_camerarx_lane_config(phy); in cal_camerarx_start()
269 * vi.-vii. Configure D-PHY mode, enable the required lanes and in cal_camerarx_start()
272 cal_camerarx_enable(phy); in cal_camerarx_start()
275 * 2. CSI PHY and link initialization sequence. in cal_camerarx_start()
277 * a. Deassert the CSI-2 PHY reset. Do not wait for reset completion in cal_camerarx_start()
281 cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_start()
284 phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x De-assert Complex IO Reset\n", in cal_camerarx_start()
285 phy->instance, in cal_camerarx_start()
286 cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance))); in cal_camerarx_start()
289 camerarx_read(phy, CAL_CSI2_PHY_REG0); in cal_camerarx_start()
291 /* Program the PHY timing parameters. */ in cal_camerarx_start()
292 cal_camerarx_config(phy, external_rate, fmt); in cal_camerarx_start()
304 sscounter = DIV_ROUND_UP(clk_get_rate(phy->cal->fclk), 10000 * 16 * 4); in cal_camerarx_start()
306 val = cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance)); in cal_camerarx_start()
311 cal_write(phy->cal, CAL_CSI2_TIMING(phy->instance), val); in cal_camerarx_start()
312 phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n", in cal_camerarx_start()
313 phy->instance, in cal_camerarx_start()
314 cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); in cal_camerarx_start()
317 cal_write_field(phy->cal, CAL_CSI2_TIMING(phy->instance), in cal_camerarx_start()
319 phy_dbg(3, phy, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", in cal_camerarx_start()
320 phy->instance, in cal_camerarx_start()
321 cal_read(phy->cal, CAL_CSI2_TIMING(phy->instance))); in cal_camerarx_start()
324 * c. Connect pull-down on CSI-2 PHY link (using pad control). in cal_camerarx_start()
331 * d. Power up the CSI-2 PHY. in cal_camerarx_start()
334 cal_camerarx_power(phy, true); in cal_camerarx_start()
338 * CSI-2 PHY reset to complete. in cal_camerarx_start()
340 ret = v4l2_subdev_call(phy->sensor, video, s_stream, 1); in cal_camerarx_start()
342 v4l2_subdev_call(phy->sensor, core, s_power, 0); in cal_camerarx_start()
343 phy_err(phy, "stream on failed in subdev\n"); in cal_camerarx_start()
347 cal_camerarx_wait_reset(phy); in cal_camerarx_start()
350 cal_camerarx_wait_stop_state(phy); in cal_camerarx_start()
352 phy_dbg(1, phy, "CSI2_%u_REG1 = 0x%08x (bits 31-28 should be set)\n", in cal_camerarx_start()
353 phy->instance, camerarx_read(phy, CAL_CSI2_PHY_REG1)); in cal_camerarx_start()
356 * g. Disable pull-down on CSI-2 PHY link (using pad control). in cal_camerarx_start()
365 void cal_camerarx_stop(struct cal_camerarx *phy) in cal_camerarx_stop() argument
370 cal_camerarx_power(phy, false); in cal_camerarx_stop()
373 cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_stop()
379 if (cal_read_field(phy->cal, in cal_camerarx_stop()
380 CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_stop()
386 phy_dbg(3, phy, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Complex IO in Reset (%d) %s\n", in cal_camerarx_stop()
387 phy->instance, in cal_camerarx_stop()
388 cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)), i, in cal_camerarx_stop()
391 /* Disable the phy */ in cal_camerarx_stop()
392 cal_camerarx_disable(phy); in cal_camerarx_stop()
394 if (v4l2_subdev_call(phy->sensor, video, s_stream, 0)) in cal_camerarx_stop()
395 phy_err(phy, "stream off failed in subdev\n"); in cal_camerarx_stop()
397 ret = v4l2_subdev_call(phy->sensor, core, s_power, 0); in cal_camerarx_stop()
399 phy_err(phy, "power off failed in subdev\n"); in cal_camerarx_stop()
421 void cal_camerarx_i913_errata(struct cal_camerarx *phy) in cal_camerarx_i913_errata() argument
423 u32 reg10 = camerarx_read(phy, CAL_CSI2_PHY_REG10); in cal_camerarx_i913_errata()
427 phy_dbg(1, phy, "CSI2_%d_REG10 = 0x%08x\n", phy->instance, reg10); in cal_camerarx_i913_errata()
428 camerarx_write(phy, CAL_CSI2_PHY_REG10, reg10); in cal_camerarx_i913_errata()
434 void cal_camerarx_enable_irqs(struct cal_camerarx *phy) in cal_camerarx_enable_irqs() argument
445 cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), in cal_camerarx_enable_irqs()
446 CAL_HL_IRQ_CIO_MASK(phy->instance)); in cal_camerarx_enable_irqs()
447 cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), in cal_camerarx_enable_irqs()
451 cal_write(phy->cal, CAL_HL_IRQENABLE_SET(0), CAL_HL_IRQ_OCPO_ERR_MASK); in cal_camerarx_enable_irqs()
455 cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); in cal_camerarx_enable_irqs()
456 cal_write(phy->cal, CAL_HL_IRQENABLE_SET(1), val); in cal_camerarx_enable_irqs()
459 cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); in cal_camerarx_enable_irqs()
460 cal_write(phy->cal, CAL_HL_IRQENABLE_SET(2), val); in cal_camerarx_enable_irqs()
462 cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0xFF000000); in cal_camerarx_enable_irqs()
465 void cal_camerarx_disable_irqs(struct cal_camerarx *phy) in cal_camerarx_disable_irqs() argument
470 cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(0), in cal_camerarx_disable_irqs()
471 CAL_HL_IRQ_CIO_MASK(phy->instance)); in cal_camerarx_disable_irqs()
472 cal_write(phy->cal, CAL_CSI2_COMPLEXIO_IRQENABLE(phy->instance), 0); in cal_camerarx_disable_irqs()
476 cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); in cal_camerarx_disable_irqs()
477 cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(1), val); in cal_camerarx_disable_irqs()
480 cal_set_field(&val, 1, CAL_HL_IRQ_MASK(phy->instance)); in cal_camerarx_disable_irqs()
481 cal_write(phy->cal, CAL_HL_IRQENABLE_CLR(2), val); in cal_camerarx_disable_irqs()
483 cal_write(phy->cal, CAL_CSI2_VC_IRQENABLE(0), 0); in cal_camerarx_disable_irqs()
486 void cal_camerarx_ppi_enable(struct cal_camerarx *phy) in cal_camerarx_ppi_enable() argument
488 cal_write(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), BIT(3)); in cal_camerarx_ppi_enable()
489 cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), in cal_camerarx_ppi_enable()
493 void cal_camerarx_ppi_disable(struct cal_camerarx *phy) in cal_camerarx_ppi_disable() argument
495 cal_write_field(phy->cal, CAL_CSI2_PPI_CTRL(phy->instance), in cal_camerarx_ppi_disable()
500 struct cal_camerarx *phy) in cal_camerarx_regmap_init() argument
508 phy_data = &cal->data->camerarx[phy->instance]; in cal_camerarx_regmap_init()
521 phy->fields[i] = devm_regmap_field_alloc(cal->dev, in cal_camerarx_regmap_init()
524 if (IS_ERR(phy->fields[i])) { in cal_camerarx_regmap_init()
526 return PTR_ERR(phy->fields[i]); in cal_camerarx_regmap_init()
533 static int cal_camerarx_parse_dt(struct cal_camerarx *phy) in cal_camerarx_parse_dt() argument
535 struct v4l2_fwnode_endpoint *endpoint = &phy->endpoint; in cal_camerarx_parse_dt()
542 * Find the endpoint node for the port corresponding to the PHY in cal_camerarx_parse_dt()
545 ep_node = of_graph_get_endpoint_by_regs(phy->cal->dev->of_node, in cal_camerarx_parse_dt()
546 phy->instance, 0); in cal_camerarx_parse_dt()
549 * The endpoint is not mandatory, not all PHY instances need to in cal_camerarx_parse_dt()
552 phy_dbg(3, phy, "Port has no endpoint\n"); in cal_camerarx_parse_dt()
559 phy_err(phy, "Failed to parse endpoint\n"); in cal_camerarx_parse_dt()
567 phy_err(phy, "Invalid position %u for data lane %u\n", in cal_camerarx_parse_dt()
579 phy_dbg(3, phy, in cal_camerarx_parse_dt()
585 phy->sensor_node = of_graph_get_remote_port_parent(ep_node); in cal_camerarx_parse_dt()
586 if (!phy->sensor_node) { in cal_camerarx_parse_dt()
587 phy_dbg(3, phy, "Can't get remote parent\n"); in cal_camerarx_parse_dt()
592 phy_dbg(1, phy, "Found connected device %pOFn\n", phy->sensor_node); in cal_camerarx_parse_dt()
603 struct cal_camerarx *phy; in cal_camerarx_create() local
606 phy = kzalloc(sizeof(*phy), GFP_KERNEL); in cal_camerarx_create()
607 if (!phy) in cal_camerarx_create()
610 phy->cal = cal; in cal_camerarx_create()
611 phy->instance = instance; in cal_camerarx_create()
613 phy->res = platform_get_resource_byname(pdev, IORESOURCE_MEM, in cal_camerarx_create()
617 phy->base = devm_ioremap_resource(cal->dev, phy->res); in cal_camerarx_create()
618 if (IS_ERR(phy->base)) { in cal_camerarx_create()
620 ret = PTR_ERR(phy->base); in cal_camerarx_create()
625 phy->res->name, &phy->res->start, &phy->res->end); in cal_camerarx_create()
627 ret = cal_camerarx_regmap_init(cal, phy); in cal_camerarx_create()
631 ret = cal_camerarx_parse_dt(phy); in cal_camerarx_create()
635 return phy; in cal_camerarx_create()
638 kfree(phy); in cal_camerarx_create()
642 void cal_camerarx_destroy(struct cal_camerarx *phy) in cal_camerarx_destroy() argument
644 if (!phy) in cal_camerarx_destroy()
647 of_node_put(phy->sensor_node); in cal_camerarx_destroy()
648 kfree(phy); in cal_camerarx_destroy()