Lines Matching +full:deep +full:- +full:touch
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
7 * Portions Copyright (C) 2005-2009 MontaVista Software, Inc.
10 * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his
16 * available from http://www.highpoint-tech.com/USA_new/service_support.htm
19 * as the time passes... :-/
23 * - add function for getting/setting power status of drive
24 * - the HPT370's state machine can get confused. reset it before each dma
26 * - reset state engine whenever we get an error.
27 * - check for busmaster state at end of dma.
28 * - use new highpoint timings.
29 * - detect bus speed using highpoint register.
30 * - use pll if we don't have a clock table. added a 66MHz table that's
32 * - removed turnaround. NOTE: we never want to switch between pll and
40 * add /proc display for per-drive PIO/DMA/UDMA mode and
41 * per-channel ATA-33/66 Cable detect.
58 * - fix the clock turnaround code: it was writing to the wrong ports when
59 * called for the secondary channel, caching the current clock mode per-
63 * - disable UltraATA/100 for HPT370 by default as the 33 MHz clock being used
65 * - avoid touching disabled channels (e.g. HPT371/N are single channel chips,
67 * - fix/remove bad/unused timing tables and use one set of tables for the whole
70 * - use f_CNT value saved by the HighPoint BIOS as reading it directly gives
73 * - fix the hotswap code: it caused RESET- to glitch when tristating the bus,
75 * - pass to init_chipset() handlers a copy of the IDE PCI device structure as
77 * - pass to the init_setup handlers a copy of the ide_pci_device_t structure
79 * - prefix the driver startup messages with the real chip name
80 * - claim the extra 240 bytes of I/O space for all chips
81 * - optimize the UltraDMA filtering and the drive list lookup code
82 * - use pci_get_slot() to get to the function 1 of HPT36x/374
83 * - cache offset of the channel's misc. control registers (MCRs) being used
85 * - only touch the relevant MCR when detecting the cable type on HPT374's
87 * - rename all the register related variables consistently
88 * - move all the interrupt twiddling code from the speedproc handlers into
90 * - merge HPT36x/HPT37x speedproc handlers, fix PIO timing register mask and
93 * - fix hpt3xx_tune_drive() to set the PIO mode requested, not always select
95 * - clean up DMA timeout handling for HPT370
96 * - switch to using the enumeration type to differ between the numerous chip
99 * - extend the hpt_info structure to hold the DPLL and PCI clock frequencies,
104 * init_chipset stage, allocate per-chip instance and fill it with the rest
106 * - get rid of the constant thresholds in the HPT37x PCI clock detection code,
109 * - switch to using the DPLL clock and enable UltraATA/133 mode by default on
112 * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(),
116 * - set the correct hwif->ultra_mask for each individual chip
117 * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards
118 * - stop resetting HPT370's state machine before each DMA transfer as that has
144 "IBM-DTLA-307075",
145 "IBM-DTLA-307060",
146 "IBM-DTLA-307045",
147 "IBM-DTLA-307030",
148 "IBM-DTLA-307020",
149 "IBM-DTLA-307015",
150 "IBM-DTLA-305040",
151 "IBM-DTLA-305030",
152 "IBM-DTLA-305020",
153 "IC35L010AVER07-0",
154 "IC35L020AVER07-0",
155 "IC35L030AVER07-0",
156 "IC35L040AVER07-0",
157 "IC35L060AVER07-0",
163 "IBM-DTLA-307075",
164 "IBM-DTLA-307060",
165 "IBM-DTLA-307045",
166 "IBM-DTLA-307030",
167 "IBM-DTLA-307020",
168 "IBM-DTLA-307015",
169 "IBM-DTLA-305040",
170 "IBM-DTLA-305030",
171 "IBM-DTLA-305020",
172 "IC35L010AVER07-0",
173 "IC35L020AVER07-0",
174 "IC35L030AVER07-0",
175 "IC35L040AVER07-0",
176 "IC35L060AVER07-0",
230 * - 21 CLK frequency: 0=ATA clock, 1=dual ATA clock.
537 return match_string(list, -1, (char *)&drive->id[ATA_ID_PROD]) >= 0; in check_in_drive_list()
543 struct hpt_info *info = (struct hpt_info *)host->host_priv; in hpt3xx_get_info()
545 return dev == host->dev[1] ? info + 1 : info; in hpt3xx_get_info()
555 ide_hwif_t *hwif = drive->hwif; in hpt3xx_udma_filter()
556 struct hpt_info *info = hpt3xx_get_info(hwif->dev); in hpt3xx_udma_filter()
557 u8 mask = hwif->ultra_mask; in hpt3xx_udma_filter()
559 switch (info->chip_type) { in hpt3xx_udma_filter()
583 if (ata_id_is_sata(drive->id)) in hpt3xx_udma_filter()
595 ide_hwif_t *hwif = drive->hwif; in hpt3xx_mdma_filter()
596 struct hpt_info *info = hpt3xx_get_info(hwif->dev); in hpt3xx_mdma_filter()
598 switch (info->chip_type) { in hpt3xx_mdma_filter()
603 if (ata_id_is_sata(drive->id)) in hpt3xx_mdma_filter()
621 for (i = 0; i < ARRAY_SIZE(xfer_speeds) - 1; i++) in get_speed_setting()
625 return info->timings->clock_table[info->clock][i]; in get_speed_setting()
630 struct pci_dev *dev = to_pci_dev(hwif->dev); in hpt3xx_set_mode()
631 struct hpt_info *info = hpt3xx_get_info(hwif->dev); in hpt3xx_set_mode()
632 struct hpt_timings *t = info->timings; in hpt3xx_set_mode()
633 u8 itr_addr = 0x40 + (drive->dn * 4); in hpt3xx_set_mode()
635 const u8 speed = drive->dma_mode; in hpt3xx_set_mode()
637 u32 itr_mask = speed < XFER_MW_DMA_0 ? t->pio_mask : in hpt3xx_set_mode()
638 (speed < XFER_UDMA_0 ? t->dma_mask : in hpt3xx_set_mode()
639 t->ultra_mask); in hpt3xx_set_mode()
644 * Disable on-chip PIO FIFO/buffer (and PIO MST mode as well) in hpt3xx_set_mode()
654 drive->dma_mode = drive->pio_mode; in hpt3xx_set_pio_mode()
660 ide_hwif_t *hwif = drive->hwif; in hpt3xx_maskproc()
661 struct pci_dev *dev = to_pci_dev(hwif->dev); in hpt3xx_maskproc()
662 struct hpt_info *info = hpt3xx_get_info(hwif->dev); in hpt3xx_maskproc()
664 if ((drive->dev_flags & IDE_DFLAG_NIEN_QUIRK) == 0) in hpt3xx_maskproc()
667 if (info->chip_type >= HPT370) { in hpt3xx_maskproc()
679 disable_irq(hwif->irq); in hpt3xx_maskproc()
681 enable_irq(hwif->irq); in hpt3xx_maskproc()
690 struct pci_dev *dev = to_pci_dev(drive->hwif->dev); in hpt366_dma_lost_irq()
697 drive->name, __func__, mcr1, mcr3, scr1); in hpt366_dma_lost_irq()
705 ide_hwif_t *hwif = drive->hwif; in hpt370_clear_engine()
706 struct pci_dev *dev = to_pci_dev(hwif->dev); in hpt370_clear_engine()
708 pci_write_config_byte(dev, hwif->select_data, 0x37); in hpt370_clear_engine()
714 ide_hwif_t *hwif = drive->hwif; in hpt370_irq_timeout()
715 struct pci_dev *dev = to_pci_dev(hwif->dev); in hpt370_irq_timeout()
719 pci_read_config_word(dev, hwif->select_data + 2, &bfifo); in hpt370_irq_timeout()
720 printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff); in hpt370_irq_timeout()
723 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); in hpt370_irq_timeout()
725 outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD); in hpt370_irq_timeout()
739 ide_hwif_t *hwif = drive->hwif; in hpt370_dma_end()
740 u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); in hpt370_dma_end()
745 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); in hpt370_dma_end()
755 ide_hwif_t *hwif = drive->hwif; in hpt374_dma_test_irq()
756 struct pci_dev *dev = to_pci_dev(hwif->dev); in hpt374_dma_test_irq()
760 pci_read_config_word(dev, hwif->select_data + 2, &bfifo); in hpt374_dma_test_irq()
762 // printk("%s: %d bytes in FIFO\n", drive->name, bfifo); in hpt374_dma_test_irq()
766 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); in hpt374_dma_test_irq()
776 ide_hwif_t *hwif = drive->hwif; in hpt374_dma_end()
777 struct pci_dev *dev = to_pci_dev(hwif->dev); in hpt374_dma_end()
778 u8 mcr = 0, mcr_addr = hwif->select_data; in hpt374_dma_end()
779 u8 bwsr = 0, mask = hwif->channel ? 0x02 : 0x01; in hpt374_dma_end()
789 * hpt3xxn_set_clock - perform clock switching dance
798 unsigned long base = hwif->extra_base; in hpt3xxn_set_clock()
828 * hpt3xxn_rw_disk - prepare for I/O
838 hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x21 : 0x23); in hpt3xxn_rw_disk()
842 * hpt37x_calibrate_dpll - calibrate the DPLL
879 struct hpt_info *info = host->host_priv + (&dev->dev == host->dev[1]); in hpt3xx_disable_fast_irq()
880 u8 chip_type = info->chip_type; in hpt3xx_disable_fast_irq()
909 struct hpt_info *info = hpt3xx_get_info(&dev->dev); in init_chipset_hpt366()
915 chip_type = info->chip_type; in init_chipset_hpt366()
944 * to prevent drives having problems with 40-pin cables. in init_chipset_hpt366()
960 * always read it from there -- no need to check the result of in init_chipset_hpt366()
964 if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) { in init_chipset_hpt366()
965 struct pci_dev *dev1 = pci_get_slot(dev->bus, in init_chipset_hpt366()
966 dev->devfn - 1); in init_chipset_hpt366()
995 dpll_clk = info->dpll_clk; in init_chipset_hpt366()
1057 * on PRST-/SRST- when the state engine gets reset... in init_chipset_hpt366()
1059 if (chip_type >= HPT374 || info->timings->clock_table[clock] == NULL) { in init_chipset_hpt366()
1067 if (info->udma_mask == ATA_UDMA6) { in init_chipset_hpt366()
1075 if (info->timings->clock_table[clock] == NULL) { in init_chipset_hpt366()
1078 return -EIO; in init_chipset_hpt366()
1098 f_low -= adjust >> 1; in init_chipset_hpt366()
1105 return -EIO; in init_chipset_hpt366()
1119 info->dpll_clk = dpll_clk; in init_chipset_hpt366()
1120 info->pci_clk = pci_clk; in init_chipset_hpt366()
1121 info->clock = clock; in init_chipset_hpt366()
1153 struct pci_dev *dev = to_pci_dev(hwif->dev); in hpt3xx_cable_detect()
1154 struct hpt_info *info = hpt3xx_get_info(hwif->dev); in hpt3xx_cable_detect()
1155 u8 chip_type = info->chip_type; in hpt3xx_cable_detect()
1156 u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; in hpt3xx_cable_detect()
1163 if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) { in hpt3xx_cable_detect()
1166 * - set bit 15 of reg 0x52 to enable TCBLID as input in hpt3xx_cable_detect()
1167 * - set bit 15 of reg 0x56 to enable FCBLID as input in hpt3xx_cable_detect()
1169 u8 mcr_addr = hwif->select_data + 2; in hpt3xx_cable_detect()
1181 * - clear bit 0 of reg 0x5b to enable P/SCBLID as inputs in hpt3xx_cable_detect()
1199 struct hpt_info *info = hpt3xx_get_info(hwif->dev); in init_hwif_hpt366()
1200 u8 chip_type = info->chip_type; in init_hwif_hpt366()
1203 hwif->select_data = hwif->channel ? 0x54 : 0x50; in init_hwif_hpt366()
1208 * - on 33 MHz PCI we must clock switch in init_hwif_hpt366()
1209 * - on 66 MHz PCI we must NOT use the PCI clock in init_hwif_hpt366()
1211 if (chip_type >= HPT372N && info->dpll_clk && info->pci_clk < 66) { in init_hwif_hpt366()
1214 * so we'll have to serialize them... :-( in init_hwif_hpt366()
1216 hwif->host->host_flags |= IDE_HFLAG_SERIALIZE; in init_hwif_hpt366()
1217 hwif->rw_disk = &hpt3xxn_rw_disk; in init_hwif_hpt366()
1224 struct pci_dev *dev = to_pci_dev(hwif->dev); in init_dma_hpt366()
1229 return -1; in init_dma_hpt366()
1231 hwif->dma_base = base; in init_dma_hpt366()
1234 return -1; in init_dma_hpt366()
1236 if (ide_pci_set_master(dev, d->name) < 0) in init_dma_hpt366()
1237 return -1; in init_dma_hpt366()
1244 pci_read_config_byte(dev, hwif->channel ? 0x4b : 0x43, &masterdma); in init_dma_hpt366()
1245 pci_read_config_byte(dev, hwif->channel ? 0x4f : 0x47, &slavedma); in init_dma_hpt366()
1254 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", in init_dma_hpt366()
1255 hwif->name, base, base + 7); in init_dma_hpt366()
1257 hwif->extra_base = base + (hwif->channel ? 8 : 16); in init_dma_hpt366()
1260 return -1; in init_dma_hpt366()
1267 if (dev2->irq != dev->irq) { in hpt374_init()
1269 dev2->irq = dev->irq; in hpt374_init()
1282 * So, we manually disable the non-existing channel here in hpt371_init()
1305 if (pin1 != pin2 && dev->irq == dev2->irq) { in hpt36x_init()
1370 * to both functions -- really stupid design decision... :-(
1395 * hpt366_init_one - called when an HPT366 is found
1408 u8 idx = id->driver_data; in hpt366_init_one()
1409 u8 rev = dev->revision; in hpt366_init_one()
1412 if ((idx == 0 || idx == 4) && (PCI_FUNC(dev->devfn) & 1)) in hpt366_init_one()
1413 return -ENODEV; in hpt366_init_one()
1447 printk(KERN_INFO DRV_NAME ": %s chipset detected\n", info->chip_name); in hpt366_init_one()
1451 d.udma_mask = info->udma_mask; in hpt366_init_one()
1453 /* fixup ->dma_ops for HPT370/HPT370A */ in hpt366_init_one()
1458 dev2 = pci_get_slot(dev->bus, dev->devfn + 1); in hpt366_init_one()
1465 return -ENOMEM; in hpt366_init_one()
1470 * to just allocated per-chip hpt_info structure. in hpt366_init_one()
1502 struct ide_info *info = host->host_priv; in hpt366_remove()
1503 struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL; in hpt366_remove()