46 static DEFINE_SPINLOCK(clk_lock);
165 				ARRAY_SIZE(uart_factor_tbl), &clk_lock);  in pxa910_clk_init()
170 				apbc_base + APBC_TWSI0, 10, 0, &clk_lock);  in pxa910_clk_init()
174 				apbcp_base + APBCP_TWSI1, 10, 0, &clk_lock);  in pxa910_clk_init()
178 				apbc_base + APBC_GPIO, 10, 0, &clk_lock);  in pxa910_clk_init()
182 				apbc_base + APBC_KPC, 10, 0, &clk_lock);  in pxa910_clk_init()
186 				apbc_base + APBC_RTC, 10, 0, &clk_lock);  in pxa910_clk_init()
190 				apbc_base + APBC_PWM0, 10, 0, &clk_lock);  in pxa910_clk_init()
194 				apbc_base + APBC_PWM1, 10, 0, &clk_lock);  in pxa910_clk_init()
198 				apbc_base + APBC_PWM2, 10, 0, &clk_lock);  in pxa910_clk_init()
202 				apbc_base + APBC_PWM3, 10, 0, &clk_lock);  in pxa910_clk_init()
208 				apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
213 				apbc_base + APBC_UART0, 10, 0, &clk_lock);  in pxa910_clk_init()
219 				apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
224 				apbc_base + APBC_UART1, 10, 0, &clk_lock);  in pxa910_clk_init()
230 				apbcp_base + APBCP_UART2, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
235 				apbcp_base + APBCP_UART2, 10, 0, &clk_lock);  in pxa910_clk_init()
241 				apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
245 				apbc_base + APBC_SSP0, 10, 0, &clk_lock);  in pxa910_clk_init()
251 				apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
255 				apbc_base + APBC_SSP1, 10, 0, &clk_lock);  in pxa910_clk_init()
259 				apmu_base + APMU_DFC, 0x19b, &clk_lock);  in pxa910_clk_init()
265 				apmu_base + APMU_SDH0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
269 				apmu_base + APMU_SDH0, 0x1b, &clk_lock);  in pxa910_clk_init()
275 				apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
279 				apmu_base + APMU_SDH1, 0x1b, &clk_lock);  in pxa910_clk_init()
283 				apmu_base + APMU_USB, 0x9, &clk_lock);  in pxa910_clk_init()
287 				apmu_base + APMU_USB, 0x12, &clk_lock);  in pxa910_clk_init()
293 				apmu_base + APMU_DISP0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
297 				apmu_base + APMU_DISP0, 0x1b, &clk_lock);  in pxa910_clk_init()
303 				apmu_base + APMU_CCIC0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
307 				apmu_base + APMU_CCIC0, 0x1b, &clk_lock);  in pxa910_clk_init()
313 				apmu_base + APMU_CCIC0, 7, 1, 0, &clk_lock);  in pxa910_clk_init()
317 				apmu_base + APMU_CCIC0, 0x24, &clk_lock);  in pxa910_clk_init()
322 				10, 5, 0, &clk_lock);  in pxa910_clk_init()
326 				apmu_base + APMU_CCIC0, 0x300, &clk_lock);  in pxa910_clk_init()