Lines Matching +full:1 +full:f200000
53 CPU1: cpu@1 {
133 #hwlock-cells = <1>;
199 qcom,client-id = <1>;
203 zap_shader_region: gpu@8f200000 {
225 #clock-cells = <1>;
230 #power-domain-cells = <1>;
237 opp-level = <1>;
283 #qcom,smem-state-cells = <1>;
303 qcom,remote-pid = <1>;
307 #qcom,smem-state-cells = <1>;
337 #qcom,smem-state-cells = <1>;
342 #address-cells = <1>;
343 #size-cells = <1>;
350 #clock-cells = <1>;
351 #address-cells = <1>;
352 #size-cells = <1>;
414 #address-cells = <1>;
415 #size-cells = <1>;
424 bits = <1 4>;
442 #clock-cells = <1>;
443 #reset-cells = <1>;
444 #power-domain-cells = <1>;
459 #thermal-sensor-cells = <1>;
470 #thermal-sensor-cells = <1>;
485 #clock-cells = <1>;
486 #reset-cells = <1>;
487 #power-domain-cells = <1>;
515 #interrupt-cells = <1>;
520 #address-cells = <1>;
521 #size-cells = <1>;
546 #address-cells = <1>;
584 #sound-dai-cells = <1>;
587 #address-cells = <1>;
658 * bin (1 << 0). All the rest are available on
728 #address-cells = <1>;
729 #size-cells = <1>;
737 num-lanes = <1>;
755 #interrupt-cells = <1>;
757 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
764 pinctrl-1 = <&pcie0_clkreq_sleep &pcie0_perst_default &pcie0_wake_sleep>;
786 num-lanes = <1>;
807 #interrupt-cells = <1>;
809 interrupt-map = <0 0 0 1 &intc 0 272 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
816 pinctrl-1 = <&pcie1_clkreq_sleep &pcie1_perst_default &pcie1_wake_sleep>;
818 linux,pci-domain = <1>;
837 num-lanes = <1>;
858 #interrupt-cells = <1>;
860 interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
867 pinctrl-1 = <&pcie2_clkreq_sleep &pcie2_perst_default &pcie2_wake_sleep >;
931 lanes-per-direction = <1>;
932 #reset-cells = <1>;
943 #address-cells = <1>;
944 #size-cells = <1>;
1087 <&vfe_smmu 1>,
1092 #address-cells = <1>;
1099 #address-cells = <1>;
1122 #address-cells = <1>;
1126 cci_i2c1: i2c-bus@1 {
1127 reg = <1>;
1129 #address-cells = <1>;
1138 #global-interrupts = <1>;
1142 #iommu-cells = <1>;
1203 #global-interrupts = <1>;
1207 #iommu-cells = <1>;
1218 #global-interrupts = <1>;
1231 #iommu-cells = <1>;
1239 #global-interrupts = <1>;
1248 #iommu-cells = <1>;
1254 #iommu-cells = <1>;
1257 #global-interrupts = <1>;
1321 #address-cells = <1>;
1351 #address-cells = <1>;
1399 #address-cells = <1>;
1410 port@1 {
1411 reg = <1>;
1454 #address-cells = <1>;
1465 port@1 {
1466 reg = <1>;
1585 #address-cells = <1>;
1595 port@1 {
1596 reg = <1>;
1671 funnel@3bb0000 { /* APSS Funnel 1 */
1679 #address-cells = <1>;
1689 port@1 {
1690 reg = <1>;
1715 #address-cells = <1>;
1726 port@1 {
1727 reg = <1>;
1747 #clock-cells = <1>;
1753 #address-cells = <1>;
1754 #size-cells = <1>;
1785 #clock-cells = <1>;
1786 #address-cells = <1>;
1787 #size-cells = <1>;
1876 pinctrl-1 = <&blsp1_spi0_sleep>;
1877 #address-cells = <1>;
1891 pinctrl-1 = <&blsp1_i2c2_sleep>;
1892 #address-cells = <1>;
1926 pinctrl-1 = <&blsp2_i2c0_sleep>;
1927 #address-cells = <1>;
1941 pinctrl-1 = <&blsp2_i2c1_sleep>;
1942 #address-cells = <1>;
1956 pinctrl-1 = <&blsp2_spi5_sleep>;
1957 #address-cells = <1>;
1965 #address-cells = <1>;
1966 #size-cells = <1>;
1999 #dma-cells = <1>;
2000 qcom,ee = <1>;
2012 #address-cells = <1>;
2014 ngd@1 {
2015 reg = <1>;
2016 #address-cells = <1>;
2017 #size-cells = <1>;
2020 compatible = "slim217,1a0";
2024 wcd9335: codec@1{
2028 compatible = "slim217,1a0";
2029 reg = <1 0>;
2036 #interrupt-cells = <1>;
2041 #sound-dai-cells = <1>;
2052 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
2071 qcom,smd-edge = <1>;
2073 #address-cells = <1>;
2080 #address-cells = <1>;
2093 #address-cells = <1>;
2095 #sound-dai-cells = <1>;
2096 hdmi@1 {
2097 reg = <1>;
2107 #address-cells = <1>;
2109 #sound-dai-cells = <1>;
2110 iommus = <&lpass_q6_smmu 1>;
2131 #mbox-cells = <1>;
2135 #address-cells = <1>;
2136 #size-cells = <1>;
2151 frame-number = <1>;
2202 #redistributor-regions = <1>;
2332 thermal-sensors = <&tsens0 1>;
2392 thermal-sensors = <&tsens1 1>;