Lines Matching +full:touchscreen +full:- +full:max +full:- +full:pressure
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm";
14 stdout-path = &uart4;
22 reg_eth_phy: regulator-eth-phy {
23 compatible = "regulator-fixed";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_reg_eth_phy>;
26 regulator-name = "eth_phy_pwr";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
30 enable-active-high;
35 cpu-supply = <&buck2_reg>;
39 cpu-supply = <&buck2_reg>;
43 cpu-supply = <&buck2_reg>;
47 cpu-supply = <&buck2_reg>;
51 operating-points-v2 = <&ddrc_opp_table>;
53 ddrc_opp_table: opp-table {
54 compatible = "operating-points-v2";
56 opp-25M {
57 opp-hz = /bits/ 64 <25000000>;
60 opp-100M {
61 opp-hz = /bits/ 64 <100000000>;
64 opp-750M {
65 opp-hz = /bits/ 64 <750000000>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_ecspi1>;
73 cs-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>,
75 /delete-property/ dmas;
76 /delete-property/ dma-names;
80 touchscreen@0 {
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_restouch>;
85 interrupt-parent = <&gpio1>;
88 spi-max-frequency = <1500000>;
89 pendown-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
91 ti,x-min = /bits/ 16 <125>;
92 touchscreen-size-x = /bits/ 16 <4008>;
93 ti,y-min = /bits/ 16 <282>;
94 touchscreen-size-y = /bits/ 16 <3864>;
95 ti,x-plate-ohms = /bits/ 16 <180>;
96 touchscreen-max-pressure = /bits/ 16 <255>;
97 touchscreen-average-samples = /bits/ 16 <10>;
98 ti,debounce-tol = /bits/ 16 <3>;
99 ti,debounce-rep = /bits/ 16 <1>;
100 ti,settle-delay-usec = /bits/ 16 <150>;
101 ti,keep-vref-on;
102 wakeup-source;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_fec1>;
109 phy-mode = "rgmii";
110 phy-handle = <ðphy>;
111 phy-supply = <®_eth_phy>;
112 fsl,magic-packet;
116 #address-cells = <1>;
117 #size-cells = <0>;
119 ethphy: ethernet-phy@4 {
120 compatible = "ethernet-phy-ieee802.3-c22";
122 reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
123 reset-assert-us = <10000>;
124 reset-deassert-us = <10000>;
130 clock-frequency = <400000>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_i2c1>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_pmic>;
140 interrupt-parent = <&gpio2>;
142 rohm,reset-snvs-powered;
144 #clock-cells = <0>;
146 clock-output-names = "clk-32k-out";
150 regulator-name = "buck1";
151 regulator-min-microvolt = <700000>;
152 regulator-max-microvolt = <1300000>;
153 regulator-boot-on;
154 regulator-always-on;
155 regulator-ramp-delay = <1250>;
159 regulator-name = "buck2";
160 regulator-min-microvolt = <700000>;
161 regulator-max-microvolt = <1300000>;
162 regulator-boot-on;
163 regulator-always-on;
164 regulator-ramp-delay = <1250>;
165 rohm,dvs-run-voltage = <1000000>;
166 rohm,dvs-idle-voltage = <900000>;
170 regulator-name = "buck3";
171 regulator-min-microvolt = <700000>;
172 regulator-max-microvolt = <1350000>;
173 regulator-boot-on;
174 regulator-always-on;
178 regulator-name = "buck4";
179 regulator-min-microvolt = <3000000>;
180 regulator-max-microvolt = <3300000>;
181 regulator-boot-on;
182 regulator-always-on;
186 regulator-name = "buck5";
187 regulator-min-microvolt = <1605000>;
188 regulator-max-microvolt = <1995000>;
189 regulator-boot-on;
190 regulator-always-on;
194 regulator-name = "buck6";
195 regulator-min-microvolt = <800000>;
196 regulator-max-microvolt = <1400000>;
197 regulator-boot-on;
198 regulator-always-on;
202 regulator-name = "ldo1";
203 regulator-min-microvolt = <1600000>;
204 regulator-max-microvolt = <1900000>;
205 regulator-boot-on;
206 regulator-always-on;
210 regulator-name = "ldo2";
211 regulator-min-microvolt = <800000>;
212 regulator-max-microvolt = <900000>;
213 regulator-boot-on;
214 regulator-always-on;
218 regulator-name = "ldo3";
219 regulator-min-microvolt = <1800000>;
220 regulator-max-microvolt = <3300000>;
221 regulator-boot-on;
222 regulator-always-on;
226 regulator-name = "ldo4";
227 regulator-min-microvolt = <900000>;
228 regulator-max-microvolt = <1800000>;
229 regulator-boot-on;
230 regulator-always-on;
234 regulator-compatible = "ldo5";
235 regulator-min-microvolt = <1800000>;
236 regulator-max-microvolt = <1800000>;
237 regulator-always-on;
241 regulator-name = "ldo6";
242 regulator-min-microvolt = <900000>;
243 regulator-max-microvolt = <1800000>;
244 regulator-boot-on;
245 regulator-always-on;
252 clock-frequency = <400000>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_i2c3>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_uart2>;
273 assigned-clocks = <&clk IMX8MM_CLK_UART2>;
274 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
275 uart-has-rtscts;
281 pinctrl-names = "default";
282 pinctrl-0 = <&pinctrl_uart4>;
288 usb-role-switch;
294 usb-role-switch;
300 #address-cells = <1>;
301 #size-cells = <0>;
302 pinctrl-names = "default", "state_100mhz", "state_200mhz";
303 pinctrl-0 = <&pinctrl_usdhc1>;
304 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
305 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
306 bus-width = <4>;
307 non-removable;
308 keep-power-in-suspend;
313 compatible = "brcm,bcm4329-fmac";
319 assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
320 assigned-clock-rates = <200000000>;
321 pinctrl-names = "default", "state_100mhz", "state_200mhz";
322 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
323 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
324 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
325 cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
326 bus-width = <4>;
327 vmmc-supply = <®_usdhc2_vmmc>;
333 assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;
334 assigned-clock-rates = <400000000>;
335 pinctrl-names = "default", "state_100mhz", "state_200mhz";
336 pinctrl-0 = <&pinctrl_usdhc3>;
337 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
338 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
339 bus-width = <8>;
340 non-removable;
345 pinctrl-names = "default";
346 pinctrl-0 = <&pinctrl_wdog>;
347 fsl,ext-reset-output;
441 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
452 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
481 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
493 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
521 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
537 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {