Lines Matching +full:30 +full:a00000
132 L2: cache-controller@a00000 {
350 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
373 scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
418 scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
522 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
532 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
891 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1000 <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1017 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1023 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1032 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1038 AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1046 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1052 AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1324 AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */
1369 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */