Lines Matching +full:adc +full:- +full:channel +full:- +full:clk +full:- +full:src
1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
55 compatible = "arm,cortex-a7";
57 clock-frequency = <1000000000>;
59 clock-names = "cpu";
60 #cooling-cells = <2>;
62 operating-points = <
78 compatible = "arm,cortex-a7";
80 clock-frequency = <1000000000>;
82 clock-names = "cpu";
83 #cooling-cells = <2>;
85 operating-points = <
100 xusbxti: clock-0 {
101 compatible = "fixed-clock";
102 clock-frequency = <0>;
103 #clock-cells = <0>;
104 clock-output-names = "xusbxti";
107 xxti: clock-1 {
108 compatible = "fixed-clock";
109 clock-frequency = <0>;
110 #clock-cells = <0>;
111 clock-output-names = "xxti";
114 xtcxo: clock-2 {
115 compatible = "fixed-clock";
116 clock-frequency = <0>;
117 #clock-cells = <0>;
118 clock-output-names = "xtcxo";
122 compatible = "arm,cortex-a7-pmu";
128 compatible = "simple-bus";
129 #address-cells = <1>;
130 #size-cells = <1>;
134 compatible = "mmio-sram";
136 #address-cells = <1>;
137 #size-cells = <1>;
140 smp-sram@0 {
141 compatible = "samsung,exynos4210-sysram";
145 smp-sram@3f000 {
146 compatible = "samsung,exynos4210-sysram-ns";
152 compatible = "samsung,exynos4210-chipid";
157 compatible = "samsung,exynos3-sysreg", "syscon";
161 pmu_system_controller: system-controller@10020000 {
162 compatible = "samsung,exynos3250-pmu", "syscon";
164 interrupt-controller;
165 #interrupt-cells = <3>;
166 interrupt-parent = <&gic>;
167 clock-names = "clkout8";
169 #clock-cells = <1>;
172 mipi_phy: video-phy {
173 compatible = "samsung,s5pv210-mipi-video-phy";
174 #phy-cells = <1>;
178 pd_cam: power-domain@10023c00 {
179 compatible = "samsung,exynos4210-pd";
181 #power-domain-cells = <0>;
185 pd_mfc: power-domain@10023c40 {
186 compatible = "samsung,exynos4210-pd";
188 #power-domain-cells = <0>;
192 pd_g3d: power-domain@10023c60 {
193 compatible = "samsung,exynos4210-pd";
195 #power-domain-cells = <0>;
199 pd_lcd0: power-domain@10023c80 {
200 compatible = "samsung,exynos4210-pd";
202 #power-domain-cells = <0>;
206 pd_isp: power-domain@10023ca0 {
207 compatible = "samsung,exynos4210-pd";
209 #power-domain-cells = <0>;
213 cmu: clock-controller@10030000 {
214 compatible = "samsung,exynos3250-cmu";
216 #clock-cells = <1>;
217 assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
219 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
223 cmu_dmc: clock-controller@105c0000 {
224 compatible = "samsung,exynos3250-cmu-dmc";
226 #clock-cells = <1>;
230 compatible = "samsung,s3c6410-rtc";
234 interrupt-parent = <&pmu_system_controller>;
239 compatible = "samsung,exynos3250-tmu";
243 clock-names = "tmu_apbif";
244 #thermal-sensor-cells = <0>;
248 gic: interrupt-controller@10481000 {
249 compatible = "arm,cortex-a15-gic";
250 #interrupt-cells = <3>;
251 interrupt-controller;
261 compatible = "samsung,exynos4210-mct";
272 clock-names = "fin_pll", "mct";
276 compatible = "samsung,exynos3250-pinctrl";
280 wakeup-interrupt-controller {
281 compatible = "samsung,exynos4210-wakeup-eint";
287 compatible = "samsung,exynos3250-pinctrl";
293 compatible = "samsung,exynos3250-jpeg";
297 clock-names = "jpeg", "sclk";
298 power-domains = <&pd_cam>;
299 assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
300 assigned-clock-rates = <0>, <150000000>;
301 assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
307 compatible = "samsung,exynos-sysmmu";
310 clock-names = "sysmmu", "master";
312 power-domains = <&pd_cam>;
313 #iommu-cells = <0>;
317 compatible = "samsung,exynos3250-fimd";
319 interrupt-names = "fifo", "vsync", "lcd_sys";
324 clock-names = "sclk_fimd", "fimd";
325 power-domains = <&pd_lcd0>;
332 compatible = "samsung,exynos3250-mipi-dsi";
335 samsung,phy-type = <0>;
336 power-domains = <&pd_lcd0>;
338 phy-names = "dsim";
340 clock-names = "bus_clk", "pll_clk";
341 #address-cells = <1>;
342 #size-cells = <0>;
347 compatible = "samsung,exynos-sysmmu";
350 clock-names = "sysmmu", "master";
352 power-domains = <&pd_lcd0>;
353 #iommu-cells = <0>;
357 compatible = "samsung,s3c6400-hsotg";
361 clock-names = "otg";
363 phy-names = "usb2-phy";
368 compatible = "samsung,exynos5420-dw-mshc";
372 clock-names = "biu", "ciu";
373 fifo-depth = <0x80>;
374 #address-cells = <1>;
375 #size-cells = <0>;
380 compatible = "samsung,exynos5420-dw-mshc";
384 clock-names = "biu", "ciu";
385 fifo-depth = <0x80>;
386 #address-cells = <1>;
387 #size-cells = <0>;
392 compatible = "samsung,exynos5250-dw-mshc";
396 clock-names = "biu", "ciu";
397 fifo-depth = <0x80>;
398 #address-cells = <1>;
399 #size-cells = <0>;
403 exynos_usbphy: exynos-usbphy@125b0000 {
404 compatible = "samsung,exynos3250-usb2-phy";
406 samsung,pmureg-phandle = <&pmu_system_controller>;
408 clock-names = "phy", "ref";
409 #phy-cells = <1>;
418 clock-names = "apb_pclk";
419 #dma-cells = <1>;
420 #dma-channels = <8>;
421 #dma-requests = <32>;
429 clock-names = "apb_pclk";
430 #dma-cells = <1>;
431 #dma-channels = <8>;
432 #dma-requests = <32>;
435 adc: adc@126c0000 { label
436 compatible = "samsung,exynos3250-adc";
439 clock-names = "adc", "sclk";
441 #io-channel-cells = <1>;
442 io-channel-ranges;
443 samsung,syscon-phandle = <&pmu_system_controller>;
448 compatible = "samsung,exynos4210-mali", "arm,mali-400";
461 interrupt-names = "gp",
474 clock-names = "bus", "core";
475 power-domains = <&pd_g3d>;
481 compatible = "samsung,mfc-v7";
484 clock-names = "mfc", "sclk_mfc";
486 power-domains = <&pd_mfc>;
491 compatible = "samsung,exynos-sysmmu";
494 clock-names = "sysmmu", "master";
496 power-domains = <&pd_mfc>;
497 #iommu-cells = <0>;
501 compatible = "samsung,exynos4210-uart";
505 clock-names = "uart", "clk_uart_baud0";
506 pinctrl-names = "default";
507 pinctrl-0 = <&uart0_data &uart0_fctl>;
512 compatible = "samsung,exynos4210-uart";
516 clock-names = "uart", "clk_uart_baud0";
517 pinctrl-names = "default";
518 pinctrl-0 = <&uart1_data>;
523 compatible = "samsung,exynos4210-uart";
527 clock-names = "uart", "clk_uart_baud0";
528 pinctrl-names = "default";
529 pinctrl-0 = <&uart2_data>;
534 #address-cells = <1>;
535 #size-cells = <0>;
536 compatible = "samsung,s3c2440-i2c";
540 clock-names = "i2c";
541 pinctrl-names = "default";
542 pinctrl-0 = <&i2c0_bus>;
547 #address-cells = <1>;
548 #size-cells = <0>;
549 compatible = "samsung,s3c2440-i2c";
553 clock-names = "i2c";
554 pinctrl-names = "default";
555 pinctrl-0 = <&i2c1_bus>;
560 #address-cells = <1>;
561 #size-cells = <0>;
562 compatible = "samsung,s3c2440-i2c";
566 clock-names = "i2c";
567 pinctrl-names = "default";
568 pinctrl-0 = <&i2c2_bus>;
573 #address-cells = <1>;
574 #size-cells = <0>;
575 compatible = "samsung,s3c2440-i2c";
579 clock-names = "i2c";
580 pinctrl-names = "default";
581 pinctrl-0 = <&i2c3_bus>;
586 #address-cells = <1>;
587 #size-cells = <0>;
588 compatible = "samsung,s3c2440-i2c";
592 clock-names = "i2c";
593 pinctrl-names = "default";
594 pinctrl-0 = <&i2c4_bus>;
599 #address-cells = <1>;
600 #size-cells = <0>;
601 compatible = "samsung,s3c2440-i2c";
605 clock-names = "i2c";
606 pinctrl-names = "default";
607 pinctrl-0 = <&i2c5_bus>;
612 #address-cells = <1>;
613 #size-cells = <0>;
614 compatible = "samsung,s3c2440-i2c";
618 clock-names = "i2c";
619 pinctrl-names = "default";
620 pinctrl-0 = <&i2c6_bus>;
625 #address-cells = <1>;
626 #size-cells = <0>;
627 compatible = "samsung,s3c2440-i2c";
631 clock-names = "i2c";
632 pinctrl-names = "default";
633 pinctrl-0 = <&i2c7_bus>;
638 compatible = "samsung,exynos4210-spi";
642 dma-names = "tx", "rx";
643 #address-cells = <1>;
644 #size-cells = <0>;
646 clock-names = "spi", "spi_busclk0";
647 samsung,spi-src-clk = <0>;
648 pinctrl-names = "default";
649 pinctrl-0 = <&spi0_bus>;
654 compatible = "samsung,exynos4210-spi";
658 dma-names = "tx", "rx";
659 #address-cells = <1>;
660 #size-cells = <0>;
662 clock-names = "spi", "spi_busclk0";
663 samsung,spi-src-clk = <0>;
664 pinctrl-names = "default";
665 pinctrl-0 = <&spi1_bus>;
670 compatible = "samsung,s3c6410-i2s";
674 clock-names = "iis", "i2s_opclk0";
676 dma-names = "tx", "rx";
677 pinctrl-0 = <&i2s2_bus>;
678 pinctrl-names = "default";
683 compatible = "samsung,exynos4210-pwm";
690 #pwm-cells = <3>;
695 compatible = "samsung,exynos-ppmu";
701 compatible = "samsung,exynos-ppmu";
707 compatible = "samsung,exynos-ppmu";
713 compatible = "samsung,exynos-ppmu";
716 clock-names = "ppmu";
721 compatible = "samsung,exynos-ppmu";
724 clock-names = "ppmu";
729 compatible = "samsung,exynos-ppmu";
732 clock-names = "ppmu";
737 compatible = "samsung,exynos-ppmu";
740 clock-names = "ppmu";
745 compatible = "samsung,exynos-ppmu";
748 clock-names = "ppmu";
753 compatible = "samsung,exynos-ppmu";
756 clock-names = "ppmu";
761 compatible = "samsung,exynos-ppmu";
764 clock-names = "ppmu";
769 compatible = "samsung,exynos-bus";
771 clock-names = "bus";
772 operating-points-v2 = <&bus_dmc_opp_table>;
777 compatible = "operating-points-v2";
778 opp-shared;
780 opp-50000000 {
781 opp-hz = /bits/ 64 <50000000>;
782 opp-microvolt = <800000>;
784 opp-100000000 {
785 opp-hz = /bits/ 64 <100000000>;
786 opp-microvolt = <800000>;
788 opp-134000000 {
789 opp-hz = /bits/ 64 <134000000>;
790 opp-microvolt = <800000>;
792 opp-200000000 {
793 opp-hz = /bits/ 64 <200000000>;
794 opp-microvolt = <825000>;
796 opp-400000000 {
797 opp-hz = /bits/ 64 <400000000>;
798 opp-microvolt = <875000>;
803 compatible = "samsung,exynos-bus";
805 clock-names = "bus";
806 operating-points-v2 = <&bus_leftbus_opp_table>;
811 compatible = "samsung,exynos-bus";
813 clock-names = "bus";
814 operating-points-v2 = <&bus_leftbus_opp_table>;
819 compatible = "samsung,exynos-bus";
821 clock-names = "bus";
822 operating-points-v2 = <&bus_leftbus_opp_table>;
827 compatible = "samsung,exynos-bus";
829 clock-names = "bus";
830 operating-points-v2 = <&bus_leftbus_opp_table>;
835 compatible = "samsung,exynos-bus";
837 clock-names = "bus";
838 operating-points-v2 = <&bus_mcuisp_opp_table>;
843 compatible = "samsung,exynos-bus";
845 clock-names = "bus";
846 operating-points-v2 = <&bus_isp_opp_table>;
851 compatible = "samsung,exynos-bus";
853 clock-names = "bus";
854 operating-points-v2 = <&bus_peril_opp_table>;
859 compatible = "samsung,exynos-bus";
861 clock-names = "bus";
862 operating-points-v2 = <&bus_leftbus_opp_table>;
867 compatible = "operating-points-v2";
868 opp-shared;
870 opp-50000000 {
871 opp-hz = /bits/ 64 <50000000>;
872 opp-microvolt = <900000>;
874 opp-80000000 {
875 opp-hz = /bits/ 64 <80000000>;
876 opp-microvolt = <900000>;
878 opp-100000000 {
879 opp-hz = /bits/ 64 <100000000>;
880 opp-microvolt = <1000000>;
882 opp-134000000 {
883 opp-hz = /bits/ 64 <134000000>;
884 opp-microvolt = <1000000>;
886 opp-200000000 {
887 opp-hz = /bits/ 64 <200000000>;
888 opp-microvolt = <1000000>;
893 compatible = "operating-points-v2";
894 opp-shared;
896 opp-50000000 {
897 opp-hz = /bits/ 64 <50000000>;
899 opp-80000000 {
900 opp-hz = /bits/ 64 <80000000>;
902 opp-100000000 {
903 opp-hz = /bits/ 64 <100000000>;
905 opp-200000000 {
906 opp-hz = /bits/ 64 <200000000>;
908 opp-400000000 {
909 opp-hz = /bits/ 64 <400000000>;
914 compatible = "operating-points-v2";
915 opp-shared;
917 opp-50000000 {
918 opp-hz = /bits/ 64 <50000000>;
920 opp-80000000 {
921 opp-hz = /bits/ 64 <80000000>;
923 opp-100000000 {
924 opp-hz = /bits/ 64 <100000000>;
926 opp-200000000 {
927 opp-hz = /bits/ 64 <200000000>;
929 opp-300000000 {
930 opp-hz = /bits/ 64 <300000000>;
935 compatible = "operating-points-v2";
936 opp-shared;
938 opp-50000000 {
939 opp-hz = /bits/ 64 <50000000>;
941 opp-80000000 {
942 opp-hz = /bits/ 64 <80000000>;
944 opp-100000000 {
945 opp-hz = /bits/ 64 <100000000>;
951 #include "exynos3250-pinctrl.dtsi"
952 #include "exynos-syscon-restart.dtsi"