Lines Matching refs:SET_REG_BITS
45 SET_REG_BITS(&mc2, INTF_MODE, 1); in xge_mac_set_speed()
46 SET_REG_BITS(&intf_ctrl, HD_MODE, 0); in xge_mac_set_speed()
47 SET_REG_BITS(&icm0, CFG_MACMODE, 0); in xge_mac_set_speed()
48 SET_REG_BITS(&icm2, CFG_WAITASYNCRD, 500); in xge_mac_set_speed()
52 SET_REG_BITS(&mc2, INTF_MODE, 1); in xge_mac_set_speed()
53 SET_REG_BITS(&intf_ctrl, HD_MODE, 1); in xge_mac_set_speed()
54 SET_REG_BITS(&icm0, CFG_MACMODE, 1); in xge_mac_set_speed()
55 SET_REG_BITS(&icm2, CFG_WAITASYNCRD, 80); in xge_mac_set_speed()
59 SET_REG_BITS(&mc2, INTF_MODE, 2); in xge_mac_set_speed()
60 SET_REG_BITS(&intf_ctrl, HD_MODE, 2); in xge_mac_set_speed()
61 SET_REG_BITS(&icm0, CFG_MACMODE, 2); in xge_mac_set_speed()
62 SET_REG_BITS(&icm2, CFG_WAITASYNCRD, 16); in xge_mac_set_speed()
68 SET_REG_BITS(&ecm0, CFG_WFIFOFULLTHR, 0x32); in xge_mac_set_speed()