Lines Matching refs:exec
99 static uint32_t vc4_full_res_offset(struct vc4_exec_info *exec, in vc4_full_res_offset() argument
105 (DIV_ROUND_UP(exec->args->width, 32) * y + x); in vc4_full_res_offset()
123 static void emit_tile(struct vc4_exec_info *exec, in emit_tile() argument
127 struct drm_vc4_submit_cl *args = exec->args; in emit_tile()
139 vc4_full_res_offset(exec, setup->color_read, in emit_tile()
155 vc4_full_res_offset(exec, setup->zs_read, in emit_tile()
185 rcl_u32(setup, (exec->tile_alloc_offset + in emit_tile()
186 (y * exec->bin_tiles_x + x) * 32)); in emit_tile()
201 vc4_full_res_offset(exec, setup->msaa_color_write, in emit_tile()
219 vc4_full_res_offset(exec, setup->msaa_zs_write, in emit_tile()
253 static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, in vc4_create_rcl_bo() argument
256 struct drm_vc4_submit_cl *args = exec->args; in vc4_create_rcl_bo()
336 &exec->unref_list); in vc4_create_rcl_bo()
373 emit_tile(exec, setup, x, y, first, last); in vc4_create_rcl_bo()
378 exec->ct1ca = setup->rcl->paddr; in vc4_create_rcl_bo()
379 exec->ct1ea = setup->rcl->paddr + setup->next_offset; in vc4_create_rcl_bo()
384 static int vc4_full_res_bounds_check(struct vc4_exec_info *exec, in vc4_full_res_bounds_check() argument
388 struct drm_vc4_submit_cl *args = exec->args; in vc4_full_res_bounds_check()
389 u32 render_tiles_stride = DIV_ROUND_UP(exec->args->width, 32); in vc4_full_res_bounds_check()
410 static int vc4_rcl_msaa_surface_setup(struct vc4_exec_info *exec, in vc4_rcl_msaa_surface_setup() argument
422 *obj = vc4_use_bo(exec, surf->hindex); in vc4_rcl_msaa_surface_setup()
426 exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; in vc4_rcl_msaa_surface_setup()
433 return vc4_full_res_bounds_check(exec, *obj, surf); in vc4_rcl_msaa_surface_setup()
436 static int vc4_rcl_surface_setup(struct vc4_exec_info *exec, in vc4_rcl_surface_setup() argument
458 *obj = vc4_use_bo(exec, surf->hindex); in vc4_rcl_surface_setup()
463 exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; in vc4_rcl_surface_setup()
466 if (surf == &exec->args->zs_write) { in vc4_rcl_surface_setup()
477 ret = vc4_full_res_bounds_check(exec, *obj, surf); in vc4_rcl_surface_setup()
526 if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling, in vc4_rcl_surface_setup()
527 exec->args->width, exec->args->height, cpp)) { in vc4_rcl_surface_setup()
535 vc4_rcl_render_config_surface_setup(struct vc4_exec_info *exec, in vc4_rcl_render_config_surface_setup() argument
563 *obj = vc4_use_bo(exec, surf->hindex); in vc4_rcl_render_config_surface_setup()
567 exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; in vc4_rcl_render_config_surface_setup()
587 if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling, in vc4_rcl_render_config_surface_setup()
588 exec->args->width, exec->args->height, cpp)) { in vc4_rcl_render_config_surface_setup()
595 int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec) in vc4_get_rcl() argument
598 struct drm_vc4_submit_cl *args = exec->args; in vc4_get_rcl()
611 (args->max_x_tile > exec->bin_tiles_x || in vc4_get_rcl()
612 args->max_y_tile > exec->bin_tiles_y)) { in vc4_get_rcl()
616 exec->bin_tiles_x, exec->bin_tiles_y); in vc4_get_rcl()
620 ret = vc4_rcl_render_config_surface_setup(exec, &setup, in vc4_get_rcl()
626 ret = vc4_rcl_surface_setup(exec, &setup.color_read, &args->color_read, in vc4_get_rcl()
631 ret = vc4_rcl_surface_setup(exec, &setup.zs_read, &args->zs_read, in vc4_get_rcl()
636 ret = vc4_rcl_surface_setup(exec, &setup.zs_write, &args->zs_write, in vc4_get_rcl()
641 ret = vc4_rcl_msaa_surface_setup(exec, &setup.msaa_color_write, in vc4_get_rcl()
646 ret = vc4_rcl_msaa_surface_setup(exec, &setup.msaa_zs_write, in vc4_get_rcl()
660 return vc4_create_rcl_bo(dev, exec, &setup); in vc4_get_rcl()