43 static const u32 crtc_offsets[2] =  variable
305 		crtc_enabled = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]) & AVIVO_CRTC_EN;  in rv515_mc_stop()
308 			tmp = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]);  in rv515_mc_stop()
311 				WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 1);  in rv515_mc_stop()
313 				WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);  in rv515_mc_stop()
314 				WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 0);  in rv515_mc_stop()
325 			WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 1);  in rv515_mc_stop()
326 			tmp = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]);  in rv515_mc_stop()
328 			WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);  in rv515_mc_stop()
329 			WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 0);  in rv515_mc_stop()
361 			tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]);  in rv515_mc_stop()
364 				WREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i], tmp);  in rv515_mc_stop()
366 			tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i]);  in rv515_mc_stop()
369 				WREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);  in rv515_mc_stop()
395 		WREG32(R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS + crtc_offsets[i],  in rv515_mc_resume()
397 		WREG32(R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS + crtc_offsets[i],  in rv515_mc_resume()
405 			tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i]);  in rv515_mc_resume()
409 				WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i], tmp);  in rv515_mc_resume()
411 			tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]);  in rv515_mc_resume()
414 				WREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i], tmp);  in rv515_mc_resume()
416 			tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i]);  in rv515_mc_resume()
419 				WREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);  in rv515_mc_resume()
422 				tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]);  in rv515_mc_resume()
447 			tmp = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]);  in rv515_mc_resume()
449 			WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);  in rv515_mc_resume()