1 /* 2 * FreeRTOS Kernel V11.1.0 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 30 #ifndef PORTMACRO_H 31 #define PORTMACRO_H 32 33 /* *INDENT-OFF* */ 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 /* *INDENT-ON* */ 38 39 /*----------------------------------------------------------- 40 * Port specific definitions. 41 * 42 * The settings in this file configure FreeRTOS correctly for the 43 * given hardware and compiler. 44 * 45 * These settings should not be altered. 46 *----------------------------------------------------------- 47 */ 48 49 /* Type definitions. */ 50 #define portCHAR char 51 #define portFLOAT float 52 #define portDOUBLE double 53 #define portLONG long 54 #define portSHORT short 55 #define portSTACK_TYPE uint32_t 56 #define portBASE_TYPE long 57 58 typedef portSTACK_TYPE StackType_t; 59 typedef long BaseType_t; 60 typedef unsigned long UBaseType_t; 61 62 63 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) 64 typedef uint16_t TickType_t; 65 #define portMAX_DELAY ( TickType_t ) 0xffff 66 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) 67 typedef uint32_t TickType_t; 68 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 69 70 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do 71 * not need to be guarded with a critical section. */ 72 #define portTICK_TYPE_IS_ATOMIC 1 73 #else 74 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. 75 #endif 76 /*-----------------------------------------------------------*/ 77 78 /* Architecture specifics. */ 79 #define portSTACK_GROWTH ( -1 ) 80 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 81 #define portBYTE_ALIGNMENT 8 82 /*-----------------------------------------------------------*/ 83 84 85 /* Scheduler utilities. */ 86 extern void vPortYield( void ); 87 #define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 ) 88 #define portNVIC_PENDSVSET 0x10000000 89 #define portYIELD() vPortYield() 90 91 #define portEND_SWITCHING_ISR( xSwitchRequired ) \ 92 do \ 93 { \ 94 if( xSwitchRequired != pdFALSE ) \ 95 { \ 96 traceISR_EXIT_TO_SCHEDULER(); \ 97 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET; \ 98 } \ 99 else \ 100 { \ 101 traceISR_EXIT(); \ 102 } \ 103 } while( 0 ) 104 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 105 /*-----------------------------------------------------------*/ 106 107 108 /* Critical section management. */ 109 110 /* 111 * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other 112 * registers. r0 is clobbered. 113 */ 114 #define portSET_INTERRUPT_MASK() __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY ) 115 116 /* 117 * Set basepri back to 0 without effective other registers. 118 * r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see 119 * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. 120 */ 121 #define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 ) 122 123 extern uint32_t ulPortSetInterruptMask( void ); 124 extern void vPortClearInterruptMask( uint32_t ulNewMask ); 125 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask() 126 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x ) 127 128 129 extern void vPortEnterCritical( void ); 130 extern void vPortExitCritical( void ); 131 132 #define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK() 133 #define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK() 134 #define portENTER_CRITICAL() vPortEnterCritical() 135 #define portEXIT_CRITICAL() vPortExitCritical() 136 137 /*-----------------------------------------------------------*/ 138 139 /* Task function macros as described on the FreeRTOS.org WEB site. */ 140 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) 141 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) 142 143 #define portNOP() 144 145 /* *INDENT-OFF* */ 146 #ifdef __cplusplus 147 } 148 #endif 149 /* *INDENT-ON* */ 150 151 #endif /* PORTMACRO_H */ 152
