1/*
2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29#include "PriorityDefinitions.h"
30
31    PUBLIC _prvStartFirstTask
32    PUBLIC ___interrupt_27
33
34    EXTERN _pxCurrentTCB
35    EXTERN _vTaskSwitchContext
36
37    RSEG CODE:CODE(4)
38
39_prvStartFirstTask:
40
41        /* When starting the scheduler there is nothing that needs moving to the
42        interrupt stack because the function is not called from an interrupt.
43        Just ensure the current stack is the user stack. */
44        SETPSW      U
45
46        /* Obtain the location of the stack associated with which ever task
47        pxCurrentTCB is currently pointing to. */
48        MOV.L       #_pxCurrentTCB, R15
49        MOV.L       [R15], R15
50        MOV.L       [R15], R0
51
52        /* Restore the registers from the stack of the task pointed to by
53        pxCurrentTCB. */
54        POP         R15
55
56        /* Accumulator low 32 bits. */
57        MVTACLO     R15, A0
58        POP         R15
59
60        /* Accumulator high 32 bits. */
61        MVTACHI     R15, A0
62        POP         R15
63
64        /* Accumulator guard. */
65        MVTACGU     R15, A0
66        POP         R15
67
68        /* Accumulator low 32 bits. */
69        MVTACLO     R15, A1
70        POP         R15
71
72        /* Accumulator high 32 bits. */
73        MVTACHI     R15, A1
74        POP         R15
75
76        /* Accumulator guard. */
77        MVTACGU     R15, A1
78        POP         R15
79
80        /* Floating point status word. */
81        MVTC        R15, FPSW
82
83        /* R1 to R15 - R0 is not included as it is the SP. */
84        POPM        R1-R15
85
86        /* This pops the remaining registers. */
87        RTE
88        NOP
89        NOP
90
91/*-----------------------------------------------------------*/
92
93/* The software interrupt - overwrite the default 'weak' definition. */
94___interrupt_27:
95
96        /* Re-enable interrupts. */
97        SETPSW      I
98
99        /* Move the data that was automatically pushed onto the interrupt stack when
100        the interrupt occurred from the interrupt stack to the user stack.
101
102        R15 is saved before it is clobbered. */
103        PUSH.L      R15
104
105        /* Read the user stack pointer. */
106        MVFC        USP, R15
107
108        /* Move the address down to the data being moved. */
109        SUB     #12, R15
110        MVTC        R15, USP
111
112        /* Copy the data across, R15, then PC, then PSW. */
113        MOV.L       [ R0 ], [ R15 ]
114        MOV.L       4[ R0 ], 4[ R15 ]
115        MOV.L       8[ R0 ], 8[ R15 ]
116
117        /* Move the interrupt stack pointer to its new correct position. */
118        ADD     #12, R0
119
120        /* All the rest of the registers are saved directly to the user stack. */
121        SETPSW      U
122
123        /* Save the rest of the general registers (R15 has been saved already). */
124        PUSHM       R1-R14
125
126        /* Save the FPSW and accumulator. */
127        MVFC        FPSW, R15
128        PUSH.L      R15
129        MVFACGU     #0, A1, R15
130        PUSH.L      R15
131        MVFACHI     #0, A1, R15
132        PUSH.L      R15
133        /* Low order word. */
134        MVFACLO     #0, A1, R15
135        PUSH.L      R15
136        MVFACGU     #0, A0, R15
137        PUSH.L      R15
138        MVFACHI     #0, A0, R15
139        PUSH.L      R15
140        /* Low order word. */
141        MVFACLO     #0, A0, R15
142        PUSH.L      R15
143
144        /* Save the stack pointer to the TCB. */
145        MOV.L       #_pxCurrentTCB, R15
146        MOV.L       [ R15 ], R15
147        MOV.L       R0, [ R15 ]
148
149        /* Ensure the interrupt mask is set to the syscall priority while the kernel
150        structures are being accessed. */
151        MVTIPL      #configMAX_SYSCALL_INTERRUPT_PRIORITY
152
153        /* Select the next task to run. */
154        BSR.A       _vTaskSwitchContext
155
156        /* Reset the interrupt mask as no more data structure access is required. */
157        MVTIPL      #configKERNEL_INTERRUPT_PRIORITY
158
159        /* Load the stack pointer of the task that is now selected as the Running
160        state task from its TCB. */
161        MOV.L       #_pxCurrentTCB,R15
162        MOV.L       [ R15 ], R15
163        MOV.L       [ R15 ], R0
164
165        /* Restore the context of the new task.  The PSW (Program Status Word) and
166        PC will be popped by the RTE instruction. */
167        POP     R15
168
169        /* Accumulator low 32 bits. */
170        MVTACLO R15, A0
171        POP     R15
172
173        /* Accumulator high 32 bits. */
174        MVTACHI R15, A0
175        POP     R15
176
177        /* Accumulator guard. */
178        MVTACGU R15, A0
179        POP     R15
180
181        /* Accumulator low 32 bits. */
182        MVTACLO R15, A1
183        POP     R15
184
185        /* Accumulator high 32 bits. */
186        MVTACHI R15, A1
187        POP     R15
188
189        /* Accumulator guard. */
190        MVTACGU R15, A1
191        POP     R15
192        MVTC        R15, FPSW
193        POPM        R1-R15
194        RTE
195        NOP
196        NOP
197
198/*-----------------------------------------------------------*/
199
200        END
201