1 /*
2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
31 *----------------------------------------------------------*/
32
33
34 /* Standard includes. */
35 #include <stdlib.h>
36
37 /* Scheduler includes. */
38 #include "FreeRTOS.h"
39 #include "task.h"
40
41 /* Constants required to setup the initial stack. */
42 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
43 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
44 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
45
46 /* Constants required to setup the PIT. */
47 #define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
48 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
49
50 /* Constants required to handle critical sections. */
51 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
52
53
54 #define portINT_LEVEL_SENSITIVE 0
55 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
56 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
57 /*-----------------------------------------------------------*/
58
59 /* Setup the PIT to generate the tick interrupts. */
60 static void prvSetupTimerInterrupt( void );
61
62 /* ulCriticalNesting will get set to zero when the first task starts. It
63 * cannot be initialised to 0 as this will cause interrupts to be enabled
64 * during the kernel initialisation process. */
65 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
66
67 /*-----------------------------------------------------------*/
68
69 /*
70 * Initialise the stack of a task to look exactly as if a call to
71 * portSAVE_CONTEXT had been called.
72 *
73 * See header file for description.
74 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)75 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
76 TaskFunction_t pxCode,
77 void * pvParameters )
78 {
79 StackType_t * pxOriginalTOS;
80
81 pxOriginalTOS = pxTopOfStack;
82
83 /* To ensure asserts in tasks.c don't fail, although in this case the assert
84 * is not really required. */
85 pxTopOfStack--;
86
87 /* Setup the initial stack of the task. The stack is set exactly as
88 * expected by the portRESTORE_CONTEXT() macro. */
89
90 /* First on the stack is the return address - which in this case is the
91 * start of the task. The offset is added to make the return address appear
92 * as it would within an IRQ ISR. */
93 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
94 pxTopOfStack--;
95
96 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
97 pxTopOfStack--;
98 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
99 pxTopOfStack--;
100 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
101 pxTopOfStack--;
102 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
103 pxTopOfStack--;
104 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
105 pxTopOfStack--;
106 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
107 pxTopOfStack--;
108 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
109 pxTopOfStack--;
110 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
111 pxTopOfStack--;
112 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
113 pxTopOfStack--;
114 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
115 pxTopOfStack--;
116 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
117 pxTopOfStack--;
118 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
119 pxTopOfStack--;
120 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
121 pxTopOfStack--;
122 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
123 pxTopOfStack--;
124
125 /* When the task starts is will expect to find the function parameter in
126 * R0. */
127 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
128 pxTopOfStack--;
129
130 /* The status register is set for system mode, with interrupts enabled. */
131 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
132
133 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
134 {
135 /* We want the task to start in thumb mode. */
136 *pxTopOfStack |= portTHUMB_MODE_BIT;
137 }
138
139 pxTopOfStack--;
140
141 /* Interrupt flags cannot always be stored on the stack and will
142 * instead be stored in a variable, which is then saved as part of the
143 * tasks context. */
144 *pxTopOfStack = portNO_CRITICAL_NESTING;
145
146 return pxTopOfStack;
147 }
148 /*-----------------------------------------------------------*/
149
xPortStartScheduler(void)150 BaseType_t xPortStartScheduler( void )
151 {
152 extern void vPortStartFirstTask( void );
153
154 /* Start the timer that generates the tick ISR. Interrupts are disabled
155 * here already. */
156 prvSetupTimerInterrupt();
157
158 /* Start the first task. */
159 vPortStartFirstTask();
160
161 /* Should not get here! */
162 return 0;
163 }
164 /*-----------------------------------------------------------*/
165
vPortEndScheduler(void)166 void vPortEndScheduler( void )
167 {
168 /* It is unlikely that the ARM port will require this function as there
169 * is nothing to return to. */
170 }
171 /*-----------------------------------------------------------*/
172
173 #if configUSE_PREEMPTION == 0
174
175 /* The cooperative scheduler requires a normal IRQ service routine to
176 * simply increment the system tick. */
177 static __arm __irq void vPortNonPreemptiveTick( void );
vPortNonPreemptiveTick(void)178 static __arm __irq void vPortNonPreemptiveTick( void )
179 {
180 uint32_t ulDummy;
181
182 /* Increment the tick count - which may wake some tasks but as the
183 * preemptive scheduler is not being used any woken task is not given
184 * processor time no matter what its priority. */
185 xTaskIncrementTick();
186
187 /* Clear the PIT interrupt. */
188 ulDummy = AT91C_BASE_PITC->PITC_PIVR;
189
190 /* End the interrupt in the AIC. */
191 AT91C_BASE_AIC->AIC_EOICR = ulDummy;
192 }
193
194 #else /* if configUSE_PREEMPTION == 0 */
195
196 /* Currently the IAR port requires the preemptive tick function to be
197 * defined in an asm file. */
198
199 #endif /* if configUSE_PREEMPTION == 0 */
200
201 /*-----------------------------------------------------------*/
202
prvSetupTimerInterrupt(void)203 static void prvSetupTimerInterrupt( void )
204 {
205 AT91PS_PITC pxPIT = AT91C_BASE_PITC;
206
207 /* Setup the AIC for PIT interrupts. The interrupt routine chosen depends
208 * on whether the preemptive or cooperative scheduler is being used. */
209 #if configUSE_PREEMPTION == 0
210 AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void ( * )( void ) )vPortNonPreemptiveTick );
211 #else
212 extern void( vPortPreemptiveTick )( void );
213 AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void ( * )( void ) )vPortPreemptiveTick );
214 #endif
215
216 /* Configure the PIT period. */
217 pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
218
219 /* Enable the interrupt. Global interrupts are disabled at this point so
220 * this is safe. */
221 AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_SYS );
222 }
223 /*-----------------------------------------------------------*/
224
vPortEnterCritical(void)225 void vPortEnterCritical( void )
226 {
227 /* Disable interrupts first! */
228 __disable_interrupt();
229
230 /* Now that interrupts are disabled, ulCriticalNesting can be accessed
231 * directly. Increment ulCriticalNesting to keep a count of how many times
232 * portENTER_CRITICAL() has been called. */
233 ulCriticalNesting++;
234 }
235 /*-----------------------------------------------------------*/
236
vPortExitCritical(void)237 void vPortExitCritical( void )
238 {
239 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
240 {
241 /* Decrement the nesting count as we are leaving a critical section. */
242 ulCriticalNesting--;
243
244 /* If the nesting level has reached zero then interrupts should be
245 * re-enabled. */
246 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
247 {
248 __enable_interrupt();
249 }
250 }
251 }
252 /*-----------------------------------------------------------*/
253
