1 /** ---------------------------------------------------------------------------- */ 2 /** ATMEL Microcontroller Software Support - ROUSSET - */ 3 /** ---------------------------------------------------------------------------- */ 4 /** DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ 5 /** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ 6 /** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ 7 /** DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ 8 /** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ 9 /** LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ 10 /** OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ 11 /** LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ 12 /** NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ 13 /** EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ 14 /** ---------------------------------------------------------------------------- */ 15 /** File Name : lib_AT91SAM7X256.h */ 16 /** Object : AT91SAM7X256 inlined functions */ 17 /** Generated : AT91 SW Application Group 05/20/2005 (16:22:29) */ 18 /** */ 19 /** CVS Reference : /lib_dbgu.h/1.1/Fri Jan 31 12:18:40 2003// */ 20 /** CVS Reference : /lib_pmc_SAM7X.h/1.1/Tue Feb 1 08:32:10 2005// */ 21 /** CVS Reference : /lib_VREG_6085B.h/1.1/Tue Feb 1 16:20:47 2005// */ 22 /** CVS Reference : /lib_rstc_6098A.h/1.1/Wed Oct 6 10:39:20 2004// */ 23 /** CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003// */ 24 /** CVS Reference : /lib_wdtc_6080A.h/1.1/Wed Oct 6 10:38:30 2004// */ 25 /** CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002// */ 26 /** CVS Reference : /lib_spi2.h/1.1/Mon Aug 25 14:23:52 2003// */ 27 /** CVS Reference : /lib_pitc_6079A.h/1.2/Tue Nov 9 14:43:56 2004// */ 28 /** CVS Reference : /lib_aic_6075b.h/1.1/Fri May 20 14:01:19 2005// */ 29 /** CVS Reference : /lib_aes_6149a.h/1.1/Mon Jan 17 07:43:09 2005// */ 30 /** CVS Reference : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004// */ 31 /** CVS Reference : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003// */ 32 /** CVS Reference : /lib_rttc_6081A.h/1.1/Wed Oct 6 10:39:38 2004// */ 33 /** CVS Reference : /lib_udp.h/1.4/Wed Feb 16 08:39:34 2005// */ 34 /** CVS Reference : /lib_des3_6150a.h/1.1/Mon Jan 17 09:19:19 2005// */ 35 /** CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003// */ 36 /** CVS Reference : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004// */ 37 /** CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003// */ 38 /** CVS Reference : /lib_can_AT91.h/1.4/Fri Oct 17 09:12:50 2003// */ 39 /** CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004// */ 40 /** CVS Reference : /lib_pdc.h/1.2/Tue Jul 2 13:29:40 2002// */ 41 /** ---------------------------------------------------------------------------- */ 42 43 #ifndef lib_AT91SAM7X256_H 44 #define lib_AT91SAM7X256_H 45 46 /* ***************************************************************************** 47 * SOFTWARE API FOR AIC 48 ***************************************************************************** */ 49 #define AT91C_AIC_BRANCH_OPCODE ( ( void ( * )() ) 0xE51FFF20 ) /* ldr, pc, [pc, #-&F20] */ 50 51 /**---------------------------------------------------------------------------- */ 52 /** \fn AT91F_AIC_ConfigureIt */ 53 /** \brief Interrupt Handler Initialization */ 54 /**---------------------------------------------------------------------------- */ AT91F_AIC_ConfigureIt(AT91PS_AIC pAic,unsigned int irq_id,unsigned int priority,unsigned int src_type,void (* newHandler)(void))55 __inline unsigned int AT91F_AIC_ConfigureIt( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */ 56 unsigned int irq_id, /* \arg interrupt number to initialize */ 57 unsigned int priority, /* \arg priority to give to the interrupt */ 58 unsigned int src_type, /* \arg activation and sense of activation */ 59 void ( * newHandler )( void ) ) /* \arg address of the interrupt handler */ 60 { 61 unsigned int oldHandler; 62 unsigned int mask; 63 64 oldHandler = pAic->AIC_SVR[ irq_id ]; 65 66 mask = 0x1 << irq_id; 67 /** Disable the interrupt on the interrupt controller */ 68 pAic->AIC_IDCR = mask; 69 /** Save the interrupt handler routine pointer and the interrupt priority */ 70 pAic->AIC_SVR[ irq_id ] = ( unsigned int ) newHandler; 71 /** Store the Source Mode Register */ 72 pAic->AIC_SMR[ irq_id ] = src_type | priority; 73 /** Clear the interrupt on the interrupt controller */ 74 pAic->AIC_ICCR = mask; 75 76 return oldHandler; 77 } 78 79 /**---------------------------------------------------------------------------- */ 80 /** \fn AT91F_AIC_EnableIt */ 81 /** \brief Enable corresponding IT number */ 82 /**---------------------------------------------------------------------------- */ AT91F_AIC_EnableIt(AT91PS_AIC pAic,unsigned int irq_id)83 __inline void AT91F_AIC_EnableIt( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */ 84 unsigned int irq_id ) /* \arg interrupt number to initialize */ 85 { 86 /** Enable the interrupt on the interrupt controller */ 87 pAic->AIC_IECR = 0x1 << irq_id; 88 } 89 90 /**---------------------------------------------------------------------------- */ 91 /** \fn AT91F_AIC_DisableIt */ 92 /** \brief Disable corresponding IT number */ 93 /**---------------------------------------------------------------------------- */ AT91F_AIC_DisableIt(AT91PS_AIC pAic,unsigned int irq_id)94 __inline void AT91F_AIC_DisableIt( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */ 95 unsigned int irq_id ) /* \arg interrupt number to initialize */ 96 { 97 unsigned int mask = 0x1 << irq_id; 98 99 /** Disable the interrupt on the interrupt controller */ 100 pAic->AIC_IDCR = mask; 101 /** Clear the interrupt on the Interrupt Controller ( if one is pending ) */ 102 pAic->AIC_ICCR = mask; 103 } 104 105 /**---------------------------------------------------------------------------- */ 106 /** \fn AT91F_AIC_ClearIt */ 107 /** \brief Clear corresponding IT number */ 108 /**---------------------------------------------------------------------------- */ AT91F_AIC_ClearIt(AT91PS_AIC pAic,unsigned int irq_id)109 __inline void AT91F_AIC_ClearIt( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */ 110 unsigned int irq_id ) /* \arg interrupt number to initialize */ 111 { 112 /** Clear the interrupt on the Interrupt Controller ( if one is pending ) */ 113 pAic->AIC_ICCR = ( 0x1 << irq_id ); 114 } 115 116 /**---------------------------------------------------------------------------- */ 117 /** \fn AT91F_AIC_AcknowledgeIt */ 118 /** \brief Acknowledge corresponding IT number */ 119 /**---------------------------------------------------------------------------- */ AT91F_AIC_AcknowledgeIt(AT91PS_AIC pAic)120 __inline void AT91F_AIC_AcknowledgeIt( AT91PS_AIC pAic ) /* \arg pointer to the AIC registers */ 121 { 122 pAic->AIC_EOICR = pAic->AIC_EOICR; 123 } 124 125 /**---------------------------------------------------------------------------- */ 126 /** \fn AT91F_AIC_SetExceptionVector */ 127 /** \brief Configure vector handler */ 128 /**---------------------------------------------------------------------------- */ AT91F_AIC_SetExceptionVector(unsigned int * pVector,void (* Handler)())129 __inline unsigned int AT91F_AIC_SetExceptionVector( unsigned int * pVector, /* \arg pointer to the AIC registers */ 130 void ( * Handler )() ) /* \arg Interrupt Handler */ 131 { 132 unsigned int oldVector = *pVector; 133 134 if( ( unsigned int ) Handler == ( unsigned int ) AT91C_AIC_BRANCH_OPCODE ) 135 { 136 *pVector = ( unsigned int ) AT91C_AIC_BRANCH_OPCODE; 137 } 138 else 139 { 140 *pVector = ( ( ( ( ( unsigned int ) Handler ) - ( ( unsigned int ) pVector ) - 0x8 ) >> 2 ) & 0x00FFFFFF ) | 0xEA000000; 141 } 142 143 return oldVector; 144 } 145 146 /**---------------------------------------------------------------------------- */ 147 /** \fn AT91F_AIC_Trig */ 148 /** \brief Trig an IT */ 149 /**---------------------------------------------------------------------------- */ AT91F_AIC_Trig(AT91PS_AIC pAic,unsigned int irq_id)150 __inline void AT91F_AIC_Trig( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */ 151 unsigned int irq_id ) /* \arg interrupt number */ 152 { 153 pAic->AIC_ISCR = ( 0x1 << irq_id ); 154 } 155 156 /**---------------------------------------------------------------------------- */ 157 /** \fn AT91F_AIC_IsActive */ 158 /** \brief Test if an IT is active */ 159 /**---------------------------------------------------------------------------- */ AT91F_AIC_IsActive(AT91PS_AIC pAic,unsigned int irq_id)160 __inline unsigned int AT91F_AIC_IsActive( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */ 161 unsigned int irq_id ) /* \arg Interrupt Number */ 162 { 163 return( pAic->AIC_ISR & ( 0x1 << irq_id ) ); 164 } 165 166 /**---------------------------------------------------------------------------- */ 167 /** \fn AT91F_AIC_IsPending */ 168 /** \brief Test if an IT is pending */ 169 /**---------------------------------------------------------------------------- */ AT91F_AIC_IsPending(AT91PS_AIC pAic,unsigned int irq_id)170 __inline unsigned int AT91F_AIC_IsPending( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */ 171 unsigned int irq_id ) /* \arg Interrupt Number */ 172 { 173 return( pAic->AIC_IPR & ( 0x1 << irq_id ) ); 174 } 175 176 /**---------------------------------------------------------------------------- */ 177 /** \fn AT91F_AIC_Open */ 178 /** \brief Set exception vectors and AIC registers to default values */ 179 /**---------------------------------------------------------------------------- */ AT91F_AIC_Open(AT91PS_AIC pAic,void (* IrqHandler)(),void (* FiqHandler)(),void (* DefaultHandler)(),void (* SpuriousHandler)(),unsigned int protectMode)180 __inline void AT91F_AIC_Open( AT91PS_AIC pAic, /* \arg pointer to the AIC registers */ 181 void ( * IrqHandler )(), /* \arg Default IRQ vector exception */ 182 void ( * FiqHandler )(), /* \arg Default FIQ vector exception */ 183 void ( * DefaultHandler )(), /* \arg Default Handler set in ISR */ 184 void ( * SpuriousHandler )(), /* \arg Default Spurious Handler */ 185 unsigned int protectMode ) /* \arg Debug Control Register */ 186 { 187 int i; 188 189 /* Disable all interrupts and set IVR to the default handler */ 190 for( i = 0; i < 32; ++i ) 191 { 192 AT91F_AIC_DisableIt( pAic, i ); 193 AT91F_AIC_ConfigureIt( pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler ); 194 } 195 196 /* Set the IRQ exception vector */ 197 AT91F_AIC_SetExceptionVector( ( unsigned int * ) 0x18, IrqHandler ); 198 /* Set the Fast Interrupt exception vector */ 199 AT91F_AIC_SetExceptionVector( ( unsigned int * ) 0x1C, FiqHandler ); 200 201 pAic->AIC_SPU = ( unsigned int ) SpuriousHandler; 202 pAic->AIC_DCR = protectMode; 203 } 204 205 /* ***************************************************************************** 206 * SOFTWARE API FOR PDC 207 ***************************************************************************** */ 208 /**---------------------------------------------------------------------------- */ 209 /** \fn AT91F_PDC_SetNextRx */ 210 /** \brief Set the next receive transfer descriptor */ 211 /**---------------------------------------------------------------------------- */ AT91F_PDC_SetNextRx(AT91PS_PDC pPDC,char * address,unsigned int bytes)212 __inline void AT91F_PDC_SetNextRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ 213 char * address, /* \arg address to the next bloc to be received */ 214 unsigned int bytes ) /* \arg number of bytes to be received */ 215 { 216 pPDC->PDC_RNPR = ( unsigned int ) address; 217 pPDC->PDC_RNCR = bytes; 218 } 219 220 /**---------------------------------------------------------------------------- */ 221 /** \fn AT91F_PDC_SetNextTx */ 222 /** \brief Set the next transmit transfer descriptor */ 223 /**---------------------------------------------------------------------------- */ AT91F_PDC_SetNextTx(AT91PS_PDC pPDC,char * address,unsigned int bytes)224 __inline void AT91F_PDC_SetNextTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ 225 char * address, /* \arg address to the next bloc to be transmitted */ 226 unsigned int bytes ) /* \arg number of bytes to be transmitted */ 227 { 228 pPDC->PDC_TNPR = ( unsigned int ) address; 229 pPDC->PDC_TNCR = bytes; 230 } 231 232 /**---------------------------------------------------------------------------- */ 233 /** \fn AT91F_PDC_SetRx */ 234 /** \brief Set the receive transfer descriptor */ 235 /**---------------------------------------------------------------------------- */ AT91F_PDC_SetRx(AT91PS_PDC pPDC,char * address,unsigned int bytes)236 __inline void AT91F_PDC_SetRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ 237 char * address, /* \arg address to the next bloc to be received */ 238 unsigned int bytes ) /* \arg number of bytes to be received */ 239 { 240 pPDC->PDC_RPR = ( unsigned int ) address; 241 pPDC->PDC_RCR = bytes; 242 } 243 244 /**---------------------------------------------------------------------------- */ 245 /** \fn AT91F_PDC_SetTx */ 246 /** \brief Set the transmit transfer descriptor */ 247 /**---------------------------------------------------------------------------- */ AT91F_PDC_SetTx(AT91PS_PDC pPDC,char * address,unsigned int bytes)248 __inline void AT91F_PDC_SetTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ 249 char * address, /* \arg address to the next bloc to be transmitted */ 250 unsigned int bytes ) /* \arg number of bytes to be transmitted */ 251 { 252 pPDC->PDC_TPR = ( unsigned int ) address; 253 pPDC->PDC_TCR = bytes; 254 } 255 256 /**---------------------------------------------------------------------------- */ 257 /** \fn AT91F_PDC_EnableTx */ 258 /** \brief Enable transmit */ 259 /**---------------------------------------------------------------------------- */ AT91F_PDC_EnableTx(AT91PS_PDC pPDC)260 __inline void AT91F_PDC_EnableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 261 { 262 pPDC->PDC_PTCR = AT91C_PDC_TXTEN; 263 } 264 265 /**---------------------------------------------------------------------------- */ 266 /** \fn AT91F_PDC_EnableRx */ 267 /** \brief Enable receive */ 268 /**---------------------------------------------------------------------------- */ AT91F_PDC_EnableRx(AT91PS_PDC pPDC)269 __inline void AT91F_PDC_EnableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 270 { 271 pPDC->PDC_PTCR = AT91C_PDC_RXTEN; 272 } 273 274 /**---------------------------------------------------------------------------- */ 275 /** \fn AT91F_PDC_DisableTx */ 276 /** \brief Disable transmit */ 277 /**---------------------------------------------------------------------------- */ AT91F_PDC_DisableTx(AT91PS_PDC pPDC)278 __inline void AT91F_PDC_DisableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 279 { 280 pPDC->PDC_PTCR = AT91C_PDC_TXTDIS; 281 } 282 283 /**---------------------------------------------------------------------------- */ 284 /** \fn AT91F_PDC_DisableRx */ 285 /** \brief Disable receive */ 286 /**---------------------------------------------------------------------------- */ AT91F_PDC_DisableRx(AT91PS_PDC pPDC)287 __inline void AT91F_PDC_DisableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 288 { 289 pPDC->PDC_PTCR = AT91C_PDC_RXTDIS; 290 } 291 292 /**---------------------------------------------------------------------------- */ 293 /** \fn AT91F_PDC_IsTxEmpty */ 294 /** \brief Test if the current transfer descriptor has been sent */ 295 /**---------------------------------------------------------------------------- */ AT91F_PDC_IsTxEmpty(AT91PS_PDC pPDC)296 __inline int AT91F_PDC_IsTxEmpty( /* \return return 1 if transfer is complete */ 297 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 298 { 299 return !( pPDC->PDC_TCR ); 300 } 301 302 /**---------------------------------------------------------------------------- */ 303 /** \fn AT91F_PDC_IsNextTxEmpty */ 304 /** \brief Test if the next transfer descriptor has been moved to the current td */ 305 /**---------------------------------------------------------------------------- */ AT91F_PDC_IsNextTxEmpty(AT91PS_PDC pPDC)306 __inline int AT91F_PDC_IsNextTxEmpty( /* \return return 1 if transfer is complete */ 307 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 308 { 309 return !( pPDC->PDC_TNCR ); 310 } 311 312 /**---------------------------------------------------------------------------- */ 313 /** \fn AT91F_PDC_IsRxEmpty */ 314 /** \brief Test if the current transfer descriptor has been filled */ 315 /**---------------------------------------------------------------------------- */ AT91F_PDC_IsRxEmpty(AT91PS_PDC pPDC)316 __inline int AT91F_PDC_IsRxEmpty( /* \return return 1 if transfer is complete */ 317 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 318 { 319 return !( pPDC->PDC_RCR ); 320 } 321 322 /**---------------------------------------------------------------------------- */ 323 /** \fn AT91F_PDC_IsNextRxEmpty */ 324 /** \brief Test if the next transfer descriptor has been moved to the current td */ 325 /**---------------------------------------------------------------------------- */ AT91F_PDC_IsNextRxEmpty(AT91PS_PDC pPDC)326 __inline int AT91F_PDC_IsNextRxEmpty( /* \return return 1 if transfer is complete */ 327 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 328 { 329 return !( pPDC->PDC_RNCR ); 330 } 331 332 /**---------------------------------------------------------------------------- */ 333 /** \fn AT91F_PDC_Open */ 334 /** \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX */ 335 /**---------------------------------------------------------------------------- */ AT91F_PDC_Open(AT91PS_PDC pPDC)336 __inline void AT91F_PDC_Open( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 337 { 338 /** Disable the RX and TX PDC transfer requests */ 339 AT91F_PDC_DisableRx( pPDC ); 340 AT91F_PDC_DisableTx( pPDC ); 341 342 /** Reset all Counter register Next buffer first */ 343 AT91F_PDC_SetNextTx( pPDC, ( char * ) 0, 0 ); 344 AT91F_PDC_SetNextRx( pPDC, ( char * ) 0, 0 ); 345 AT91F_PDC_SetTx( pPDC, ( char * ) 0, 0 ); 346 AT91F_PDC_SetRx( pPDC, ( char * ) 0, 0 ); 347 348 /** Enable the RX and TX PDC transfer requests */ 349 AT91F_PDC_EnableRx( pPDC ); 350 AT91F_PDC_EnableTx( pPDC ); 351 } 352 353 /**---------------------------------------------------------------------------- */ 354 /** \fn AT91F_PDC_Close */ 355 /** \brief Close PDC: disable TX and RX reset transfer descriptors */ 356 /**---------------------------------------------------------------------------- */ AT91F_PDC_Close(AT91PS_PDC pPDC)357 __inline void AT91F_PDC_Close( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ 358 { 359 /** Disable the RX and TX PDC transfer requests */ 360 AT91F_PDC_DisableRx( pPDC ); 361 AT91F_PDC_DisableTx( pPDC ); 362 363 /** Reset all Counter register Next buffer first */ 364 AT91F_PDC_SetNextTx( pPDC, ( char * ) 0, 0 ); 365 AT91F_PDC_SetNextRx( pPDC, ( char * ) 0, 0 ); 366 AT91F_PDC_SetTx( pPDC, ( char * ) 0, 0 ); 367 AT91F_PDC_SetRx( pPDC, ( char * ) 0, 0 ); 368 } 369 370 /**---------------------------------------------------------------------------- */ 371 /** \fn AT91F_PDC_SendFrame */ 372 /** \brief Close PDC: disable TX and RX reset transfer descriptors */ 373 /**---------------------------------------------------------------------------- */ AT91F_PDC_SendFrame(AT91PS_PDC pPDC,char * pBuffer,unsigned int szBuffer,char * pNextBuffer,unsigned int szNextBuffer)374 __inline unsigned int AT91F_PDC_SendFrame( AT91PS_PDC pPDC, 375 char * pBuffer, 376 unsigned int szBuffer, 377 char * pNextBuffer, 378 unsigned int szNextBuffer ) 379 { 380 if( AT91F_PDC_IsTxEmpty( pPDC ) ) 381 { 382 /** Buffer and next buffer can be initialized */ 383 AT91F_PDC_SetTx( pPDC, pBuffer, szBuffer ); 384 AT91F_PDC_SetNextTx( pPDC, pNextBuffer, szNextBuffer ); 385 return 2; 386 } 387 else if( AT91F_PDC_IsNextTxEmpty( pPDC ) ) 388 { 389 /** Only one buffer can be initialized */ 390 AT91F_PDC_SetNextTx( pPDC, pBuffer, szBuffer ); 391 return 1; 392 } 393 else 394 { 395 /** All buffer are in use... */ 396 return 0; 397 } 398 } 399 400 /**---------------------------------------------------------------------------- */ 401 /** \fn AT91F_PDC_ReceiveFrame */ 402 /** \brief Close PDC: disable TX and RX reset transfer descriptors */ 403 /**---------------------------------------------------------------------------- */ AT91F_PDC_ReceiveFrame(AT91PS_PDC pPDC,char * pBuffer,unsigned int szBuffer,char * pNextBuffer,unsigned int szNextBuffer)404 __inline unsigned int AT91F_PDC_ReceiveFrame( AT91PS_PDC pPDC, 405 char * pBuffer, 406 unsigned int szBuffer, 407 char * pNextBuffer, 408 unsigned int szNextBuffer ) 409 { 410 if( AT91F_PDC_IsRxEmpty( pPDC ) ) 411 { 412 /** Buffer and next buffer can be initialized */ 413 AT91F_PDC_SetRx( pPDC, pBuffer, szBuffer ); 414 AT91F_PDC_SetNextRx( pPDC, pNextBuffer, szNextBuffer ); 415 return 2; 416 } 417 else if( AT91F_PDC_IsNextRxEmpty( pPDC ) ) 418 { 419 /** Only one buffer can be initialized */ 420 AT91F_PDC_SetNextRx( pPDC, pBuffer, szBuffer ); 421 return 1; 422 } 423 else 424 { 425 /** All buffer are in use... */ 426 return 0; 427 } 428 } 429 430 /* ***************************************************************************** 431 * SOFTWARE API FOR DBGU 432 ***************************************************************************** */ 433 /**---------------------------------------------------------------------------- */ 434 /** \fn AT91F_DBGU_InterruptEnable */ 435 /** \brief Enable DBGU Interrupt */ 436 /**---------------------------------------------------------------------------- */ AT91F_DBGU_InterruptEnable(AT91PS_DBGU pDbgu,unsigned int flag)437 __inline void AT91F_DBGU_InterruptEnable( AT91PS_DBGU pDbgu, /* \arg pointer to a DBGU controller */ 438 unsigned int flag ) /* \arg dbgu interrupt to be enabled */ 439 { 440 pDbgu->DBGU_IER = flag; 441 } 442 443 /**---------------------------------------------------------------------------- */ 444 /** \fn AT91F_DBGU_InterruptDisable */ 445 /** \brief Disable DBGU Interrupt */ 446 /**---------------------------------------------------------------------------- */ AT91F_DBGU_InterruptDisable(AT91PS_DBGU pDbgu,unsigned int flag)447 __inline void AT91F_DBGU_InterruptDisable( AT91PS_DBGU pDbgu, /* \arg pointer to a DBGU controller */ 448 unsigned int flag ) /* \arg dbgu interrupt to be disabled */ 449 { 450 pDbgu->DBGU_IDR = flag; 451 } 452 453 /**---------------------------------------------------------------------------- */ 454 /** \fn AT91F_DBGU_GetInterruptMaskStatus */ 455 /** \brief Return DBGU Interrupt Mask Status */ 456 /**---------------------------------------------------------------------------- */ AT91F_DBGU_GetInterruptMaskStatus(AT91PS_DBGU pDbgu)457 __inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( /* \return DBGU Interrupt Mask Status */ 458 AT91PS_DBGU pDbgu ) /* \arg pointer to a DBGU controller */ 459 { 460 return pDbgu->DBGU_IMR; 461 } 462 463 /**---------------------------------------------------------------------------- */ 464 /** \fn AT91F_DBGU_IsInterruptMasked */ 465 /** \brief Test if DBGU Interrupt is Masked */ 466 /**---------------------------------------------------------------------------- */ AT91F_DBGU_IsInterruptMasked(AT91PS_DBGU pDbgu,unsigned int flag)467 __inline int AT91F_DBGU_IsInterruptMasked( AT91PS_DBGU pDbgu, /* \arg pointer to a DBGU controller */ 468 unsigned int flag ) /* \arg flag to be tested */ 469 { 470 return( AT91F_DBGU_GetInterruptMaskStatus( pDbgu ) & flag ); 471 } 472 473 /* ***************************************************************************** 474 * SOFTWARE API FOR PIO 475 ***************************************************************************** */ 476 /**---------------------------------------------------------------------------- */ 477 /** \fn AT91F_PIO_CfgPeriph */ 478 /** \brief Enable pins to be derived by peripheral */ 479 /**---------------------------------------------------------------------------- */ AT91F_PIO_CfgPeriph(AT91PS_PIO pPio,unsigned int periphAEnable,unsigned int periphBEnable)480 __inline void AT91F_PIO_CfgPeriph( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 481 unsigned int periphAEnable, /* \arg PERIPH A to enable */ 482 unsigned int periphBEnable ) /* \arg PERIPH B to enable */ 483 484 { 485 pPio->PIO_ASR = periphAEnable; 486 pPio->PIO_BSR = periphBEnable; 487 pPio->PIO_PDR = ( periphAEnable | periphBEnable ); /* Set in Periph mode */ 488 } 489 490 /**---------------------------------------------------------------------------- */ 491 /** \fn AT91F_PIO_CfgOutput */ 492 /** \brief Enable PIO in output mode */ 493 /**---------------------------------------------------------------------------- */ AT91F_PIO_CfgOutput(AT91PS_PIO pPio,unsigned int pioEnable)494 __inline void AT91F_PIO_CfgOutput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 495 unsigned int pioEnable ) /* \arg PIO to be enabled */ 496 { 497 pPio->PIO_PER = pioEnable; /* Set in PIO mode */ 498 pPio->PIO_OER = pioEnable; /* Configure in Output */ 499 } 500 501 /**---------------------------------------------------------------------------- */ 502 /** \fn AT91F_PIO_CfgInput */ 503 /** \brief Enable PIO in input mode */ 504 /**---------------------------------------------------------------------------- */ AT91F_PIO_CfgInput(AT91PS_PIO pPio,unsigned int inputEnable)505 __inline void AT91F_PIO_CfgInput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 506 unsigned int inputEnable ) /* \arg PIO to be enabled */ 507 { 508 /* Disable output */ 509 pPio->PIO_ODR = inputEnable; 510 pPio->PIO_PER = inputEnable; 511 } 512 513 /**---------------------------------------------------------------------------- */ 514 /** \fn AT91F_PIO_CfgOpendrain */ 515 /** \brief Configure PIO in open drain */ 516 /**---------------------------------------------------------------------------- */ AT91F_PIO_CfgOpendrain(AT91PS_PIO pPio,unsigned int multiDrvEnable)517 __inline void AT91F_PIO_CfgOpendrain( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 518 unsigned int multiDrvEnable ) /* \arg pio to be configured in open drain */ 519 { 520 /* Configure the multi-drive option */ 521 pPio->PIO_MDDR = ~multiDrvEnable; 522 pPio->PIO_MDER = multiDrvEnable; 523 } 524 525 /**---------------------------------------------------------------------------- */ 526 /** \fn AT91F_PIO_CfgPullup */ 527 /** \brief Enable pullup on PIO */ 528 /**---------------------------------------------------------------------------- */ AT91F_PIO_CfgPullup(AT91PS_PIO pPio,unsigned int pullupEnable)529 __inline void AT91F_PIO_CfgPullup( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 530 unsigned int pullupEnable ) /* \arg enable pullup on PIO */ 531 { 532 /* Connect or not Pullup */ 533 pPio->PIO_PPUDR = ~pullupEnable; 534 pPio->PIO_PPUER = pullupEnable; 535 } 536 537 /**---------------------------------------------------------------------------- */ 538 /** \fn AT91F_PIO_CfgDirectDrive */ 539 /** \brief Enable direct drive on PIO */ 540 /**---------------------------------------------------------------------------- */ AT91F_PIO_CfgDirectDrive(AT91PS_PIO pPio,unsigned int directDrive)541 __inline void AT91F_PIO_CfgDirectDrive( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 542 unsigned int directDrive ) /* \arg PIO to be configured with direct drive */ 543 544 { 545 /* Configure the Direct Drive */ 546 pPio->PIO_OWDR = ~directDrive; 547 pPio->PIO_OWER = directDrive; 548 } 549 550 /**---------------------------------------------------------------------------- */ 551 /** \fn AT91F_PIO_CfgInputFilter */ 552 /** \brief Enable input filter on input PIO */ 553 /**---------------------------------------------------------------------------- */ AT91F_PIO_CfgInputFilter(AT91PS_PIO pPio,unsigned int inputFilter)554 __inline void AT91F_PIO_CfgInputFilter( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 555 unsigned int inputFilter ) /* \arg PIO to be configured with input filter */ 556 557 { 558 /* Configure the Direct Drive */ 559 pPio->PIO_IFDR = ~inputFilter; 560 pPio->PIO_IFER = inputFilter; 561 } 562 563 /**---------------------------------------------------------------------------- */ 564 /** \fn AT91F_PIO_GetInput */ 565 /** \brief Return PIO input value */ 566 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetInput(AT91PS_PIO pPio)567 __inline unsigned int AT91F_PIO_GetInput( /* \return PIO input */ 568 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 569 { 570 return pPio->PIO_PDSR; 571 } 572 573 /**---------------------------------------------------------------------------- */ 574 /** \fn AT91F_PIO_IsInputSet */ 575 /** \brief Test if PIO is input flag is active */ 576 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsInputSet(AT91PS_PIO pPio,unsigned int flag)577 __inline int AT91F_PIO_IsInputSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 578 unsigned int flag ) /* \arg flag to be tested */ 579 { 580 return( AT91F_PIO_GetInput( pPio ) & flag ); 581 } 582 583 584 /**---------------------------------------------------------------------------- */ 585 /** \fn AT91F_PIO_SetOutput */ 586 /** \brief Set to 1 output PIO */ 587 /**---------------------------------------------------------------------------- */ AT91F_PIO_SetOutput(AT91PS_PIO pPio,unsigned int flag)588 __inline void AT91F_PIO_SetOutput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 589 unsigned int flag ) /* \arg output to be set */ 590 { 591 pPio->PIO_SODR = flag; 592 } 593 594 /**---------------------------------------------------------------------------- */ 595 /** \fn AT91F_PIO_ClearOutput */ 596 /** \brief Set to 0 output PIO */ 597 /**---------------------------------------------------------------------------- */ AT91F_PIO_ClearOutput(AT91PS_PIO pPio,unsigned int flag)598 __inline void AT91F_PIO_ClearOutput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 599 unsigned int flag ) /* \arg output to be cleared */ 600 { 601 pPio->PIO_CODR = flag; 602 } 603 604 /**---------------------------------------------------------------------------- */ 605 /** \fn AT91F_PIO_ForceOutput */ 606 /** \brief Force output when Direct drive option is enabled */ 607 /**---------------------------------------------------------------------------- */ AT91F_PIO_ForceOutput(AT91PS_PIO pPio,unsigned int flag)608 __inline void AT91F_PIO_ForceOutput( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 609 unsigned int flag ) /* \arg output to be forced */ 610 { 611 pPio->PIO_ODSR = flag; 612 } 613 614 /**---------------------------------------------------------------------------- */ 615 /** \fn AT91F_PIO_Enable */ 616 /** \brief Enable PIO */ 617 /**---------------------------------------------------------------------------- */ AT91F_PIO_Enable(AT91PS_PIO pPio,unsigned int flag)618 __inline void AT91F_PIO_Enable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 619 unsigned int flag ) /* \arg pio to be enabled */ 620 { 621 pPio->PIO_PER = flag; 622 } 623 624 /**---------------------------------------------------------------------------- */ 625 /** \fn AT91F_PIO_Disable */ 626 /** \brief Disable PIO */ 627 /**---------------------------------------------------------------------------- */ AT91F_PIO_Disable(AT91PS_PIO pPio,unsigned int flag)628 __inline void AT91F_PIO_Disable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 629 unsigned int flag ) /* \arg pio to be disabled */ 630 { 631 pPio->PIO_PDR = flag; 632 } 633 634 /**---------------------------------------------------------------------------- */ 635 /** \fn AT91F_PIO_GetStatus */ 636 /** \brief Return PIO Status */ 637 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetStatus(AT91PS_PIO pPio)638 __inline unsigned int AT91F_PIO_GetStatus( /* \return PIO Status */ 639 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 640 { 641 return pPio->PIO_PSR; 642 } 643 644 /**---------------------------------------------------------------------------- */ 645 /** \fn AT91F_PIO_IsSet */ 646 /** \brief Test if PIO is Set */ 647 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsSet(AT91PS_PIO pPio,unsigned int flag)648 __inline int AT91F_PIO_IsSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 649 unsigned int flag ) /* \arg flag to be tested */ 650 { 651 return( AT91F_PIO_GetStatus( pPio ) & flag ); 652 } 653 654 /**---------------------------------------------------------------------------- */ 655 /** \fn AT91F_PIO_OutputEnable */ 656 /** \brief Output Enable PIO */ 657 /**---------------------------------------------------------------------------- */ AT91F_PIO_OutputEnable(AT91PS_PIO pPio,unsigned int flag)658 __inline void AT91F_PIO_OutputEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 659 unsigned int flag ) /* \arg pio output to be enabled */ 660 { 661 pPio->PIO_OER = flag; 662 } 663 664 /**---------------------------------------------------------------------------- */ 665 /** \fn AT91F_PIO_OutputDisable */ 666 /** \brief Output Enable PIO */ 667 /**---------------------------------------------------------------------------- */ AT91F_PIO_OutputDisable(AT91PS_PIO pPio,unsigned int flag)668 __inline void AT91F_PIO_OutputDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 669 unsigned int flag ) /* \arg pio output to be disabled */ 670 { 671 pPio->PIO_ODR = flag; 672 } 673 674 /**---------------------------------------------------------------------------- */ 675 /** \fn AT91F_PIO_GetOutputStatus */ 676 /** \brief Return PIO Output Status */ 677 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetOutputStatus(AT91PS_PIO pPio)678 __inline unsigned int AT91F_PIO_GetOutputStatus( /* \return PIO Output Status */ 679 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 680 { 681 return pPio->PIO_OSR; 682 } 683 684 /**---------------------------------------------------------------------------- */ 685 /** \fn AT91F_PIO_IsOuputSet */ 686 /** \brief Test if PIO Output is Set */ 687 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsOutputSet(AT91PS_PIO pPio,unsigned int flag)688 __inline int AT91F_PIO_IsOutputSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 689 unsigned int flag ) /* \arg flag to be tested */ 690 { 691 return( AT91F_PIO_GetOutputStatus( pPio ) & flag ); 692 } 693 694 /**---------------------------------------------------------------------------- */ 695 /** \fn AT91F_PIO_InputFilterEnable */ 696 /** \brief Input Filter Enable PIO */ 697 /**---------------------------------------------------------------------------- */ AT91F_PIO_InputFilterEnable(AT91PS_PIO pPio,unsigned int flag)698 __inline void AT91F_PIO_InputFilterEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 699 unsigned int flag ) /* \arg pio input filter to be enabled */ 700 { 701 pPio->PIO_IFER = flag; 702 } 703 704 /**---------------------------------------------------------------------------- */ 705 /** \fn AT91F_PIO_InputFilterDisable */ 706 /** \brief Input Filter Disable PIO */ 707 /**---------------------------------------------------------------------------- */ AT91F_PIO_InputFilterDisable(AT91PS_PIO pPio,unsigned int flag)708 __inline void AT91F_PIO_InputFilterDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 709 unsigned int flag ) /* \arg pio input filter to be disabled */ 710 { 711 pPio->PIO_IFDR = flag; 712 } 713 714 /**---------------------------------------------------------------------------- */ 715 /** \fn AT91F_PIO_GetInputFilterStatus */ 716 /** \brief Return PIO Input Filter Status */ 717 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetInputFilterStatus(AT91PS_PIO pPio)718 __inline unsigned int AT91F_PIO_GetInputFilterStatus( /* \return PIO Input Filter Status */ 719 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 720 { 721 return pPio->PIO_IFSR; 722 } 723 724 /**---------------------------------------------------------------------------- */ 725 /** \fn AT91F_PIO_IsInputFilterSet */ 726 /** \brief Test if PIO Input filter is Set */ 727 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsInputFilterSet(AT91PS_PIO pPio,unsigned int flag)728 __inline int AT91F_PIO_IsInputFilterSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 729 unsigned int flag ) /* \arg flag to be tested */ 730 { 731 return( AT91F_PIO_GetInputFilterStatus( pPio ) & flag ); 732 } 733 734 /**---------------------------------------------------------------------------- */ 735 /** \fn AT91F_PIO_GetOutputDataStatus */ 736 /** \brief Return PIO Output Data Status */ 737 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetOutputDataStatus(AT91PS_PIO pPio)738 __inline unsigned int AT91F_PIO_GetOutputDataStatus( /* \return PIO Output Data Status */ 739 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 740 { 741 return pPio->PIO_ODSR; 742 } 743 744 /**---------------------------------------------------------------------------- */ 745 /** \fn AT91F_PIO_InterruptEnable */ 746 /** \brief Enable PIO Interrupt */ 747 /**---------------------------------------------------------------------------- */ AT91F_PIO_InterruptEnable(AT91PS_PIO pPio,unsigned int flag)748 __inline void AT91F_PIO_InterruptEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 749 unsigned int flag ) /* \arg pio interrupt to be enabled */ 750 { 751 pPio->PIO_IER = flag; 752 } 753 754 /**---------------------------------------------------------------------------- */ 755 /** \fn AT91F_PIO_InterruptDisable */ 756 /** \brief Disable PIO Interrupt */ 757 /**---------------------------------------------------------------------------- */ AT91F_PIO_InterruptDisable(AT91PS_PIO pPio,unsigned int flag)758 __inline void AT91F_PIO_InterruptDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 759 unsigned int flag ) /* \arg pio interrupt to be disabled */ 760 { 761 pPio->PIO_IDR = flag; 762 } 763 764 /**---------------------------------------------------------------------------- */ 765 /** \fn AT91F_PIO_GetInterruptMaskStatus */ 766 /** \brief Return PIO Interrupt Mask Status */ 767 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetInterruptMaskStatus(AT91PS_PIO pPio)768 __inline unsigned int AT91F_PIO_GetInterruptMaskStatus( /* \return PIO Interrupt Mask Status */ 769 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 770 { 771 return pPio->PIO_IMR; 772 } 773 774 /**---------------------------------------------------------------------------- */ 775 /** \fn AT91F_PIO_GetInterruptStatus */ 776 /** \brief Return PIO Interrupt Status */ 777 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetInterruptStatus(AT91PS_PIO pPio)778 __inline unsigned int AT91F_PIO_GetInterruptStatus( /* \return PIO Interrupt Status */ 779 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 780 { 781 return pPio->PIO_ISR; 782 } 783 784 /**---------------------------------------------------------------------------- */ 785 /** \fn AT91F_PIO_IsInterruptMasked */ 786 /** \brief Test if PIO Interrupt is Masked */ 787 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsInterruptMasked(AT91PS_PIO pPio,unsigned int flag)788 __inline int AT91F_PIO_IsInterruptMasked( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 789 unsigned int flag ) /* \arg flag to be tested */ 790 { 791 return( AT91F_PIO_GetInterruptMaskStatus( pPio ) & flag ); 792 } 793 794 /**---------------------------------------------------------------------------- */ 795 /** \fn AT91F_PIO_IsInterruptSet */ 796 /** \brief Test if PIO Interrupt is Set */ 797 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsInterruptSet(AT91PS_PIO pPio,unsigned int flag)798 __inline int AT91F_PIO_IsInterruptSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 799 unsigned int flag ) /* \arg flag to be tested */ 800 { 801 return( AT91F_PIO_GetInterruptStatus( pPio ) & flag ); 802 } 803 804 /**---------------------------------------------------------------------------- */ 805 /** \fn AT91F_PIO_MultiDriverEnable */ 806 /** \brief Multi Driver Enable PIO */ 807 /**---------------------------------------------------------------------------- */ AT91F_PIO_MultiDriverEnable(AT91PS_PIO pPio,unsigned int flag)808 __inline void AT91F_PIO_MultiDriverEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 809 unsigned int flag ) /* \arg pio to be enabled */ 810 { 811 pPio->PIO_MDER = flag; 812 } 813 814 /**---------------------------------------------------------------------------- */ 815 /** \fn AT91F_PIO_MultiDriverDisable */ 816 /** \brief Multi Driver Disable PIO */ 817 /**---------------------------------------------------------------------------- */ AT91F_PIO_MultiDriverDisable(AT91PS_PIO pPio,unsigned int flag)818 __inline void AT91F_PIO_MultiDriverDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 819 unsigned int flag ) /* \arg pio to be disabled */ 820 { 821 pPio->PIO_MDDR = flag; 822 } 823 824 /**---------------------------------------------------------------------------- */ 825 /** \fn AT91F_PIO_GetMultiDriverStatus */ 826 /** \brief Return PIO Multi Driver Status */ 827 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetMultiDriverStatus(AT91PS_PIO pPio)828 __inline unsigned int AT91F_PIO_GetMultiDriverStatus( /* \return PIO Multi Driver Status */ 829 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 830 { 831 return pPio->PIO_MDSR; 832 } 833 834 /**---------------------------------------------------------------------------- */ 835 /** \fn AT91F_PIO_IsMultiDriverSet */ 836 /** \brief Test if PIO MultiDriver is Set */ 837 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsMultiDriverSet(AT91PS_PIO pPio,unsigned int flag)838 __inline int AT91F_PIO_IsMultiDriverSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 839 unsigned int flag ) /* \arg flag to be tested */ 840 { 841 return( AT91F_PIO_GetMultiDriverStatus( pPio ) & flag ); 842 } 843 844 /**---------------------------------------------------------------------------- */ 845 /** \fn AT91F_PIO_A_RegisterSelection */ 846 /** \brief PIO A Register Selection */ 847 /**---------------------------------------------------------------------------- */ AT91F_PIO_A_RegisterSelection(AT91PS_PIO pPio,unsigned int flag)848 __inline void AT91F_PIO_A_RegisterSelection( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 849 unsigned int flag ) /* \arg pio A register selection */ 850 { 851 pPio->PIO_ASR = flag; 852 } 853 854 /**---------------------------------------------------------------------------- */ 855 /** \fn AT91F_PIO_B_RegisterSelection */ 856 /** \brief PIO B Register Selection */ 857 /**---------------------------------------------------------------------------- */ AT91F_PIO_B_RegisterSelection(AT91PS_PIO pPio,unsigned int flag)858 __inline void AT91F_PIO_B_RegisterSelection( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 859 unsigned int flag ) /* \arg pio B register selection */ 860 { 861 pPio->PIO_BSR = flag; 862 } 863 864 /**---------------------------------------------------------------------------- */ 865 /** \fn AT91F_PIO_Get_AB_RegisterStatus */ 866 /** \brief Return PIO Interrupt Status */ 867 /**---------------------------------------------------------------------------- */ AT91F_PIO_Get_AB_RegisterStatus(AT91PS_PIO pPio)868 __inline unsigned int AT91F_PIO_Get_AB_RegisterStatus( /* \return PIO AB Register Status */ 869 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 870 { 871 return pPio->PIO_ABSR; 872 } 873 874 /**---------------------------------------------------------------------------- */ 875 /** \fn AT91F_PIO_IsAB_RegisterSet */ 876 /** \brief Test if PIO AB Register is Set */ 877 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsAB_RegisterSet(AT91PS_PIO pPio,unsigned int flag)878 __inline int AT91F_PIO_IsAB_RegisterSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 879 unsigned int flag ) /* \arg flag to be tested */ 880 { 881 return( AT91F_PIO_Get_AB_RegisterStatus( pPio ) & flag ); 882 } 883 884 /**---------------------------------------------------------------------------- */ 885 /** \fn AT91F_PIO_OutputWriteEnable */ 886 /** \brief Output Write Enable PIO */ 887 /**---------------------------------------------------------------------------- */ AT91F_PIO_OutputWriteEnable(AT91PS_PIO pPio,unsigned int flag)888 __inline void AT91F_PIO_OutputWriteEnable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 889 unsigned int flag ) /* \arg pio output write to be enabled */ 890 { 891 pPio->PIO_OWER = flag; 892 } 893 894 /**---------------------------------------------------------------------------- */ 895 /** \fn AT91F_PIO_OutputWriteDisable */ 896 /** \brief Output Write Disable PIO */ 897 /**---------------------------------------------------------------------------- */ AT91F_PIO_OutputWriteDisable(AT91PS_PIO pPio,unsigned int flag)898 __inline void AT91F_PIO_OutputWriteDisable( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 899 unsigned int flag ) /* \arg pio output write to be disabled */ 900 { 901 pPio->PIO_OWDR = flag; 902 } 903 904 /**---------------------------------------------------------------------------- */ 905 /** \fn AT91F_PIO_GetOutputWriteStatus */ 906 /** \brief Return PIO Output Write Status */ 907 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetOutputWriteStatus(AT91PS_PIO pPio)908 __inline unsigned int AT91F_PIO_GetOutputWriteStatus( /* \return PIO Output Write Status */ 909 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 910 { 911 return pPio->PIO_OWSR; 912 } 913 914 /**---------------------------------------------------------------------------- */ 915 /** \fn AT91F_PIO_IsOutputWriteSet */ 916 /** \brief Test if PIO OutputWrite is Set */ 917 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsOutputWriteSet(AT91PS_PIO pPio,unsigned int flag)918 __inline int AT91F_PIO_IsOutputWriteSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 919 unsigned int flag ) /* \arg flag to be tested */ 920 { 921 return( AT91F_PIO_GetOutputWriteStatus( pPio ) & flag ); 922 } 923 924 /**---------------------------------------------------------------------------- */ 925 /** \fn AT91F_PIO_GetCfgPullup */ 926 /** \brief Return PIO Configuration Pullup */ 927 /**---------------------------------------------------------------------------- */ AT91F_PIO_GetCfgPullup(AT91PS_PIO pPio)928 __inline unsigned int AT91F_PIO_GetCfgPullup( /* \return PIO Configuration Pullup */ 929 AT91PS_PIO pPio ) /* \arg pointer to a PIO controller */ 930 { 931 return pPio->PIO_PPUSR; 932 } 933 934 /**---------------------------------------------------------------------------- */ 935 /** \fn AT91F_PIO_IsOutputDataStatusSet */ 936 /** \brief Test if PIO Output Data Status is Set */ 937 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsOutputDataStatusSet(AT91PS_PIO pPio,unsigned int flag)938 __inline int AT91F_PIO_IsOutputDataStatusSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 939 unsigned int flag ) /* \arg flag to be tested */ 940 { 941 return( AT91F_PIO_GetOutputDataStatus( pPio ) & flag ); 942 } 943 944 /**---------------------------------------------------------------------------- */ 945 /** \fn AT91F_PIO_IsCfgPullupStatusSet */ 946 /** \brief Test if PIO Configuration Pullup Status is Set */ 947 /**---------------------------------------------------------------------------- */ AT91F_PIO_IsCfgPullupStatusSet(AT91PS_PIO pPio,unsigned int flag)948 __inline int AT91F_PIO_IsCfgPullupStatusSet( AT91PS_PIO pPio, /* \arg pointer to a PIO controller */ 949 unsigned int flag ) /* \arg flag to be tested */ 950 { 951 return( ~AT91F_PIO_GetCfgPullup( pPio ) & flag ); 952 } 953 954 /* ***************************************************************************** 955 * SOFTWARE API FOR PMC 956 ***************************************************************************** */ 957 /**---------------------------------------------------------------------------- */ 958 /** \fn AT91F_PMC_CfgSysClkEnableReg */ 959 /** \brief Configure the System Clock Enable Register of the PMC controller */ 960 /**---------------------------------------------------------------------------- */ AT91F_PMC_CfgSysClkEnableReg(AT91PS_PMC pPMC,unsigned int mode)961 __inline void AT91F_PMC_CfgSysClkEnableReg( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */ 962 unsigned int mode ) 963 { 964 /** Write to the SCER register */ 965 pPMC->PMC_SCER = mode; 966 } 967 968 /**---------------------------------------------------------------------------- */ 969 /** \fn AT91F_PMC_CfgSysClkDisableReg */ 970 /** \brief Configure the System Clock Disable Register of the PMC controller */ 971 /**---------------------------------------------------------------------------- */ AT91F_PMC_CfgSysClkDisableReg(AT91PS_PMC pPMC,unsigned int mode)972 __inline void AT91F_PMC_CfgSysClkDisableReg( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */ 973 unsigned int mode ) 974 { 975 /** Write to the SCDR register */ 976 pPMC->PMC_SCDR = mode; 977 } 978 979 /**---------------------------------------------------------------------------- */ 980 /** \fn AT91F_PMC_GetSysClkStatusReg */ 981 /** \brief Return the System Clock Status Register of the PMC controller */ 982 /**---------------------------------------------------------------------------- */ AT91F_PMC_GetSysClkStatusReg(AT91PS_PMC pPMC)983 __inline unsigned int AT91F_PMC_GetSysClkStatusReg( AT91PS_PMC pPMC /* pointer to a CAN controller */ 984 ) 985 { 986 return pPMC->PMC_SCSR; 987 } 988 989 /**---------------------------------------------------------------------------- */ 990 /** \fn AT91F_PMC_EnablePeriphClock */ 991 /** \brief Enable peripheral clock */ 992 /**---------------------------------------------------------------------------- */ AT91F_PMC_EnablePeriphClock(AT91PS_PMC pPMC,unsigned int periphIds)993 __inline void AT91F_PMC_EnablePeriphClock( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */ 994 unsigned int periphIds ) /* \arg IDs of peripherals to enable */ 995 { 996 pPMC->PMC_PCER = periphIds; 997 } 998 999 /**---------------------------------------------------------------------------- */ 1000 /** \fn AT91F_PMC_DisablePeriphClock */ 1001 /** \brief Disable peripheral clock */ 1002 /**---------------------------------------------------------------------------- */ AT91F_PMC_DisablePeriphClock(AT91PS_PMC pPMC,unsigned int periphIds)1003 __inline void AT91F_PMC_DisablePeriphClock( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */ 1004 unsigned int periphIds ) /* \arg IDs of peripherals to enable */ 1005 { 1006 pPMC->PMC_PCDR = periphIds; 1007 } 1008 1009 /**---------------------------------------------------------------------------- */ 1010 /** \fn AT91F_PMC_GetPeriphClock */ 1011 /** \brief Get peripheral clock status */ 1012 /**---------------------------------------------------------------------------- */ AT91F_PMC_GetPeriphClock(AT91PS_PMC pPMC)1013 __inline unsigned int AT91F_PMC_GetPeriphClock( AT91PS_PMC pPMC ) /* \arg pointer to PMC controller */ 1014 { 1015 return pPMC->PMC_PCSR; 1016 } 1017 1018 /**---------------------------------------------------------------------------- */ 1019 /** \fn AT91F_CKGR_CfgMainOscillatorReg */ 1020 /** \brief Cfg the main oscillator */ 1021 /**---------------------------------------------------------------------------- */ AT91F_CKGR_CfgMainOscillatorReg(AT91PS_CKGR pCKGR,unsigned int mode)1022 __inline void AT91F_CKGR_CfgMainOscillatorReg( AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller */ 1023 unsigned int mode ) 1024 { 1025 pCKGR->CKGR_MOR = mode; 1026 } 1027 1028 /**---------------------------------------------------------------------------- */ 1029 /** \fn AT91F_CKGR_GetMainOscillatorReg */ 1030 /** \brief Cfg the main oscillator */ 1031 /**---------------------------------------------------------------------------- */ AT91F_CKGR_GetMainOscillatorReg(AT91PS_CKGR pCKGR)1032 __inline unsigned int AT91F_CKGR_GetMainOscillatorReg( AT91PS_CKGR pCKGR ) /* \arg pointer to CKGR controller */ 1033 { 1034 return pCKGR->CKGR_MOR; 1035 } 1036 1037 /**---------------------------------------------------------------------------- */ 1038 /** \fn AT91F_CKGR_EnableMainOscillator */ 1039 /** \brief Enable the main oscillator */ 1040 /**---------------------------------------------------------------------------- */ AT91F_CKGR_EnableMainOscillator(AT91PS_CKGR pCKGR)1041 __inline void AT91F_CKGR_EnableMainOscillator( AT91PS_CKGR pCKGR ) /* \arg pointer to CKGR controller */ 1042 { 1043 pCKGR->CKGR_MOR |= AT91C_CKGR_MOSCEN; 1044 } 1045 1046 /**---------------------------------------------------------------------------- */ 1047 /** \fn AT91F_CKGR_DisableMainOscillator */ 1048 /** \brief Disable the main oscillator */ 1049 /**---------------------------------------------------------------------------- */ AT91F_CKGR_DisableMainOscillator(AT91PS_CKGR pCKGR)1050 __inline void AT91F_CKGR_DisableMainOscillator( AT91PS_CKGR pCKGR ) /* \arg pointer to CKGR controller */ 1051 { 1052 pCKGR->CKGR_MOR &= ~AT91C_CKGR_MOSCEN; 1053 } 1054 1055 /**---------------------------------------------------------------------------- */ 1056 /** \fn AT91F_CKGR_CfgMainOscStartUpTime */ 1057 /** \brief Cfg MOR Register according to the main osc startup time */ 1058 /**---------------------------------------------------------------------------- */ AT91F_CKGR_CfgMainOscStartUpTime(AT91PS_CKGR pCKGR,unsigned int startup_time,unsigned int slowClock)1059 __inline void AT91F_CKGR_CfgMainOscStartUpTime( AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller */ 1060 unsigned int startup_time, /* \arg main osc startup time in microsecond (us) */ 1061 unsigned int slowClock ) /* \arg slowClock in Hz */ 1062 { 1063 pCKGR->CKGR_MOR &= ~AT91C_CKGR_OSCOUNT; 1064 pCKGR->CKGR_MOR |= ( ( slowClock * startup_time ) / ( 8 * 1000000 ) ) << 8; 1065 } 1066 1067 /**---------------------------------------------------------------------------- */ 1068 /** \fn AT91F_CKGR_GetMainClockFreqReg */ 1069 /** \brief Cfg the main oscillator */ 1070 /**---------------------------------------------------------------------------- */ AT91F_CKGR_GetMainClockFreqReg(AT91PS_CKGR pCKGR)1071 __inline unsigned int AT91F_CKGR_GetMainClockFreqReg( AT91PS_CKGR pCKGR ) /* \arg pointer to CKGR controller */ 1072 { 1073 return pCKGR->CKGR_MCFR; 1074 } 1075 1076 /**---------------------------------------------------------------------------- */ 1077 /** \fn AT91F_CKGR_GetMainClock */ 1078 /** \brief Return Main clock in Hz */ 1079 /**---------------------------------------------------------------------------- */ AT91F_CKGR_GetMainClock(AT91PS_CKGR pCKGR,unsigned int slowClock)1080 __inline unsigned int AT91F_CKGR_GetMainClock( AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller */ 1081 unsigned int slowClock ) /* \arg slowClock in Hz */ 1082 { 1083 return ( ( pCKGR->CKGR_MCFR & AT91C_CKGR_MAINF ) * slowClock ) >> 4; 1084 } 1085 1086 /**---------------------------------------------------------------------------- */ 1087 /** \fn AT91F_PMC_CfgMCKReg */ 1088 /** \brief Cfg Master Clock Register */ 1089 /**---------------------------------------------------------------------------- */ AT91F_PMC_CfgMCKReg(AT91PS_PMC pPMC,unsigned int mode)1090 __inline void AT91F_PMC_CfgMCKReg( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */ 1091 unsigned int mode ) 1092 { 1093 pPMC->PMC_MCKR = mode; 1094 } 1095 1096 /**---------------------------------------------------------------------------- */ 1097 /** \fn AT91F_PMC_GetMCKReg */ 1098 /** \brief Return Master Clock Register */ 1099 /**---------------------------------------------------------------------------- */ AT91F_PMC_GetMCKReg(AT91PS_PMC pPMC)1100 __inline unsigned int AT91F_PMC_GetMCKReg( AT91PS_PMC pPMC ) /* \arg pointer to PMC controller */ 1101 { 1102 return pPMC->PMC_MCKR; 1103 } 1104 1105 /**------------------------------------------------------------------------------ */ 1106 /** \fn AT91F_PMC_GetMasterClock */ 1107 /** \brief Return master clock in Hz which corresponds to processor clock for ARM7 */ 1108 /**------------------------------------------------------------------------------ */ AT91F_PMC_GetMasterClock(AT91PS_PMC pPMC,AT91PS_CKGR pCKGR,unsigned int slowClock)1109 __inline unsigned int AT91F_PMC_GetMasterClock( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */ 1110 AT91PS_CKGR pCKGR, /* \arg pointer to CKGR controller */ 1111 unsigned int slowClock ) /* \arg slowClock in Hz */ 1112 { 1113 unsigned int reg = pPMC->PMC_MCKR; 1114 unsigned int prescaler = ( 1 << ( ( reg & AT91C_PMC_PRES ) >> 2 ) ); 1115 unsigned int pllDivider, pllMultiplier; 1116 1117 switch( reg & AT91C_PMC_CSS ) 1118 { 1119 case AT91C_PMC_CSS_SLOW_CLK: /* Slow clock selected */ 1120 return slowClock / prescaler; 1121 1122 case AT91C_PMC_CSS_MAIN_CLK: /* Main clock is selected */ 1123 return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / prescaler; 1124 1125 case AT91C_PMC_CSS_PLL_CLK: /* PLLB clock is selected */ 1126 reg = pCKGR->CKGR_PLLR; 1127 pllDivider = ( reg & AT91C_CKGR_DIV ); 1128 pllMultiplier = ( ( reg & AT91C_CKGR_MUL ) >> 16 ) + 1; 1129 return AT91F_CKGR_GetMainClock( pCKGR, slowClock ) / pllDivider * pllMultiplier / prescaler; 1130 } 1131 1132 return 0; 1133 } 1134 1135 /**---------------------------------------------------------------------------- */ 1136 /** \fn AT91F_PMC_EnablePCK */ 1137 /** \brief Enable peripheral clock */ 1138 /**---------------------------------------------------------------------------- */ AT91F_PMC_EnablePCK(AT91PS_PMC pPMC,unsigned int pck,unsigned int mode)1139 __inline void AT91F_PMC_EnablePCK( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */ 1140 unsigned int pck, /* \arg Peripheral clock identifier 0 .. 7 */ 1141 unsigned int mode ) 1142 { 1143 pPMC->PMC_PCKR[ pck ] = mode; 1144 pPMC->PMC_SCER = ( 1 << pck ) << 8; 1145 } 1146 1147 /**---------------------------------------------------------------------------- */ 1148 /** \fn AT91F_PMC_DisablePCK */ 1149 /** \brief Enable peripheral clock */ 1150 /**---------------------------------------------------------------------------- */ AT91F_PMC_DisablePCK(AT91PS_PMC pPMC,unsigned int pck)1151 __inline void AT91F_PMC_DisablePCK( AT91PS_PMC pPMC, /* \arg pointer to PMC controller */ 1152 unsigned int pck ) /* \arg Peripheral clock identifier 0 .. 7 */ 1153 { 1154 pPMC->PMC_SCDR = ( 1 << pck ) << 8; 1155 } 1156 1157 /**---------------------------------------------------------------------------- */ 1158 /** \fn AT91F_PMC_EnableIt */ 1159 /** \brief Enable PMC interrupt */ 1160 /**---------------------------------------------------------------------------- */ AT91F_PMC_EnableIt(AT91PS_PMC pPMC,unsigned int flag)1161 __inline void AT91F_PMC_EnableIt( AT91PS_PMC pPMC, /* pointer to a PMC controller */ 1162 unsigned int flag ) /* IT to be enabled */ 1163 { 1164 /** Write to the IER register */ 1165 pPMC->PMC_IER = flag; 1166 } 1167 1168 /**---------------------------------------------------------------------------- */ 1169 /** \fn AT91F_PMC_DisableIt */ 1170 /** \brief Disable PMC interrupt */ 1171 /**---------------------------------------------------------------------------- */ AT91F_PMC_DisableIt(AT91PS_PMC pPMC,unsigned int flag)1172 __inline void AT91F_PMC_DisableIt( AT91PS_PMC pPMC, /* pointer to a PMC controller */ 1173 unsigned int flag ) /* IT to be disabled */ 1174 { 1175 /** Write to the IDR register */ 1176 pPMC->PMC_IDR = flag; 1177 } 1178 1179 /**---------------------------------------------------------------------------- */ 1180 /** \fn AT91F_PMC_GetStatus */ 1181 /** \brief Return PMC Interrupt Status */ 1182 /**---------------------------------------------------------------------------- */ AT91F_PMC_GetStatus(AT91PS_PMC pPMC)1183 __inline unsigned int AT91F_PMC_GetStatus( /* \return PMC Interrupt Status */ 1184 AT91PS_PMC pPMC ) /* pointer to a PMC controller */ 1185 { 1186 return pPMC->PMC_SR; 1187 } 1188 1189 /**---------------------------------------------------------------------------- */ 1190 /** \fn AT91F_PMC_GetInterruptMaskStatus */ 1191 /** \brief Return PMC Interrupt Mask Status */ 1192 /**---------------------------------------------------------------------------- */ AT91F_PMC_GetInterruptMaskStatus(AT91PS_PMC pPMC)1193 __inline unsigned int AT91F_PMC_GetInterruptMaskStatus( /* \return PMC Interrupt Mask Status */ 1194 AT91PS_PMC pPMC ) /* pointer to a PMC controller */ 1195 { 1196 return pPMC->PMC_IMR; 1197 } 1198 1199 /**---------------------------------------------------------------------------- */ 1200 /** \fn AT91F_PMC_IsInterruptMasked */ 1201 /** \brief Test if PMC Interrupt is Masked */ 1202 /**---------------------------------------------------------------------------- */ AT91F_PMC_IsInterruptMasked(AT91PS_PMC pPMC,unsigned int flag)1203 __inline unsigned int AT91F_PMC_IsInterruptMasked( AT91PS_PMC pPMC, /* \arg pointer to a PMC controller */ 1204 unsigned int flag ) /* \arg flag to be tested */ 1205 { 1206 return( AT91F_PMC_GetInterruptMaskStatus( pPMC ) & flag ); 1207 } 1208 1209 /**---------------------------------------------------------------------------- */ 1210 /** \fn AT91F_PMC_IsStatusSet */ 1211 /** \brief Test if PMC Status is Set */ 1212 /**---------------------------------------------------------------------------- */ AT91F_PMC_IsStatusSet(AT91PS_PMC pPMC,unsigned int flag)1213 __inline unsigned int AT91F_PMC_IsStatusSet( AT91PS_PMC pPMC, /* \arg pointer to a PMC controller */ 1214 unsigned int flag ) /* \arg flag to be tested */ 1215 { 1216 return( AT91F_PMC_GetStatus( pPMC ) & flag ); 1217 } /* ***************************************************************************** 1218 * SOFTWARE API FOR RSTC 1219 ***************************************************************************** */ 1220 /**---------------------------------------------------------------------------- */ 1221 /** \fn AT91F_RSTSoftReset */ 1222 /** \brief Start Software Reset */ 1223 /**---------------------------------------------------------------------------- */ AT91F_RSTSoftReset(AT91PS_RSTC pRSTC,unsigned int reset)1224 __inline void AT91F_RSTSoftReset( AT91PS_RSTC pRSTC, 1225 unsigned int reset ) 1226 { 1227 pRSTC->RSTC_RCR = ( 0xA5000000 | reset ); 1228 } 1229 1230 /**---------------------------------------------------------------------------- */ 1231 /** \fn AT91F_RSTSetMode */ 1232 /** \brief Set Reset Mode */ 1233 /**---------------------------------------------------------------------------- */ AT91F_RSTSetMode(AT91PS_RSTC pRSTC,unsigned int mode)1234 __inline void AT91F_RSTSetMode( AT91PS_RSTC pRSTC, 1235 unsigned int mode ) 1236 { 1237 pRSTC->RSTC_RMR = ( 0xA5000000 | mode ); 1238 } 1239 1240 /**---------------------------------------------------------------------------- */ 1241 /** \fn AT91F_RSTGetMode */ 1242 /** \brief Get Reset Mode */ 1243 /**---------------------------------------------------------------------------- */ AT91F_RSTGetMode(AT91PS_RSTC pRSTC)1244 __inline unsigned int AT91F_RSTGetMode( AT91PS_RSTC pRSTC ) 1245 { 1246 return( pRSTC->RSTC_RMR ); 1247 } 1248 1249 /**---------------------------------------------------------------------------- */ 1250 /** \fn AT91F_RSTGetStatus */ 1251 /** \brief Get Reset Status */ 1252 /**---------------------------------------------------------------------------- */ AT91F_RSTGetStatus(AT91PS_RSTC pRSTC)1253 __inline unsigned int AT91F_RSTGetStatus( AT91PS_RSTC pRSTC ) 1254 { 1255 return( pRSTC->RSTC_RSR ); 1256 } 1257 1258 /**---------------------------------------------------------------------------- */ 1259 /** \fn AT91F_RSTIsSoftRstActive */ 1260 /** \brief Return !=0 if software reset is still not completed */ 1261 /**---------------------------------------------------------------------------- */ AT91F_RSTIsSoftRstActive(AT91PS_RSTC pRSTC)1262 __inline unsigned int AT91F_RSTIsSoftRstActive( AT91PS_RSTC pRSTC ) 1263 { 1264 return( ( pRSTC->RSTC_RSR ) & AT91C_RSTC_SRCMP ); 1265 } 1266 1267 /* ***************************************************************************** 1268 * SOFTWARE API FOR RTTC 1269 ***************************************************************************** */ 1270 /**-------------------------------------------------------------------------------------- */ 1271 /** \fn AT91F_SetRTT_TimeBase() */ 1272 /** \brief Set the RTT prescaler according to the TimeBase in ms */ 1273 /**-------------------------------------------------------------------------------------- */ AT91F_RTTSetTimeBase(AT91PS_RTTC pRTTC,unsigned int ms)1274 __inline unsigned int AT91F_RTTSetTimeBase( AT91PS_RTTC pRTTC, 1275 unsigned int ms ) 1276 { 1277 if( ms > 2000 ) 1278 { 1279 return 1; /* AT91C_TIME_OUT_OF_RANGE */ 1280 } 1281 1282 pRTTC->RTTC_RTMR &= ~0xFFFF; 1283 pRTTC->RTTC_RTMR |= ( ( ( ms << 15 ) / 1000 ) & 0xFFFF ); 1284 return 0; 1285 } 1286 1287 /**-------------------------------------------------------------------------------------- */ 1288 /** \fn AT91F_RTTSetPrescaler() */ 1289 /** \brief Set the new prescaler value */ 1290 /**-------------------------------------------------------------------------------------- */ AT91F_RTTSetPrescaler(AT91PS_RTTC pRTTC,unsigned int rtpres)1291 __inline unsigned int AT91F_RTTSetPrescaler( AT91PS_RTTC pRTTC, 1292 unsigned int rtpres ) 1293 { 1294 pRTTC->RTTC_RTMR &= ~0xFFFF; 1295 pRTTC->RTTC_RTMR |= ( rtpres & 0xFFFF ); 1296 return( pRTTC->RTTC_RTMR ); 1297 } 1298 1299 /**-------------------------------------------------------------------------------------- */ 1300 /** \fn AT91F_RTTRestart() */ 1301 /** \brief Restart the RTT prescaler */ 1302 /**-------------------------------------------------------------------------------------- */ AT91F_RTTRestart(AT91PS_RTTC pRTTC)1303 __inline void AT91F_RTTRestart( AT91PS_RTTC pRTTC ) 1304 { 1305 pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTRST; 1306 } 1307 1308 1309 /**-------------------------------------------------------------------------------------- */ 1310 /** \fn AT91F_RTT_SetAlarmINT() */ 1311 /** \brief Enable RTT Alarm Interrupt */ 1312 /**-------------------------------------------------------------------------------------- */ AT91F_RTTSetAlarmINT(AT91PS_RTTC pRTTC)1313 __inline void AT91F_RTTSetAlarmINT( AT91PS_RTTC pRTTC ) 1314 { 1315 pRTTC->RTTC_RTMR |= AT91C_RTTC_ALMIEN; 1316 } 1317 1318 /**-------------------------------------------------------------------------------------- */ 1319 /** \fn AT91F_RTT_ClearAlarmINT() */ 1320 /** \brief Disable RTT Alarm Interrupt */ 1321 /**-------------------------------------------------------------------------------------- */ AT91F_RTTClearAlarmINT(AT91PS_RTTC pRTTC)1322 __inline void AT91F_RTTClearAlarmINT( AT91PS_RTTC pRTTC ) 1323 { 1324 pRTTC->RTTC_RTMR &= ~AT91C_RTTC_ALMIEN; 1325 } 1326 1327 /**-------------------------------------------------------------------------------------- */ 1328 /** \fn AT91F_RTT_SetRttIncINT() */ 1329 /** \brief Enable RTT INC Interrupt */ 1330 /**-------------------------------------------------------------------------------------- */ AT91F_RTTSetRttIncINT(AT91PS_RTTC pRTTC)1331 __inline void AT91F_RTTSetRttIncINT( AT91PS_RTTC pRTTC ) 1332 { 1333 pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTINCIEN; 1334 } 1335 1336 /**-------------------------------------------------------------------------------------- */ 1337 /** \fn AT91F_RTT_ClearRttIncINT() */ 1338 /** \brief Disable RTT INC Interrupt */ 1339 /**-------------------------------------------------------------------------------------- */ AT91F_RTTClearRttIncINT(AT91PS_RTTC pRTTC)1340 __inline void AT91F_RTTClearRttIncINT( AT91PS_RTTC pRTTC ) 1341 { 1342 pRTTC->RTTC_RTMR &= ~AT91C_RTTC_RTTINCIEN; 1343 } 1344 1345 /**-------------------------------------------------------------------------------------- */ 1346 /** \fn AT91F_RTT_SetAlarmValue() */ 1347 /** \brief Set RTT Alarm Value */ 1348 /**-------------------------------------------------------------------------------------- */ AT91F_RTTSetAlarmValue(AT91PS_RTTC pRTTC,unsigned int alarm)1349 __inline void AT91F_RTTSetAlarmValue( AT91PS_RTTC pRTTC, 1350 unsigned int alarm ) 1351 { 1352 pRTTC->RTTC_RTAR = alarm; 1353 } 1354 1355 /**-------------------------------------------------------------------------------------- */ 1356 /** \fn AT91F_RTT_GetAlarmValue() */ 1357 /** \brief Get RTT Alarm Value */ 1358 /**-------------------------------------------------------------------------------------- */ AT91F_RTTGetAlarmValue(AT91PS_RTTC pRTTC)1359 __inline unsigned int AT91F_RTTGetAlarmValue( AT91PS_RTTC pRTTC ) 1360 { 1361 return( pRTTC->RTTC_RTAR ); 1362 } 1363 1364 /**-------------------------------------------------------------------------------------- */ 1365 /** \fn AT91F_RTTGetStatus() */ 1366 /** \brief Read the RTT status */ 1367 /**-------------------------------------------------------------------------------------- */ AT91F_RTTGetStatus(AT91PS_RTTC pRTTC)1368 __inline unsigned int AT91F_RTTGetStatus( AT91PS_RTTC pRTTC ) 1369 { 1370 return( pRTTC->RTTC_RTSR ); 1371 } 1372 1373 /**-------------------------------------------------------------------------------------- */ 1374 /** \fn AT91F_RTT_ReadValue() */ 1375 /** \brief Read the RTT value */ 1376 /**-------------------------------------------------------------------------------------- */ AT91F_RTTReadValue(AT91PS_RTTC pRTTC)1377 __inline unsigned int AT91F_RTTReadValue( AT91PS_RTTC pRTTC ) 1378 { 1379 register volatile unsigned int val1, val2; 1380 1381 do 1382 { 1383 val1 = pRTTC->RTTC_RTVR; 1384 val2 = pRTTC->RTTC_RTVR; 1385 } 1386 while( val1 != val2 ); 1387 1388 return( val1 ); 1389 } 1390 1391 /* ***************************************************************************** 1392 * SOFTWARE API FOR PITC 1393 ***************************************************************************** */ 1394 /**---------------------------------------------------------------------------- */ 1395 /** \fn AT91F_PITInit */ 1396 /** \brief System timer init : period in */ 1397
