1/* 2 * FreeRTOS Kernel V11.1.0 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 SECTION .text:CODE:NOROOT(2) 30 THUMB 31 32/* Including FreeRTOSConfig.h here will cause build errors if the header file 33contains code not understood by the assembler - for example the 'extern' keyword. 34To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so 35the code is included in C files but excluded by the preprocessor in assembly 36files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */ 37#include "FreeRTOSConfig.h" 38 39 PUBLIC SecureContext_LoadContextAsm 40 PUBLIC SecureContext_SaveContextAsm 41 42#if ( configENABLE_FPU == 1 ) 43 #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. 44#endif 45/*-----------------------------------------------------------*/ 46 47SecureContext_LoadContextAsm: 48 /* pxSecureContext value is in r0. */ 49 mrs r1, ipsr /* r1 = IPSR. */ 50 cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ 51 ldmia r0!, {r1, r2} /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */ 52 53#if ( configENABLE_MPU == 1 ) 54 ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */ 55 msr control, r3 /* CONTROL = r3. */ 56#endif /* configENABLE_MPU */ 57 58 msr psplim, r2 /* PSPLIM = r2. */ 59 msr psp, r1 /* PSP = r1. */ 60 61 load_ctx_therad_mode: 62 bx lr 63/*-----------------------------------------------------------*/ 64 65SecureContext_SaveContextAsm: 66 /* pxSecureContext value is in r0. */ 67 mrs r1, ipsr /* r1 = IPSR. */ 68 cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */ 69 mrs r1, psp /* r1 = PSP. */ 70 71#if ( configENABLE_MPU == 1 ) 72 mrs r2, control /* r2 = CONTROL. */ 73 subs r1, r1, #4 /* Make space for the CONTROL value on the stack. */ 74 str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ 75 stmia r1!, {r2} /* Store CONTROL value on the stack. */ 76#else /* configENABLE_MPU */ 77 str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */ 78#endif /* configENABLE_MPU */ 79 80 movs r1, #0 /* r1 = securecontextNO_STACK. */ 81 msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */ 82 msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ 83 84 save_ctx_therad_mode: 85 bx lr 86/*-----------------------------------------------------------*/ 87 88 END 89