1 /* 2 * FreeRTOS Kernel V11.1.0 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 #ifndef PORTMACRO_H 30 #define PORTMACRO_H 31 32 /* *INDENT-OFF* */ 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 /* *INDENT-ON* */ 37 38 /* IAR includes. */ 39 #ifdef __ICCARM__ 40 41 #include <intrinsics.h> 42 43 /*----------------------------------------------------------- 44 * Port specific definitions. 45 * 46 * The settings in this file configure FreeRTOS correctly for the given hardware 47 * and compiler. 48 * 49 * These settings should not be altered. 50 *----------------------------------------------------------- 51 */ 52 53 /* Type definitions. */ 54 #define portCHAR char 55 #define portFLOAT float 56 #define portDOUBLE double 57 #define portLONG long 58 #define portSHORT short 59 #define portSTACK_TYPE uint32_t 60 #define portBASE_TYPE long 61 62 typedef portSTACK_TYPE StackType_t; 63 typedef long BaseType_t; 64 typedef unsigned long UBaseType_t; 65 66 typedef uint32_t TickType_t; 67 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 68 69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do 70 * not need to be guarded with a critical section. */ 71 #define portTICK_TYPE_IS_ATOMIC 1 72 73 /*-----------------------------------------------------------*/ 74 75 /* Hardware specifics. */ 76 #define portSTACK_GROWTH ( -1 ) 77 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 78 #define portBYTE_ALIGNMENT 8 79 80 /*-----------------------------------------------------------*/ 81 82 /* Task utilities. */ 83 84 /* Called at the end of an ISR that can cause a context switch. */ 85 #define portEND_SWITCHING_ISR( xSwitchRequired ) \ 86 { \ 87 extern uint32_t ulPortYieldRequired; \ 88 \ 89 if( xSwitchRequired != pdFALSE ) \ 90 { \ 91 ulPortYieldRequired = pdTRUE; \ 92 } \ 93 } 94 95 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 96 #define portYIELD() __asm( "SWI 0" ); 97 98 99 /*----------------------------------------------------------- 100 * Critical section control 101 *----------------------------------------------------------*/ 102 103 extern void vPortEnterCritical( void ); 104 extern void vPortExitCritical( void ); 105 extern uint32_t ulPortSetInterruptMask( void ); 106 extern void vPortClearInterruptMask( uint32_t ulNewMaskValue ); 107 108 /* These macros do not globally disable/enable interrupts. They do mask off 109 * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */ 110 #define portENTER_CRITICAL() vPortEnterCritical(); 111 #define portEXIT_CRITICAL() vPortExitCritical(); 112 #define portDISABLE_INTERRUPTS() ulPortSetInterruptMask() 113 #define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 ) 114 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask() 115 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x ) 116 117 /*-----------------------------------------------------------*/ 118 119 /* Task function macros as described on the FreeRTOS.org WEB site. These are 120 * not required for this port but included in case common demo code that uses these 121 * macros is used. */ 122 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) 123 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) 124 125 /* Prototype of the FreeRTOS tick handler. This must be installed as the 126 * handler for whichever peripheral is used to generate the RTOS tick. */ 127 void FreeRTOS_Tick_Handler( void ); 128 129 /* Any task that uses the floating point unit MUST call vPortTaskUsesFPU() 130 * before any floating point instructions are executed. */ 131 void vPortTaskUsesFPU( void ); 132 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU() 133 134 #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL ) 135 #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL ) 136 137 /* Architecture specific optimisations. */ 138 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION 139 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 140 #endif 141 142 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 143 144 /* Store/clear the ready priorities in a bit map. */ 145 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) 146 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) 147 148 /*-----------------------------------------------------------*/ 149 150 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) ) 151 152 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ 153 154 #ifdef configASSERT 155 void vPortValidateInterruptPriority( void ); 156 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() 157 #endif /* configASSERT */ 158 159 #define portNOP() __asm volatile ( "NOP" ) 160 161 /* Suppress warnings that are generated by the IAR tools, but cannot be 162 * fixed in the source code because to do so would cause other compilers to 163 * generate warnings. */ 164 #pragma diag_suppress=Pe191 165 #pragma diag_suppress=Pa082 166 167 #endif /* __ICCARM__ */ 168 169 170 /* The number of bits to shift for an interrupt priority is dependent on the 171 * number of bits implemented by the interrupt controller. */ 172 #if configUNIQUE_INTERRUPT_PRIORITIES == 16 173 #define portPRIORITY_SHIFT 4 174 #define portMAX_BINARY_POINT_VALUE 3 175 #elif configUNIQUE_INTERRUPT_PRIORITIES == 32 176 #define portPRIORITY_SHIFT 3 177 #define portMAX_BINARY_POINT_VALUE 2 178 #elif configUNIQUE_INTERRUPT_PRIORITIES == 64 179 #define portPRIORITY_SHIFT 2 180 #define portMAX_BINARY_POINT_VALUE 1 181 #elif configUNIQUE_INTERRUPT_PRIORITIES == 128 182 #define portPRIORITY_SHIFT 1 183 #define portMAX_BINARY_POINT_VALUE 0 184 #elif configUNIQUE_INTERRUPT_PRIORITIES == 256 185 #define portPRIORITY_SHIFT 0 186 #define portMAX_BINARY_POINT_VALUE 0 187 #else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */ 188 #error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware 189 #endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */ 190 191 /* Interrupt controller access addresses. */ 192 #define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 ) 193 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C ) 194 #define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 ) 195 #define portICCBPR_BINARY_POINT_OFFSET ( 0x08 ) 196 #define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 ) 197 198 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET ) 199 #define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) ) 200 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ) 201 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET ) 202 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) 203 #define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) ) 204 #define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) ) 205 206 /* *INDENT-OFF* */ 207 #ifdef __cplusplus 208 } 209 #endif 210 /* *INDENT-ON* */ 211 212 #endif /* PORTMACRO_H */ 213
