1 ;/*
2 ; * FreeRTOS Kernel V11.1.0
3 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 ; *
5 ; * SPDX-License-Identifier: MIT
6 ; *
7 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 ; * this software and associated documentation files (the "Software"), to deal in
9 ; * the Software without restriction, including without limitation the rights to
10 ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 ; * the Software, and to permit persons to whom the Software is furnished to do so,
12 ; * subject to the following conditions:
13 ; *
14 ; * The above copyright notice and this permission notice shall be included in all
15 ; * copies or substantial portions of the Software.
16 ; *
17 ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 ; *
24 ; * https://www.FreeRTOS.org
25 ; * https://github.com/FreeRTOS
26 ; *
27 ; */
28 
29     EXTERN  vTaskSwitchContext
30     EXTERN  ulCriticalNesting
31     EXTERN  pxCurrentTCB
32     EXTERN  ulPortTaskHasFPUContext
33     EXTERN  ulAsmAPIPriorityMask
34 
35 portSAVE_CONTEXT macro
36 
37     ; Save the LR and SPSR onto the system mode stack before switching to
38     ; system mode to save the remaining system mode registers
39     SRSDB   sp!, #SYS_MODE
40     CPS     #SYS_MODE
41     PUSH    {R0-R12, R14}
42 
43     ; Push the critical nesting count
44     LDR     R2, =ulCriticalNesting
45     LDR     R1, [R2]
46     PUSH    {R1}
47 
48     ; Does the task have a floating point context that needs saving?  If
49     ; ulPortTaskHasFPUContext is 0 then no.
50     LDR     R2, =ulPortTaskHasFPUContext
51     LDR     R3, [R2]
52     CMP     R3, #0
53 
54     ; Save the floating point context, if any
55     FMRXNE  R1,  FPSCR
56     VPUSHNE {D0-D15}
57 #if configFPU_D32 == 1
58     VPUSHNE {D16-D31}
59 #endif ; configFPU_D32
60     PUSHNE  {R1}
61 
62     ; Save ulPortTaskHasFPUContext itself
63     PUSH    {R3}
64 
65     ; Save the stack pointer in the TCB
66     LDR     R0, =pxCurrentTCB
67     LDR     R1, [R0]
68     STR     SP, [R1]
69 
70     endm
71 
72 ; /**********************************************************************/
73 
74 portRESTORE_CONTEXT macro
75 
76     ; Set the SP to point to the stack of the task being restored.
77     LDR     R0, =pxCurrentTCB
78     LDR     R1, [R0]
79     LDR     SP, [R1]
80 
81     ; Is there a floating point context to restore?  If the restored
82     ; ulPortTaskHasFPUContext is zero then no.
83     LDR     R0, =ulPortTaskHasFPUContext
84     POP     {R1}
85     STR     R1, [R0]
86     CMP     R1, #0
87 
88     ; Restore the floating point context, if any
89     POPNE   {R0}
90 #if configFPU_D32 == 1
91     VPOPNE  {D16-D31}
92 #endif ; configFPU_D32
93     VPOPNE  {D0-D15}
94     VMSRNE  FPSCR, R0
95 
96     ; Restore the critical section nesting depth
97     LDR     R0, =ulCriticalNesting
98     POP     {R1}
99     STR     R1, [R0]
100 
101     ; Restore all system mode registers other than the SP (which is already
102     ; being used)
103     POP     {R0-R12, R14}
104 
105     ; Return to the task code, loading CPSR on the way.  CPSR has the interrupt
106     ; enable bit set appropriately for the task about to execute.
107     RFEIA   sp!
108 
109     endm
110