1 /* 2 * FreeRTOS Kernel V11.1.0 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 #ifndef PORTMACRO_H 30 #define PORTMACRO_H 31 32 /* *INDENT-OFF* */ 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 /* *INDENT-ON* */ 37 38 /*----------------------------------------------------------- 39 * Port specific definitions. 40 * 41 * The settings in this file configure FreeRTOS correctly for the given hardware 42 * and compiler. 43 * 44 * These settings should not be altered. 45 *----------------------------------------------------------- 46 */ 47 48 /* Type definitions. */ 49 #define portCHAR char 50 #define portFLOAT float 51 #define portDOUBLE double 52 #define portLONG long 53 #define portSHORT short 54 #define portSTACK_TYPE uint32_t 55 #define portBASE_TYPE long 56 57 typedef portSTACK_TYPE StackType_t; 58 typedef long BaseType_t; 59 typedef unsigned long UBaseType_t; 60 61 typedef uint32_t TickType_t; 62 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 63 64 /*-----------------------------------------------------------*/ 65 66 /* Hardware specifics. */ 67 #define portSTACK_GROWTH ( -1 ) 68 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 69 #define portBYTE_ALIGNMENT 8 70 71 /*-----------------------------------------------------------*/ 72 73 /* Task utilities. */ 74 75 /* Called at the end of an ISR that can cause a context switch. */ 76 #define portEND_SWITCHING_ISR( xSwitchRequired ) \ 77 { \ 78 extern uint32_t ulPortYieldRequired; \ 79 \ 80 if( xSwitchRequired != pdFALSE ) \ 81 { \ 82 ulPortYieldRequired = pdTRUE; \ 83 } \ 84 } 85 86 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 87 #define portYIELD() __asm volatile ( "SWI 0" ::: "memory" ); 88 89 90 /*----------------------------------------------------------- 91 * Critical section control 92 *----------------------------------------------------------*/ 93 94 extern void vPortEnterCritical( void ); 95 extern void vPortExitCritical( void ); 96 extern uint32_t ulPortSetInterruptMask( void ); 97 extern void vPortClearInterruptMask( uint32_t ulNewMaskValue ); 98 extern void vPortInstallFreeRTOSVectorTable( void ); 99 100 /* 101 * These macros do not globally disable/enable interrupts. They do mask off 102 * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. 103 */ 104 #define portENTER_CRITICAL() vPortEnterCritical(); 105 #define portEXIT_CRITICAL() vPortExitCritical(); 106 #define portDISABLE_INTERRUPTS() ulPortSetInterruptMask() 107 #define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 ) 108 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask() 109 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x ) 110 111 /*-----------------------------------------------------------*/ 112 113 /* 114 * Task function macros as described on the FreeRTOS.org WEB site. These are 115 * not required for this port but included in case common demo code that uses these 116 * macros is used. 117 */ 118 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) 119 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) 120 121 /* 122 * Prototype of the FreeRTOS tick handler. This must be installed as the 123 * handler for whichever peripheral is used to generate the RTOS tick. 124 */ 125 void FreeRTOS_Tick_Handler( void ); 126 127 /* 128 * If configUSE_TASK_FPU_SUPPORT is set to 1, then tasks are created without an 129 * FPU context and must call vPortTaskUsesFPU() to allocate an FPU context 130 * prior to any FPU instructions. If configUSE_TASK_FPU_SUPPORT is set to 2, 131 * then all tasks have an FPU context allocated by default. 132 */ 133 #if ( configUSE_TASK_FPU_SUPPORT == 1 ) 134 void vPortTaskUsesFPU( void ); 135 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU() 136 #elif ( configUSE_TASK_FPU_SUPPORT == 2 ) 137 138 /* 139 * Each task has an FPU context already, so define this function away to 140 * prevent it being called accidentally. 141 */ 142 #define vPortTaskUsesFPU() 143 #define portTASK_USES_FLOATING_POINT() 144 #endif /* configUSE_TASK_FPU_SUPPORT */ 145 146 #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL ) 147 #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL ) 148 149 /* Architecture specific optimisations. */ 150 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION 151 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 152 #endif 153 154 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 155 156 /* Store/clear the ready priorities in a bit map. */ 157 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) 158 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) 159 160 /*-----------------------------------------------------------*/ 161 162 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) ) 163 164 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ 165 166 #ifdef configASSERT 167 void vPortValidateInterruptPriority( void ); 168 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() 169 #endif /* configASSERT */ 170 171 #define portNOP() __asm volatile ( "NOP" ) 172 173 174 /* 175 * The number of bits to shift for an interrupt priority is dependent on the 176 * number of bits implemented by the interrupt controller. 177 */ 178 #if configUNIQUE_INTERRUPT_PRIORITIES == 16 179 #define portPRIORITY_SHIFT 4 180 #define portMAX_BINARY_POINT_VALUE 3 181 #elif configUNIQUE_INTERRUPT_PRIORITIES == 32 182 #define portPRIORITY_SHIFT 3 183 #define portMAX_BINARY_POINT_VALUE 2 184 #elif configUNIQUE_INTERRUPT_PRIORITIES == 64 185 #define portPRIORITY_SHIFT 2 186 #define portMAX_BINARY_POINT_VALUE 1 187 #elif configUNIQUE_INTERRUPT_PRIORITIES == 128 188 #define portPRIORITY_SHIFT 1 189 #define portMAX_BINARY_POINT_VALUE 0 190 #elif configUNIQUE_INTERRUPT_PRIORITIES == 256 191 #define portPRIORITY_SHIFT 0 192 #define portMAX_BINARY_POINT_VALUE 0 193 #else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */ 194 #error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware 195 #endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */ 196 197 /* Interrupt controller access addresses. */ 198 #define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 ) 199 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C ) 200 #define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 ) 201 #define portICCBPR_BINARY_POINT_OFFSET ( 0x08 ) 202 #define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 ) 203 204 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET ) 205 #define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) ) 206 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ) 207 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET ) 208 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) 209 #define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) ) 210 #define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) ) 211 212 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" ) 213 214 /* *INDENT-OFF* */ 215 #ifdef __cplusplus 216 } /* extern C */ 217 #endif 218 /* *INDENT-ON* */ 219 220 #endif /* PORTMACRO_H */ 221
