1 /*
2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29
30 #ifndef PORTMACRO_H
31 #define PORTMACRO_H
32
33 /* *INDENT-OFF* */
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 /* *INDENT-ON* */
38
39 /*-----------------------------------------------------------
40 * Port specific definitions.
41 *
42 * The settings in this file configure FreeRTOS correctly for the
43 * given hardware and compiler.
44 *
45 * These settings should not be altered.
46 *-----------------------------------------------------------
47 */
48
49 /* Type definitions. */
50 #define portCHAR char
51 #define portFLOAT float
52 #define portDOUBLE double
53 #define portLONG long
54 #define portSHORT short
55 #define portSTACK_TYPE uint32_t
56 #define portBASE_TYPE long
57
58 typedef portSTACK_TYPE StackType_t;
59 typedef long BaseType_t;
60 typedef unsigned long UBaseType_t;
61
62 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
63 typedef uint16_t TickType_t;
64 #define portMAX_DELAY ( TickType_t ) 0xffff
65 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
66 typedef uint32_t TickType_t;
67 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
68
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
70 * not need to be guarded with a critical section. */
71 #define portTICK_TYPE_IS_ATOMIC 1
72 #else
73 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
74 #endif
75 /*-----------------------------------------------------------*/
76
77 /* MPU specific constants. */
78 #define portUSING_MPU_WRAPPERS 1
79 #define portPRIVILEGE_BIT ( 0x80000000UL )
80
81 #define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL )
82 #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL )
83 #define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL )
84 #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL )
85 #define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )
86 #define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
87 #define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
88
89 #define portSTACK_REGION ( 3UL )
90 #define portGENERAL_PERIPHERALS_REGION ( 4UL )
91 #define portUNPRIVILEGED_FLASH_REGION ( 5UL )
92 #define portPRIVILEGED_FLASH_REGION ( 6UL )
93 #define portPRIVILEGED_RAM_REGION ( 7UL )
94 #define portFIRST_CONFIGURABLE_REGION ( 0UL )
95 #define portLAST_CONFIGURABLE_REGION ( 2UL )
96 #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
97 #define portTOTAL_NUM_REGIONS_IN_TCB ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
98
99 typedef struct MPU_REGION_REGISTERS
100 {
101 uint32_t ulRegionBaseAddress;
102 uint32_t ulRegionAttribute;
103 } xMPU_REGION_REGISTERS;
104
105 typedef struct MPU_REGION_SETTINGS
106 {
107 uint32_t ulRegionStartAddress;
108 uint32_t ulRegionEndAddress;
109 uint32_t ulRegionPermissions;
110 } xMPU_REGION_SETTINGS;
111
112 #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
113
114 #ifndef configSYSTEM_CALL_STACK_SIZE
115 #error configSYSTEM_CALL_STACK_SIZE must be defined to the desired size of the system call stack in words for using MPU wrappers v2.
116 #endif
117
118 typedef struct SYSTEM_CALL_STACK_INFO
119 {
120 uint32_t ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE ];
121 uint32_t * pulSystemCallStack;
122 uint32_t * pulTaskStack;
123 uint32_t ulLinkRegisterAtSystemCallEntry;
124 } xSYSTEM_CALL_STACK_INFO;
125
126 #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
127
128 #define MAX_CONTEXT_SIZE ( 20 )
129
130 /* Size of an Access Control List (ACL) entry in bits. */
131 #define portACL_ENTRY_SIZE_BITS ( 32U )
132
133 /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */
134 #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL )
135 #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL )
136
137 typedef struct MPU_SETTINGS
138 {
139 xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS_IN_TCB ];
140 xMPU_REGION_SETTINGS xRegionSettings[ portTOTAL_NUM_REGIONS_IN_TCB ];
141 uint32_t ulContext[ MAX_CONTEXT_SIZE ];
142 uint32_t ulTaskFlags;
143
144 #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
145 xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo;
146 #if ( configENABLE_ACCESS_CONTROL_LIST == 1 )
147 uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ];
148 #endif
149 #endif
150 } xMPU_SETTINGS;
151
152 /* Architecture specifics. */
153 #define portSTACK_GROWTH ( -1 )
154 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
155 #define portBYTE_ALIGNMENT 8
156 #define portDONT_DISCARD __attribute__( ( used ) )
157 /*-----------------------------------------------------------*/
158
159 /* SVC numbers for various services. */
160 #define portSVC_START_SCHEDULER 100
161 #define portSVC_YIELD 101
162 #define portSVC_RAISE_PRIVILEGE 102
163 #define portSVC_SYSTEM_CALL_EXIT 103
164
165 /* Scheduler utilities. */
166
167 #define portYIELD() __asm volatile ( " SVC %0 \n" ::"i" ( portSVC_YIELD ) : "memory" )
168 #define portYIELD_WITHIN_API() \
169 { \
170 /* Set a PendSV to request a context switch. */ \
171 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
172 \
173 /* Barriers are normally not required but do ensure the code is completely \
174 * within the specified behaviour for the architecture. */ \
175 __asm volatile ( "dsb" ::: "memory" ); \
176 __asm volatile ( "isb" ); \
177 }
178
179 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
180 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
181 #define portEND_SWITCHING_ISR( xSwitchRequired ) \
182 do \
183 { \
184 if( xSwitchRequired ) \
185 { \
186 traceISR_EXIT_TO_SCHEDULER(); \
187 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
188 } \
189 else \
190 { \
191 traceISR_EXIT(); \
192 } \
193 } while( 0 )
194 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
195 /*-----------------------------------------------------------*/
196
197 /* Critical section management. */
198 extern void vPortEnterCritical( void );
199 extern void vPortExitCritical( void );
200 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
201 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
202 #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
203 #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
204 #define portENTER_CRITICAL() vPortEnterCritical()
205 #define portEXIT_CRITICAL() vPortExitCritical()
206
207 /*-----------------------------------------------------------*/
208
209 /* Task function macros as described on the FreeRTOS.org WEB site. These are
210 * not necessary for to use this port. They are defined so the common demo files
211 * (which build with all the ports) will build. */
212 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
213 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
214 /*-----------------------------------------------------------*/
215
216 /* Architecture specific optimisations. */
217 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
218 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
219 #endif
220
221 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
222
223 /* Generic helper function. */
ucPortCountLeadingZeros(uint32_t ulBitmap)224 __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
225 {
226 uint8_t ucReturn;
227
228 __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
229
230 return ucReturn;
231 }
232
233 /* Check the configuration. */
234 #if ( configMAX_PRIORITIES > 32 )
235 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
236 #endif
237
238 /* Store/clear the ready priorities in a bit map. */
239 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
240 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
241
242 /*-----------------------------------------------------------*/
243
244 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
245
246 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
247
248 /*-----------------------------------------------------------*/
249
250 #ifdef configASSERT
251 void vPortValidateInterruptPriority( void );
252 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
253 #endif
254
255 /* portNOP() is not required by this port. */
256 #define portNOP()
257
258 #define portINLINE __inline
259
260 #ifndef portFORCE_INLINE
261 #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
262 #endif
263 /*-----------------------------------------------------------*/
264
265 extern BaseType_t xIsPrivileged( void );
266 extern void vResetPrivilege( void );
267 extern void vPortSwitchToUserMode( void );
268
269 /**
270 * @brief Checks whether or not the processor is privileged.
271 *
272 * @return 1 if the processor is already privileged, 0 otherwise.
273 */
274 #define portIS_PRIVILEGED() xIsPrivileged()
275
276 /**
277 * @brief Raise an SVC request to raise privilege.
278 */
279 #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
280
281 /**
282 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
283 * register.
284 */
285 #define portRESET_PRIVILEGE() vResetPrivilege()
286
287 /**
288 * @brief Make a task unprivileged.
289 *
290 * It must be called from privileged tasks only. Calling it from unprivileged
291 * task will result in a memory protection fault.
292 */
293 #define portSWITCH_TO_USER_MODE() vPortSwitchToUserMode()
294 /*-----------------------------------------------------------*/
295
296 extern BaseType_t xPortIsTaskPrivileged( void );
297
298 /**
299 * @brief Checks whether or not the calling task is privileged.
300 *
301 * @return pdTRUE if the calling task is privileged, pdFALSE otherwise.
302 */
303 #define portIS_TASK_PRIVILEGED() xPortIsTaskPrivileged()
304 /*-----------------------------------------------------------*/
305
xPortIsInsideInterrupt(void)306 portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
307 {
308 uint32_t ulCurrentInterrupt;
309 BaseType_t xReturn;
310
311 /* Obtain the number of the currently executing interrupt. */
312 __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
313
314 if( ulCurrentInterrupt == 0 )
315 {
316 xReturn = pdFALSE;
317 }
318 else
319 {
320 xReturn = pdTRUE;
321 }
322
323 return xReturn;
324 }
325
326 /*-----------------------------------------------------------*/
327
vPortRaiseBASEPRI(void)328 portFORCE_INLINE static void vPortRaiseBASEPRI( void )
329 {
330 uint32_t ulNewBASEPRI;
331
332 __asm volatile
333 (
334 " mov %0, %1 \n" \
335 " msr basepri, %0 \n" \
336 " isb \n" \
337 " dsb \n" \
338 : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
339 );
340 }
341
342 /*-----------------------------------------------------------*/
343
ulPortRaiseBASEPRI(void)344 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
345 {
346 uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
347
348 __asm volatile
349 (
350 " mrs %0, basepri \n" \
351 " mov %1, %2 \n" \
352 " msr basepri, %1 \n" \
353 " isb \n" \
354 " dsb \n" \
355 : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
356 );
357
358 /* This return will not be reached but is necessary to prevent compiler
359 * warnings. */
360 return ulOriginalBASEPRI;
361 }
362 /*-----------------------------------------------------------*/
363
vPortSetBASEPRI(uint32_t ulNewMaskValue)364 portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
365 {
366 __asm volatile
367 (
368 " msr basepri, %0 " ::"r" ( ulNewMaskValue ) : "memory"
369 );
370 }
371 /*-----------------------------------------------------------*/
372
373 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
374
375 #ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
376 #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. *www.FreeRTOS.org/FreeRTOS-V10.3.x.html"
377 #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
378 #endif
379 /*-----------------------------------------------------------*/
380
381 /* *INDENT-OFF* */
382 #ifdef __cplusplus
383 }
384 #endif
385 /* *INDENT-ON* */
386
387 #endif /* PORTMACRO_H */
388
