1 /* 2 * FreeRTOS Kernel V11.1.0 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 #ifndef PORTMACROCOMMON_H 30 #define PORTMACROCOMMON_H 31 32 /* *INDENT-OFF* */ 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 /* *INDENT-ON* */ 37 38 /*------------------------------------------------------------------------------ 39 * Port specific definitions. 40 * 41 * The settings in this file configure FreeRTOS correctly for the given hardware 42 * and compiler. 43 * 44 * These settings should not be altered. 45 *------------------------------------------------------------------------------ 46 */ 47 48 #ifndef configENABLE_FPU 49 #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. 50 #endif /* configENABLE_FPU */ 51 52 #ifndef configENABLE_MPU 53 #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. 54 #endif /* configENABLE_MPU */ 55 56 #ifndef configENABLE_TRUSTZONE 57 #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. 58 #endif /* configENABLE_TRUSTZONE */ 59 60 /*-----------------------------------------------------------*/ 61 62 /** 63 * @brief Type definitions. 64 */ 65 #define portCHAR char 66 #define portFLOAT float 67 #define portDOUBLE double 68 #define portLONG long 69 #define portSHORT short 70 #define portSTACK_TYPE uint32_t 71 #define portBASE_TYPE long 72 73 typedef portSTACK_TYPE StackType_t; 74 typedef long BaseType_t; 75 typedef unsigned long UBaseType_t; 76 77 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) 78 typedef uint16_t TickType_t; 79 #define portMAX_DELAY ( TickType_t ) 0xffff 80 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) 81 typedef uint32_t TickType_t; 82 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 83 84 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do 85 * not need to be guarded with a critical section. */ 86 #define portTICK_TYPE_IS_ATOMIC 1 87 #else 88 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. 89 #endif 90 /*-----------------------------------------------------------*/ 91 92 /** 93 * Architecture specifics. 94 */ 95 #define portSTACK_GROWTH ( -1 ) 96 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 97 #define portBYTE_ALIGNMENT 8 98 #define portNOP() 99 #define portINLINE __inline 100 #ifndef portFORCE_INLINE 101 #define portFORCE_INLINE inline __attribute__( ( always_inline ) ) 102 #endif 103 #define portHAS_STACK_OVERFLOW_CHECKING 1 104 /*-----------------------------------------------------------*/ 105 106 /** 107 * @brief Extern declarations. 108 */ 109 extern BaseType_t xPortIsInsideInterrupt( void ); 110 111 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; 112 113 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; 114 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; 115 116 extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; 117 extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; 118 119 #if ( configENABLE_TRUSTZONE == 1 ) 120 extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ 121 extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; 122 #endif /* configENABLE_TRUSTZONE */ 123 124 #if ( configENABLE_MPU == 1 ) 125 extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; 126 extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; 127 #endif /* configENABLE_MPU */ 128 /*-----------------------------------------------------------*/ 129 130 /** 131 * @brief MPU specific constants. 132 */ 133 #if ( configENABLE_MPU == 1 ) 134 #define portUSING_MPU_WRAPPERS 1 135 #define portPRIVILEGE_BIT ( 0x80000000UL ) 136 #else 137 #define portPRIVILEGE_BIT ( 0x0UL ) 138 #endif /* configENABLE_MPU */ 139 140 /* MPU settings that can be overriden in FreeRTOSConfig.h. */ 141 #ifndef configTOTAL_MPU_REGIONS 142 /* Define to 8 for backward compatibility. */ 143 #define configTOTAL_MPU_REGIONS ( 8UL ) 144 #endif 145 146 /* MPU regions. */ 147 #define portPRIVILEGED_FLASH_REGION ( 0UL ) 148 #define portUNPRIVILEGED_FLASH_REGION ( 1UL ) 149 #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) 150 #define portPRIVILEGED_RAM_REGION ( 3UL ) 151 #define portSTACK_REGION ( 4UL ) 152 #define portFIRST_CONFIGURABLE_REGION ( 5UL ) 153 #define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL ) 154 #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) 155 #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ 156 157 /* Device memory attributes used in MPU_MAIR registers. 158 * 159 * 8-bit values encoded as follows: 160 * Bit[7:4] - 0000 - Device Memory 161 * Bit[3:2] - 00 --> Device-nGnRnE 162 * 01 --> Device-nGnRE 163 * 10 --> Device-nGRE 164 * 11 --> Device-GRE 165 * Bit[1:0] - 00, Reserved. 166 */ 167 #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ 168 #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ 169 #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ 170 #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ 171 172 /* Normal memory attributes used in MPU_MAIR registers. */ 173 #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ 174 #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ 175 176 /* Attributes used in MPU_RBAR registers. */ 177 #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) 178 #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) 179 #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) 180 181 #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) 182 #define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) 183 #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) 184 #define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) 185 186 #define portMPU_REGION_EXECUTE_NEVER ( 1UL ) 187 /*-----------------------------------------------------------*/ 188 189 #if ( configENABLE_MPU == 1 ) 190 191 /** 192 * @brief Settings to define an MPU region. 193 */ 194 typedef struct MPURegionSettings 195 { 196 uint32_t ulRBAR; /**< RBAR for the region. */ 197 uint32_t ulRLAR; /**< RLAR for the region. */ 198 } MPURegionSettings_t; 199 200 #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) 201 202 #ifndef configSYSTEM_CALL_STACK_SIZE 203 #error configSYSTEM_CALL_STACK_SIZE must be defined to the desired size of the system call stack in words for using MPU wrappers v2. 204 #endif 205 206 /** 207 * @brief System call stack. 208 */ 209 typedef struct SYSTEM_CALL_STACK_INFO 210 { 211 uint32_t ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE ]; 212 uint32_t * pulSystemCallStack; 213 uint32_t * pulSystemCallStackLimit; 214 uint32_t * pulTaskStack; 215 uint32_t ulLinkRegisterAtSystemCallEntry; 216 uint32_t ulStackLimitRegisterAtSystemCallEntry; 217 } xSYSTEM_CALL_STACK_INFO; 218 219 #endif /* configUSE_MPU_WRAPPERS_V1 == 0 */ 220 221 /** 222 * @brief MPU settings as stored in the TCB. 223 */ 224 #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) 225 226 #if ( configENABLE_TRUSTZONE == 1 ) 227 228 /* 229 * +-----------+---------------+----------+-----------------+------------------------------+-----+ 230 * | s16-s31 | s0-s15, FPSCR | r4-r11 | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | | 231 * | | | | PC, xPSR | CONTROL, EXC_RETURN | | 232 * +-----------+---------------+----------+-----------------+------------------------------+-----+ 233 * 234 * <-----------><--------------><---------><----------------><-----------------------------><----> 235 * 16 16 8 8 5 1 236 */ 237 #define MAX_CONTEXT_SIZE 54 238 239 #else /* #if( configENABLE_TRUSTZONE == 1 ) */ 240 241 /* 242 * +-----------+---------------+----------+-----------------+----------------------+-----+ 243 * | s16-s31 | s0-s15, FPSCR | r4-r11 | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | | 244 * | | | | PC, xPSR | EXC_RETURN | | 245 * +-----------+---------------+----------+-----------------+----------------------+-----+ 246 * 247 * <-----------><--------------><---------><----------------><---------------------><----> 248 * 16 16 8 8 4 1 249 */ 250 #define MAX_CONTEXT_SIZE 53 251 252 #endif /* #if( configENABLE_TRUSTZONE == 1 ) */ 253 254 #else /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ 255 256 #if ( configENABLE_TRUSTZONE == 1 ) 257 258 /* 259 * +----------+-----------------+------------------------------+-----+ 260 * | r4-r11 | r0-r3, r12, LR, | xSecureContext, PSP, PSPLIM, | | 261 * | | PC, xPSR | CONTROL, EXC_RETURN | | 262 * +----------+-----------------+------------------------------+-----+ 263 * 264 * <---------><----------------><------------------------------><----> 265 * 8 8 5 1 266 */ 267 #define MAX_CONTEXT_SIZE 22 268 269 #else /* #if( configENABLE_TRUSTZONE == 1 ) */ 270 271 /* 272 * +----------+-----------------+----------------------+-----+ 273 * | r4-r11 | r0-r3, r12, LR, | PSP, PSPLIM, CONTROL | | 274 * | | PC, xPSR | EXC_RETURN | | 275 * +----------+-----------------+----------------------+-----+ 276 * 277 * <---------><----------------><----------------------><----> 278 * 8 8 4 1 279 */ 280 #define MAX_CONTEXT_SIZE 21 281 282 #endif /* #if( configENABLE_TRUSTZONE == 1 ) */ 283 284 #endif /* #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) ) */ 285 286 /* Flags used for xMPU_SETTINGS.ulTaskFlags member. */ 287 #define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL ) 288 #define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL ) 289 290 /* Size of an Access Control List (ACL) entry in bits. */ 291 #define portACL_ENTRY_SIZE_BITS ( 32U ) 292 293 typedef struct MPU_SETTINGS 294 { 295 uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ 296 MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ 297 uint32_t ulContext[ MAX_CONTEXT_SIZE ]; 298 uint32_t ulTaskFlags; 299 300 #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) 301 xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo; 302 #if ( configENABLE_ACCESS_CONTROL_LIST == 1 ) 303 uint32_t ulAccessControlList[ ( configPROTECTED_KERNEL_OBJECT_POOL_SIZE / portACL_ENTRY_SIZE_BITS ) + 1 ]; 304 #endif 305 #endif 306 } xMPU_SETTINGS; 307 308 #endif /* configENABLE_MPU == 1 */ 309 /*-----------------------------------------------------------*/ 310 311 /** 312 * @brief Validate priority of ISRs that are allowed to call FreeRTOS 313 * system calls. 314 */ 315 #ifdef configASSERT 316 #if ( portHAS_ARMV8M_MAIN_EXTENSION == 1 ) 317 void vPortValidateInterruptPriority( void ); 318 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() 319 #endif 320 #endif 321 322 /** 323 * @brief SVC numbers. 324 */ 325 #define portSVC_ALLOCATE_SECURE_CONTEXT 100 326 #define portSVC_FREE_SECURE_CONTEXT 101 327 #define portSVC_START_SCHEDULER 102 328 #define portSVC_RAISE_PRIVILEGE 103 329 #define portSVC_SYSTEM_CALL_EXIT 104 330 #define portSVC_YIELD 105 331 /*-----------------------------------------------------------*/ 332 333 /** 334 * @brief Scheduler utilities. 335 */ 336 #if ( configENABLE_MPU == 1 ) 337 #define portYIELD() __asm volatile ( "svc %0" ::"i" ( portSVC_YIELD ) : "memory" ) 338 #define portYIELD_WITHIN_API() vPortYield() 339 #else 340 #define portYIELD() vPortYield() 341 #define portYIELD_WITHIN_API() vPortYield() 342 #endif 343 344 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) 345 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) 346 #define portEND_SWITCHING_ISR( xSwitchRequired ) \ 347 do \ 348 { \ 349 if( xSwitchRequired ) \ 350 { \ 351 traceISR_EXIT_TO_SCHEDULER(); \ 352 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ 353 } \ 354 else \ 355 { \ 356 traceISR_EXIT(); \ 357 } \ 358 } while( 0 ) 359 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 360 /*-----------------------------------------------------------*/ 361 362 /** 363 * @brief Critical section management. 364 */ 365 #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() 366 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x ) 367 #define portENTER_CRITICAL() vPortEnterCritical() 368 #define portEXIT_CRITICAL() vPortExitCritical() 369 /*-----------------------------------------------------------*/ 370 371 /** 372 * @brief Tickless idle/low power functionality. 373 */ 374 #ifndef portSUPPRESS_TICKS_AND_SLEEP 375 extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); 376 #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) 377 #endif 378 /*-----------------------------------------------------------*/ 379 380 /** 381 * @brief Task function macros as described on the FreeRTOS.org WEB site. 382 */ 383 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) 384 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) 385 /*-----------------------------------------------------------*/ 386 387 #if ( configENABLE_TRUSTZONE == 1 ) 388 389 /** 390 * @brief Allocate a secure context for the task. 391 * 392 * Tasks are not created with a secure context. Any task that is going to call 393 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a 394 * secure context before it calls any secure function. 395 * 396 * @param[in] ulSecureStackSize The size of the secure stack to be allocated. 397 */ 398 #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize ) 399 400 /** 401 * @brief Called when a task is deleted to delete the task's secure context, 402 * if it has one. 403 * 404 * @param[in] pxTCB The TCB of the task being deleted. 405 */ 406 #define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) 407 #endif /* configENABLE_TRUSTZONE */ 408 /*-----------------------------------------------------------*/ 409 410 #if ( configENABLE_MPU == 1 ) 411 412 /** 413 * @brief Checks whether or not the processor is privileged. 414 * 415 * @return 1 if the processor is already privileged, 0 otherwise. 416 */ 417 #define portIS_PRIVILEGED() xIsPrivileged() 418 419 /** 420 * @brief Raise an SVC request to raise privilege. 421 * 422 * The SVC handler checks that the SVC was raised from a system call and only 423 * then it raises the privilege. If this is called from any other place, 424 * the privilege is not raised. 425 */ 426 #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" ); 427 428 /** 429 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL 430 * register. 431 */ 432 #define portRESET_PRIVILEGE() vResetPrivilege() 433 #else 434 #define portIS_PRIVILEGED() 435 #define portRAISE_PRIVILEGE() 436 #define portRESET_PRIVILEGE() 437 #endif /* configENABLE_MPU */ 438 /*-----------------------------------------------------------*/ 439 440 #if ( configENABLE_MPU == 1 ) 441 442 extern BaseType_t xPortIsTaskPrivileged( void ); 443 444 /** 445 * @brief Checks whether or not the calling task is privileged. 446 * 447 * @return pdTRUE if the calling task is privileged, pdFALSE otherwise. 448 */ 449 #define portIS_TASK_PRIVILEGED() xPortIsTaskPrivileged() 450 451 #endif /* configENABLE_MPU == 1 */ 452 /*-----------------------------------------------------------*/ 453 454 /** 455 * @brief Barriers. 456 */ 457 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" ) 458 /*-----------------------------------------------------------*/ 459 460 /* Select correct value of configUSE_PORT_OPTIMISED_TASK_SELECTION 461 * based on whether or not Mainline extension is implemented. */ 462 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION 463 #if ( portHAS_ARMV8M_MAIN_EXTENSION == 1 ) 464 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 465 #else 466 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 467 #endif 468 #endif /* #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION */ 469 470 /** 471 * @brief Port-optimised task selection. 472 */ 473 #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 ) 474 475 /** 476 * @brief Count the number of leading zeros in a 32-bit value. 477 */ ulPortCountLeadingZeros(uint32_t ulBitmap)478 static portFORCE_INLINE uint32_t ulPortCountLeadingZeros( uint32_t ulBitmap ) 479 { 480 uint32_t ulReturn; 481 482 __asm volatile ( "clz %0, %1" : "=r" ( ulReturn ) : "r" ( ulBitmap ) : "memory" ); 483 484 return ulReturn; 485 } 486 487 /* Check the configuration. */ 488 #if ( configMAX_PRIORITIES > 32 ) 489 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 different priorities as tasks that share a priority will time slice. 490 #endif 491 492 #if ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) 493 #error ARMv8-M baseline implementations (such as Cortex-M23) do not support port-optimised task selection. Please set configUSE_PORT_OPTIMISED_TASK_SELECTION to 0 or leave it undefined. 494 #endif 495 496 /** 497 * @brief Store/clear the ready priorities in a bit map. 498 */ 499 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) 500 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) 501 502 /** 503 * @brief Get the priority of the highest-priority task that is ready to execute. 504 */ 505 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ulPortCountLeadingZeros( ( uxReadyPriorities ) ) ) 506 507 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ 508 /*-----------------------------------------------------------*/ 509 510 /* *INDENT-OFF* */ 511 #ifdef __cplusplus 512 } 513 #endif 514 /* *INDENT-ON* */ 515 516 #endif /* PORTMACROCOMMON_H */ 517
