1 /* 2 * FreeRTOS Kernel V11.1.0 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 #ifndef PORTMACRO_H 30 #define PORTMACRO_H 31 32 /* *INDENT-OFF* */ 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 /* *INDENT-ON* */ 37 38 /*----------------------------------------------------------- 39 * Port specific definitions. 40 * 41 * The settings in this file configure FreeRTOS correctly for the given hardware 42 * and compiler. 43 * 44 * These settings should not be altered. 45 *----------------------------------------------------------- 46 */ 47 48 /* Type definitions. */ 49 #define portCHAR char 50 #define portFLOAT float 51 #define portDOUBLE double 52 #define portLONG long 53 #define portSHORT short 54 #define portSTACK_TYPE uint32_t 55 #define portBASE_TYPE long 56 57 typedef portSTACK_TYPE StackType_t; 58 typedef long BaseType_t; 59 typedef unsigned long UBaseType_t; 60 61 typedef uint32_t TickType_t; 62 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 63 64 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do 65 * not need to be guarded with a critical section. */ 66 #define portTICK_TYPE_IS_ATOMIC 1 67 68 /*-----------------------------------------------------------*/ 69 70 /* Hardware specifics. */ 71 #define portSTACK_GROWTH ( -1 ) 72 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 73 #define portBYTE_ALIGNMENT 8 74 75 /*-----------------------------------------------------------*/ 76 77 /* Task utilities. */ 78 79 /* Called at the end of an ISR that can cause a context switch. */ 80 #define portEND_SWITCHING_ISR( xSwitchRequired ) \ 81 { \ 82 extern uint32_t ulPortYieldRequired; \ 83 \ 84 if( xSwitchRequired != pdFALSE ) \ 85 { \ 86 ulPortYieldRequired = pdTRUE; \ 87 } \ 88 } 89 90 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 91 #define portYIELD() __asm volatile ( "SWI 0" ::: "memory" ); 92 93 94 /*----------------------------------------------------------- 95 * Critical section control 96 *----------------------------------------------------------*/ 97 98 extern void vPortEnterCritical( void ); 99 extern void vPortExitCritical( void ); 100 extern uint32_t ulPortSetInterruptMask( void ); 101 extern void vPortClearInterruptMask( uint32_t ulNewMaskValue ); 102 extern void vPortInstallFreeRTOSVectorTable( void ); 103 104 /* These macros do not globally disable/enable interrupts. They do mask off 105 * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */ 106 #define portENTER_CRITICAL() vPortEnterCritical(); 107 #define portEXIT_CRITICAL() vPortExitCritical(); 108 #define portDISABLE_INTERRUPTS() ulPortSetInterruptMask() 109 #define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 ) 110 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask() 111 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x ) 112 113 /*-----------------------------------------------------------*/ 114 115 /* Task function macros as described on the FreeRTOS.org WEB site. These are 116 * not required for this port but included in case common demo code that uses these 117 * macros is used. */ 118 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) 119 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) 120 121 /* Prototype of the FreeRTOS tick handler. This must be installed as the 122 * handler for whichever peripheral is used to generate the RTOS tick. */ 123 void FreeRTOS_Tick_Handler( void ); 124 125 /* If configUSE_TASK_FPU_SUPPORT is set to 1 (or left undefined) then tasks are 126 * created without an FPU context and must call vPortTaskUsesFPU() to give 127 * themselves an FPU context before using any FPU instructions. If 128 * configUSE_TASK_FPU_SUPPORT is set to 2 then all tasks will have an FPU context 129 * by default. */ 130 #if ( configUSE_TASK_FPU_SUPPORT != 2 ) 131 void vPortTaskUsesFPU( void ); 132 #else 133 134 /* Each task has an FPU context already, so define this function away to 135 * nothing to prevent it being called accidentally. */ 136 #define vPortTaskUsesFPU() 137 #endif 138 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU() 139 140 #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL ) 141 #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL ) 142 143 /* Architecture specific optimisations. */ 144 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION 145 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 146 #endif 147 148 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 149 150 /* Store/clear the ready priorities in a bit map. */ 151 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) 152 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) 153 154 /*-----------------------------------------------------------*/ 155 156 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) ) 157 158 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ 159 160 #ifdef configASSERT 161 void vPortValidateInterruptPriority( void ); 162 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() 163 #endif /* configASSERT */ 164 165 #define portNOP() __asm volatile ( "NOP" ) 166 #define portINLINE __inline 167 168 /* The number of bits to shift for an interrupt priority is dependent on the 169 * number of bits implemented by the interrupt controller. */ 170 #if configUNIQUE_INTERRUPT_PRIORITIES == 16 171 #define portPRIORITY_SHIFT 4 172 #define portMAX_BINARY_POINT_VALUE 3 173 #elif configUNIQUE_INTERRUPT_PRIORITIES == 32 174 #define portPRIORITY_SHIFT 3 175 #define portMAX_BINARY_POINT_VALUE 2 176 #elif configUNIQUE_INTERRUPT_PRIORITIES == 64 177 #define portPRIORITY_SHIFT 2 178 #define portMAX_BINARY_POINT_VALUE 1 179 #elif configUNIQUE_INTERRUPT_PRIORITIES == 128 180 #define portPRIORITY_SHIFT 1 181 #define portMAX_BINARY_POINT_VALUE 0 182 #elif configUNIQUE_INTERRUPT_PRIORITIES == 256 183 #define portPRIORITY_SHIFT 0 184 #define portMAX_BINARY_POINT_VALUE 0 185 #else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */ 186 #error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware 187 #endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */ 188 189 /* Interrupt controller access addresses. */ 190 #define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 ) 191 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C ) 192 #define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 ) 193 #define portICCBPR_BINARY_POINT_OFFSET ( 0x08 ) 194 #define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 ) 195 196 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET ) 197 #define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) ) 198 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ) 199 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET ) 200 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) 201 #define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) ) 202 #define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) ) 203 204 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" ) 205 206 /* *INDENT-OFF* */ 207 #ifdef __cplusplus 208 } 209 #endif 210 /* *INDENT-ON* */ 211 212 #endif /* PORTMACRO_H */ 213