1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the ARM CM4F port.
31 *----------------------------------------------------------*/
32
33 /* Scheduler includes. */
34 #include "FreeRTOS.h"
35 #include "task.h"
36
37 /* Constants required to manipulate the NVIC. */
38 #define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
39 #define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
40 #define portNVIC_SHPR3_REG ( ( volatile uint32_t * ) 0xe000ed20 )
41 #define portNVIC_SYSTICK_CLK 0x00000004
42 #define portNVIC_SYSTICK_INT 0x00000002
43 #define portNVIC_SYSTICK_ENABLE 0x00000001
44 #define portMIN_INTERRUPT_PRIORITY ( 255UL )
45 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 16UL )
46 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 24UL )
47
48 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
49 #define portVECTACTIVE_MASK ( 0xFFUL )
50
51 /* Constants required to manipulate the VFP. */
52 #define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
53 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
54
55 /* Constants required to set up the initial stack. */
56 #define portINITIAL_XPSR ( 0x01000000 )
57 #define portINITIAL_EXC_RETURN ( 0xfffffffd )
58
59 /* Let the user override the pre-loading of the initial LR with the address of
60 * prvTaskExitError() in case it messes up unwinding of the stack in the
61 * debugger. */
62 #ifdef configTASK_RETURN_ADDRESS
63 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
64 #else
65 #define portTASK_RETURN_ADDRESS prvTaskExitError
66 #endif
67
68 /* For strict compliance with the Cortex-M spec the task start address should
69 * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
70 #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
71
72 /* The priority used by the kernel is assigned to a variable to make access
73 * from inline assembler easier. */
74 const uint32_t ulKernelPriority = portMIN_INTERRUPT_PRIORITY;
75
76 /* Each task maintains its own interrupt status in the critical nesting
77 * variable. */
78 static uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
79
80 /*
81 * Setup the timer to generate the tick interrupts.
82 */
83 static void prvSetupTimerInterrupt( void );
84
85 /*
86 * Exception handlers.
87 */
88 void SysTick_Handler( void );
89
90 /*
91 * Functions defined in port_asm.asm.
92 */
93 extern void vPortEnableVFP( void );
94 extern void vPortStartFirstTask( void );
95
96 /*
97 * Used to catch tasks that attempt to return from their implementing function.
98 */
99 static void prvTaskExitError( void );
100
101 /* This exists purely to allow the const to be used from within the
102 * port_asm.asm assembly file. */
103 const uint32_t ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_PRIORITY;
104
105 /*-----------------------------------------------------------*/
106
107 /*
108 * See header file for description.
109 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)110 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
111 TaskFunction_t pxCode,
112 void * pvParameters )
113 {
114 /* Simulate the stack frame as it would be created by a context switch
115 * interrupt. */
116
117 /* Offset added to account for the way the MCU uses the stack on entry/exit
118 * of interrupts, and to ensure alignment. */
119 pxTopOfStack--;
120
121 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
122 pxTopOfStack--;
123 *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
124 pxTopOfStack--;
125 *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
126
127 /* Save code space by skipping register initialisation. */
128 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
129 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
130
131 /* A save method is being used that requires each task to maintain its
132 * own exec return value. */
133 pxTopOfStack--;
134 *pxTopOfStack = portINITIAL_EXC_RETURN;
135
136 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
137
138 return pxTopOfStack;
139 }
140 /*-----------------------------------------------------------*/
141
prvTaskExitError(void)142 static void prvTaskExitError( void )
143 {
144 /* A function that implements a task must not exit or attempt to return to
145 * its caller as there is nothing to return to. If a task wants to exit it
146 * should instead call vTaskDelete( NULL ).
147 *
148 * Artificially force an assert() to be triggered if configASSERT() is
149 * defined, then stop here so application writers can catch the error. */
150 configASSERT( ulCriticalNesting == ~0UL );
151 portDISABLE_INTERRUPTS();
152
153 for( ; ; )
154 {
155 }
156 }
157 /*-----------------------------------------------------------*/
158
159 /*
160 * See header file for description.
161 */
xPortStartScheduler(void)162 BaseType_t xPortStartScheduler( void )
163 {
164 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
165 * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
166 configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
167
168 /* Make PendSV and SysTick the lowest priority interrupts. */
169 *( portNVIC_SHPR3_REG ) |= portNVIC_PENDSV_PRI;
170 *( portNVIC_SHPR3_REG ) |= portNVIC_SYSTICK_PRI;
171
172 /* Start the timer that generates the tick ISR. Interrupts are disabled
173 * here already. */
174 prvSetupTimerInterrupt();
175
176 /* Initialise the critical nesting count ready for the first task. */
177 ulCriticalNesting = 0;
178
179 /* Ensure the VFP is enabled - it should be anyway. */
180 vPortEnableVFP();
181
182 /* Lazy save always. */
183 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
184
185 /* Start the first task. */
186 vPortStartFirstTask();
187
188 /* Should not get here! */
189 return 0;
190 }
191 /*-----------------------------------------------------------*/
192
vPortEndScheduler(void)193 void vPortEndScheduler( void )
194 {
195 /* Not implemented in ports where there is nothing to return to.
196 * Artificially force an assert. */
197 configASSERT( ulCriticalNesting == 1000UL );
198 }
199 /*-----------------------------------------------------------*/
200
vPortYield(void)201 void vPortYield( void )
202 {
203 /* Set a PendSV to request a context switch. */
204 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
205
206 /* Barriers are normally not required but do ensure the code is completely
207 * within the specified behaviour for the architecture. */
208 __DSB();
209 __ISB();
210 }
211 /*-----------------------------------------------------------*/
212
vPortEnterCritical(void)213 void vPortEnterCritical( void )
214 {
215 portDISABLE_INTERRUPTS();
216 ulCriticalNesting++;
217 __DSB();
218 __ISB();
219
220 /* This is not the interrupt safe version of the enter critical function so
221 * assert() if it is being called from an interrupt context. Only API
222 * functions that end in "FromISR" can be used in an interrupt. Only assert if
223 * the critical nesting count is 1 to protect against recursive calls if the
224 * assert function also uses a critical section. */
225 if( ulCriticalNesting == 1 )
226 {
227 configASSERT( ( ( *( portNVIC_INT_CTRL ) ) & portVECTACTIVE_MASK ) == 0 );
228 }
229 }
230 /*-----------------------------------------------------------*/
231
vPortExitCritical(void)232 void vPortExitCritical( void )
233 {
234 configASSERT( ulCriticalNesting );
235 ulCriticalNesting--;
236
237 if( ulCriticalNesting == 0 )
238 {
239 portENABLE_INTERRUPTS();
240 }
241 }
242 /*-----------------------------------------------------------*/
243
SysTick_Handler(void)244 void SysTick_Handler( void )
245 {
246 uint32_t ulDummy;
247
248 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
249 {
250 if( xTaskIncrementTick() != pdFALSE )
251 {
252 /* Pend a context switch. */
253 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
254 }
255 }
256 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
257 }
258 /*-----------------------------------------------------------*/
259
260 /*
261 * Setup the systick timer to generate the tick interrupts at the required
262 * frequency.
263 */
prvSetupTimerInterrupt(void)264 void prvSetupTimerInterrupt( void )
265 {
266 /* Configure SysTick to interrupt at the requested rate. */
267 *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
268 *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
269 }
