xref: /Kernel-v10.6.2/portable/IAR/LPC2000/ISR_Support.h (revision ef7b253b56c9788077f5ecd6c9deb4021923d646) 
1 ;/*
2 ; * FreeRTOS Kernel V10.6.2
3 ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
4 ; *
5 ; * SPDX-License-Identifier: MIT
6 ; *
7 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 ; * this software and associated documentation files (the "Software"), to deal in
9 ; * the Software without restriction, including without limitation the rights to
10 ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 ; * the Software, and to permit persons to whom the Software is furnished to do so,
12 ; * subject to the following conditions:
13 ; *
14 ; * The above copyright notice and this permission notice shall be included in all
15 ; * copies or substantial portions of the Software.
16 ; *
17 ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 ; *
24 ; * https://www.FreeRTOS.org
25 ; * https://github.com/FreeRTOS
26 ; *
27 ; */
28 
29     EXTERN pxCurrentTCB
30     EXTERN ulCriticalNesting
31 
32 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
33 ; Context save and restore macro definitions
34 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
35 
36 portSAVE_CONTEXT MACRO
37 
38     ; Push R0 as we are going to use the register.
39     STMDB   SP!, {R0}
40 
41     ; Set R0 to point to the task stack pointer.
42     STMDB   SP, {SP}^
43     NOP
44     SUB     SP, SP, #4
45     LDMIA   SP!, {R0}
46 
47     ; Push the return address onto the stack.
48     STMDB   R0!, {LR}
49 
50     ; Now we have saved LR we can use it instead of R0.
51     MOV     LR, R0
52 
53     ; Pop R0 so we can save it onto the system mode stack.
54     LDMIA   SP!, {R0}
55 
56     ; Push all the system mode registers onto the task stack.
57     STMDB   LR, {R0-LR}^
58     NOP
59     SUB     LR, LR, #60
60 
61     ; Push the SPSR onto the task stack.
62     MRS     R0, SPSR
63     STMDB   LR!, {R0}
64 
65     LDR     R0, =ulCriticalNesting
66     LDR     R0, [R0]
67     STMDB   LR!, {R0}
68 
69     ; Store the new top of stack for the task.
70     LDR     R1, =pxCurrentTCB
71     LDR     R0, [R1]
72     STR     LR, [R0]
73 
74     ENDM
75 
76 
77 portRESTORE_CONTEXT MACRO
78 
79     ; Set the LR to the task stack.
80     LDR     R1, =pxCurrentTCB
81     LDR     R0, [R1]
82     LDR     LR, [R0]
83 
84     ; The critical nesting depth is the first item on the stack.
85     ; Load it into the ulCriticalNesting variable.
86     LDR     R0, =ulCriticalNesting
87     LDMFD   LR!, {R1}
88     STR     R1, [R0]
89 
90     ; Get the SPSR from the stack.
91     LDMFD   LR!, {R0}
92     MSR     SPSR_cxsf, R0
93 
94     ; Restore all system mode registers for the task.
95     LDMFD   LR, {R0-R14}^
96     NOP
97 
98     ; Restore the return address.
99     LDR     LR, [LR, #+60]
100 
101     ; And return - correcting the offset in the LR to obtain the
102     ; correct address.
103     SUBS    PC, LR, #4
104 
105     ENDM
106