1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
31 *----------------------------------------------------------*/
32
33
34 /* Standard includes. */
35 #include <stdlib.h>
36
37 /* Scheduler includes. */
38 #include "FreeRTOS.h"
39 #include "task.h"
40
41 /* Hardware includes. */
42 #include <board.h>
43 #include <pio/pio.h>
44 #include <pio/pio_it.h>
45 #include <pit/pit.h>
46 #include <aic/aic.h>
47 #include <tc/tc.h>
48 #include <utility/led.h>
49 #include <utility/trace.h>
50
51 /*-----------------------------------------------------------*/
52
53 /* Constants required to setup the initial stack. */
54 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
55 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
56 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
57
58 /* Constants required to setup the PIT. */
59 #define port1MHz_IN_Hz ( 1000000ul )
60 #define port1SECOND_IN_uS ( 1000000.0 )
61
62 /* Constants required to handle critical sections. */
63 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
64
65
66 #define portINT_LEVEL_SENSITIVE 0
67 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
68 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
69 /*-----------------------------------------------------------*/
70
71 /* Setup the PIT to generate the tick interrupts. */
72 static void prvSetupTimerInterrupt( void );
73
74 /* The PIT interrupt handler - the RTOS tick. */
75 static void vPortTickISR( void );
76
77 /* ulCriticalNesting will get set to zero when the first task starts. It
78 cannot be initialised to 0 as this will cause interrupts to be enabled
79 during the kernel initialisation process. */
80 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
81
82 /*-----------------------------------------------------------*/
83
84 /*
85 * Initialise the stack of a task to look exactly as if a call to
86 * portSAVE_CONTEXT had been called.
87 *
88 * See header file for description.
89 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)90 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
91 {
92 StackType_t *pxOriginalTOS;
93
94 pxOriginalTOS = pxTopOfStack;
95
96 /* To ensure asserts in tasks.c don't fail, although in this case the assert
97 is not really required. */
98 pxTopOfStack--;
99
100 /* Setup the initial stack of the task. The stack is set exactly as
101 expected by the portRESTORE_CONTEXT() macro. */
102
103 /* First on the stack is the return address - which in this case is the
104 start of the task. The offset is added to make the return address appear
105 as it would within an IRQ ISR. */
106 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
107 pxTopOfStack--;
108
109 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
110 pxTopOfStack--;
111 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
112 pxTopOfStack--;
113 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
114 pxTopOfStack--;
115 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
116 pxTopOfStack--;
117 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
118 pxTopOfStack--;
119 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
120 pxTopOfStack--;
121 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
122 pxTopOfStack--;
123 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
124 pxTopOfStack--;
125 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
126 pxTopOfStack--;
127 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
128 pxTopOfStack--;
129 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
130 pxTopOfStack--;
131 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
132 pxTopOfStack--;
133 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
134 pxTopOfStack--;
135 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
136 pxTopOfStack--;
137
138 /* When the task starts is will expect to find the function parameter in
139 R0. */
140 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
141 pxTopOfStack--;
142
143 /* The status register is set for system mode, with interrupts enabled. */
144 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
145
146 #ifdef THUMB_INTERWORK
147 {
148 /* We want the task to start in thumb mode. */
149 *pxTopOfStack |= portTHUMB_MODE_BIT;
150 }
151 #endif
152
153 pxTopOfStack--;
154
155 /* Interrupt flags cannot always be stored on the stack and will
156 instead be stored in a variable, which is then saved as part of the
157 tasks context. */
158 *pxTopOfStack = portNO_CRITICAL_NESTING;
159
160 return pxTopOfStack;
161 }
162 /*-----------------------------------------------------------*/
163
xPortStartScheduler(void)164 BaseType_t xPortStartScheduler( void )
165 {
166 extern void vPortStartFirstTask( void );
167
168 /* Start the timer that generates the tick ISR. Interrupts are disabled
169 here already. */
170 prvSetupTimerInterrupt();
171
172 /* Start the first task. */
173 vPortStartFirstTask();
174
175 /* Should not get here! */
176 return 0;
177 }
178 /*-----------------------------------------------------------*/
179
vPortEndScheduler(void)180 void vPortEndScheduler( void )
181 {
182 /* It is unlikely that the ARM port will require this function as there
183 is nothing to return to. */
184 }
185 /*-----------------------------------------------------------*/
186
vPortTickISR(void)187 static __arm void vPortTickISR( void )
188 {
189 volatile uint32_t ulDummy;
190
191 /* Increment the tick count - which may wake some tasks but as the
192 preemptive scheduler is not being used any woken task is not given
193 processor time no matter what its priority. */
194 if( xTaskIncrementTick() != pdFALSE )
195 {
196 vTaskSwitchContext();
197 }
198
199 /* Clear the PIT interrupt. */
200 ulDummy = AT91C_BASE_PITC->PITC_PIVR;
201
202 /* To remove compiler warning. */
203 ( void ) ulDummy;
204
205 /* The AIC is cleared in the asm wrapper, outside of this function. */
206 }
207 /*-----------------------------------------------------------*/
208
prvSetupTimerInterrupt(void)209 static void prvSetupTimerInterrupt( void )
210 {
211 const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
212
213 /* Setup the PIT for the required frequency. */
214 PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
215
216 /* Setup the PIT interrupt. */
217 AIC_DisableIT( AT91C_ID_SYS );
218 AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
219 AIC_EnableIT( AT91C_ID_SYS );
220 PIT_EnableIT();
221 }
222 /*-----------------------------------------------------------*/
223
vPortEnterCritical(void)224 void vPortEnterCritical( void )
225 {
226 /* Disable interrupts first! */
227 __disable_irq();
228
229 /* Now interrupts are disabled ulCriticalNesting can be accessed
230 directly. Increment ulCriticalNesting to keep a count of how many times
231 portENTER_CRITICAL() has been called. */
232 ulCriticalNesting++;
233 }
234 /*-----------------------------------------------------------*/
235
vPortExitCritical(void)236 void vPortExitCritical( void )
237 {
238 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
239 {
240 /* Decrement the nesting count as we are leaving a critical section. */
241 ulCriticalNesting--;
242
243 /* If the nesting level has reached zero then interrupts should be
244 re-enabled. */
245 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
246 {
247 __enable_irq();
248 }
249 }
250 }
251 /*-----------------------------------------------------------*/
252
