1 //* ---------------------------------------------------------------------------- 2 //* ATMEL Microcontroller Software Support - ROUSSET - 3 //* ---------------------------------------------------------------------------- 4 //* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR 5 //* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 6 //* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 7 //* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, 8 //* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 9 //* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 10 //* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 11 //* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 12 //* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 13 //* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 14 //* ---------------------------------------------------------------------------- 15 //* File Name : lib_AT91SAM7X256.h 16 //* Object : AT91SAM7X256 inlined functions 17 //* Generated : AT91 SW Application Group 05/20/2005 (16:22:29) 18 //* 19 //* CVS Reference : /lib_dbgu.h/1.1/Fri Jan 31 12:18:40 2003// 20 //* CVS Reference : /lib_pmc_SAM7X.h/1.1/Tue Feb 1 08:32:10 2005// 21 //* CVS Reference : /lib_VREG_6085B.h/1.1/Tue Feb 1 16:20:47 2005// 22 //* CVS Reference : /lib_rstc_6098A.h/1.1/Wed Oct 6 10:39:20 2004// 23 //* CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003// 24 //* CVS Reference : /lib_wdtc_6080A.h/1.1/Wed Oct 6 10:38:30 2004// 25 //* CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002// 26 //* CVS Reference : /lib_spi2.h/1.1/Mon Aug 25 14:23:52 2003// 27 //* CVS Reference : /lib_pitc_6079A.h/1.2/Tue Nov 9 14:43:56 2004// 28 //* CVS Reference : /lib_aic_6075b.h/1.1/Fri May 20 14:01:19 2005// 29 //* CVS Reference : /lib_aes_6149a.h/1.1/Mon Jan 17 07:43:09 2005// 30 //* CVS Reference : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004// 31 //* CVS Reference : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003// 32 //* CVS Reference : /lib_rttc_6081A.h/1.1/Wed Oct 6 10:39:38 2004// 33 //* CVS Reference : /lib_udp.h/1.4/Wed Feb 16 08:39:34 2005// 34 //* CVS Reference : /lib_des3_6150a.h/1.1/Mon Jan 17 09:19:19 2005// 35 //* CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003// 36 //* CVS Reference : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004// 37 //* CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003// 38 //* CVS Reference : /lib_can_AT91.h/1.4/Fri Oct 17 09:12:50 2003// 39 //* CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004// 40 //* CVS Reference : /lib_pdc.h/1.2/Tue Jul 2 13:29:40 2002// 41 //* ---------------------------------------------------------------------------- 42 43 #ifndef lib_AT91SAM7X256_H 44 #define lib_AT91SAM7X256_H 45 46 /* ***************************************************************************** 47 SOFTWARE API FOR AIC 48 ***************************************************************************** */ 49 #define AT91C_AIC_BRANCH_OPCODE ((void (*) ()) 0xE51FFF20) // ldr, pc, [pc, #-&F20] 50 51 //*---------------------------------------------------------------------------- 52 //* \fn AT91F_AIC_ConfigureIt 53 //* \brief Interrupt Handler Initialization 54 //*---------------------------------------------------------------------------- AT91F_AIC_ConfigureIt(AT91PS_AIC pAic,unsigned int irq_id,unsigned int priority,unsigned int src_type,void (* newHandler)(void))55__inline unsigned int AT91F_AIC_ConfigureIt ( 56 AT91PS_AIC pAic, // \arg pointer to the AIC registers 57 unsigned int irq_id, // \arg interrupt number to initialize 58 unsigned int priority, // \arg priority to give to the interrupt 59 unsigned int src_type, // \arg activation and sense of activation 60 void (*newHandler) (void) ) // \arg address of the interrupt handler 61 { 62 unsigned int oldHandler; 63 unsigned int mask ; 64 65 oldHandler = pAic->AIC_SVR[irq_id]; 66 67 mask = 0x1 << irq_id ; 68 //* Disable the interrupt on the interrupt controller 69 pAic->AIC_IDCR = mask ; 70 //* Save the interrupt handler routine pointer and the interrupt priority 71 pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ; 72 //* Store the Source Mode Register 73 pAic->AIC_SMR[irq_id] = src_type | priority ; 74 //* Clear the interrupt on the interrupt controller 75 pAic->AIC_ICCR = mask ; 76 77 return oldHandler; 78 } 79 80 //*---------------------------------------------------------------------------- 81 //* \fn AT91F_AIC_EnableIt 82 //* \brief Enable corresponding IT number 83 //*---------------------------------------------------------------------------- AT91F_AIC_EnableIt(AT91PS_AIC pAic,unsigned int irq_id)84__inline void AT91F_AIC_EnableIt ( 85 AT91PS_AIC pAic, // \arg pointer to the AIC registers 86 unsigned int irq_id ) // \arg interrupt number to initialize 87 { 88 //* Enable the interrupt on the interrupt controller 89 pAic->AIC_IECR = 0x1 << irq_id ; 90 } 91 92 //*---------------------------------------------------------------------------- 93 //* \fn AT91F_AIC_DisableIt 94 //* \brief Disable corresponding IT number 95 //*---------------------------------------------------------------------------- AT91F_AIC_DisableIt(AT91PS_AIC pAic,unsigned int irq_id)96__inline void AT91F_AIC_DisableIt ( 97 AT91PS_AIC pAic, // \arg pointer to the AIC registers 98 unsigned int irq_id ) // \arg interrupt number to initialize 99 { 100 unsigned int mask = 0x1 << irq_id; 101 //* Disable the interrupt on the interrupt controller 102 pAic->AIC_IDCR = mask ; 103 //* Clear the interrupt on the Interrupt Controller ( if one is pending ) 104 pAic->AIC_ICCR = mask ; 105 } 106 107 //*---------------------------------------------------------------------------- 108 //* \fn AT91F_AIC_ClearIt 109 //* \brief Clear corresponding IT number 110 //*---------------------------------------------------------------------------- AT91F_AIC_ClearIt(AT91PS_AIC pAic,unsigned int irq_id)111__inline void AT91F_AIC_ClearIt ( 112 AT91PS_AIC pAic, // \arg pointer to the AIC registers 113 unsigned int irq_id) // \arg interrupt number to initialize 114 { 115 //* Clear the interrupt on the Interrupt Controller ( if one is pending ) 116 pAic->AIC_ICCR = (0x1 << irq_id); 117 } 118 119 //*---------------------------------------------------------------------------- 120 //* \fn AT91F_AIC_AcknowledgeIt 121 //* \brief Acknowledge corresponding IT number 122 //*---------------------------------------------------------------------------- AT91F_AIC_AcknowledgeIt(AT91PS_AIC pAic)123__inline void AT91F_AIC_AcknowledgeIt ( 124 AT91PS_AIC pAic) // \arg pointer to the AIC registers 125 { 126 pAic->AIC_EOICR = pAic->AIC_EOICR; 127 } 128 129 //*---------------------------------------------------------------------------- 130 //* \fn AT91F_AIC_SetExceptionVector 131 //* \brief Configure vector handler 132 //*---------------------------------------------------------------------------- AT91F_AIC_SetExceptionVector(unsigned int * pVector,void (* Handler)())133__inline unsigned int AT91F_AIC_SetExceptionVector ( 134 unsigned int *pVector, // \arg pointer to the AIC registers 135 void (*Handler) () ) // \arg Interrupt Handler 136 { 137 unsigned int oldVector = *pVector; 138 139 if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE) 140 *pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE; 141 else 142 *pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000; 143 144 return oldVector; 145 } 146 147 //*---------------------------------------------------------------------------- 148 //* \fn AT91F_AIC_Trig 149 //* \brief Trig an IT 150 //*---------------------------------------------------------------------------- AT91F_AIC_Trig(AT91PS_AIC pAic,unsigned int irq_id)151__inline void AT91F_AIC_Trig ( 152 AT91PS_AIC pAic, // \arg pointer to the AIC registers 153 unsigned int irq_id) // \arg interrupt number 154 { 155 pAic->AIC_ISCR = (0x1 << irq_id) ; 156 } 157 158 //*---------------------------------------------------------------------------- 159 //* \fn AT91F_AIC_IsActive 160 //* \brief Test if an IT is active 161 //*---------------------------------------------------------------------------- AT91F_AIC_IsActive(AT91PS_AIC pAic,unsigned int irq_id)162__inline unsigned int AT91F_AIC_IsActive ( 163 AT91PS_AIC pAic, // \arg pointer to the AIC registers 164 unsigned int irq_id) // \arg Interrupt Number 165 { 166 return (pAic->AIC_ISR & (0x1 << irq_id)); 167 } 168 169 //*---------------------------------------------------------------------------- 170 //* \fn AT91F_AIC_IsPending 171 //* \brief Test if an IT is pending 172 //*---------------------------------------------------------------------------- AT91F_AIC_IsPending(AT91PS_AIC pAic,unsigned int irq_id)173__inline unsigned int AT91F_AIC_IsPending ( 174 AT91PS_AIC pAic, // \arg pointer to the AIC registers 175 unsigned int irq_id) // \arg Interrupt Number 176 { 177 return (pAic->AIC_IPR & (0x1 << irq_id)); 178 } 179 180 //*---------------------------------------------------------------------------- 181 //* \fn AT91F_AIC_Open 182 //* \brief Set exception vectors and AIC registers to default values 183 //*---------------------------------------------------------------------------- AT91F_AIC_Open(AT91PS_AIC pAic,void (* IrqHandler)(),void (* FiqHandler)(),void (* DefaultHandler)(),void (* SpuriousHandler)(),unsigned int protectMode)184__inline void AT91F_AIC_Open( 185 AT91PS_AIC pAic, // \arg pointer to the AIC registers 186 void (*IrqHandler) (), // \arg Default IRQ vector exception 187 void (*FiqHandler) (), // \arg Default FIQ vector exception 188 void (*DefaultHandler) (), // \arg Default Handler set in ISR 189 void (*SpuriousHandler) (), // \arg Default Spurious Handler 190 unsigned int protectMode) // \arg Debug Control Register 191 { 192 int i; 193 194 // Disable all interrupts and set IVR to the default handler 195 for (i = 0; i < 32; ++i) { 196 AT91F_AIC_DisableIt(pAic, i); 197 AT91F_AIC_ConfigureIt(pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler); 198 } 199 200 // Set the IRQ exception vector 201 AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler); 202 // Set the Fast Interrupt exception vector 203 AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler); 204 205 pAic->AIC_SPU = (unsigned int) SpuriousHandler; 206 pAic->AIC_DCR = protectMode; 207 } 208 /* ***************************************************************************** 209 SOFTWARE API FOR PDC 210 ***************************************************************************** */ 211 //*---------------------------------------------------------------------------- 212 //* \fn AT91F_PDC_SetNextRx 213 //* \brief Set the next receive transfer descriptor 214 //*---------------------------------------------------------------------------- AT91F_PDC_SetNextRx(AT91PS_PDC pPDC,char * address,unsigned int bytes)215__inline void AT91F_PDC_SetNextRx ( 216 AT91PS_PDC pPDC, // \arg pointer to a PDC controller 217 char *address, // \arg address to the next bloc to be received 218 unsigned int bytes) // \arg number of bytes to be received 219 { 220 pPDC->PDC_RNPR = (unsigned int) address; 221 pPDC->PDC_RNCR = bytes; 222 } 223 224 //*---------------------------------------------------------------------------- 225 //* \fn AT91F_PDC_SetNextTx 226 //* \brief Set the next transmit transfer descriptor 227 //*---------------------------------------------------------------------------- AT91F_PDC_SetNextTx(AT91PS_PDC pPDC,char * address,unsigned int bytes)228__inline void AT91F_PDC_SetNextTx ( 229 AT91PS_PDC pPDC, // \arg pointer to a PDC controller 230 char *address, // \arg address to the next bloc to be transmitted 231 unsigned int bytes) // \arg number of bytes to be transmitted 232 { 233 pPDC->PDC_TNPR = (unsigned int) address; 234 pPDC->PDC_TNCR = bytes; 235 } 236 237 //*---------------------------------------------------------------------------- 238 //* \fn AT91F_PDC_SetRx 239 //* \brief Set the receive transfer descriptor 240 //*---------------------------------------------------------------------------- AT91F_PDC_SetRx(AT91PS_PDC pPDC,char * address,unsigned int bytes)241__inline void AT91F_PDC_SetRx ( 242 AT91PS_PDC pPDC, // \arg pointer to a PDC controller 243 char *address, // \arg address to the next bloc to be received 244 unsigned int bytes) // \arg number of bytes to be received 245 { 246 pPDC->PDC_RPR = (unsigned int) address; 247 pPDC->PDC_RCR = bytes; 248 } 249 250 //*---------------------------------------------------------------------------- 251 //* \fn AT91F_PDC_SetTx 252 //* \brief Set the transmit transfer descriptor 253 //*---------------------------------------------------------------------------- AT91F_PDC_SetTx(AT91PS_PDC pPDC,char * address,unsigned int bytes)254__inline void AT91F_PDC_SetTx ( 255 AT91PS_PDC pPDC, // \arg pointer to a PDC controller 256 char *address, // \arg address to the next bloc to be transmitted 257 unsigned int bytes) // \arg number of bytes to be transmitted 258 { 259 pPDC->PDC_TPR = (unsigned int) address; 260 pPDC->PDC_TCR = bytes; 261 } 262 263 //*---------------------------------------------------------------------------- 264 //* \fn AT91F_PDC_EnableTx 265 //* \brief Enable transmit 266 //*---------------------------------------------------------------------------- AT91F_PDC_EnableTx(AT91PS_PDC pPDC)267__inline void AT91F_PDC_EnableTx ( 268 AT91PS_PDC pPDC ) // \arg pointer to a PDC controller 269 { 270 pPDC->PDC_PTCR = AT91C_PDC_TXTEN; 271 } 272 273 //*---------------------------------------------------------------------------- 274 //* \fn AT91F_PDC_EnableRx 275 //* \brief Enable receive 276 //*---------------------------------------------------------------------------- AT91F_PDC_EnableRx(AT91PS_PDC pPDC)277__inline void AT91F_PDC_EnableRx ( 278 AT91PS_PDC pPDC ) // \arg pointer to a PDC controller 279 { 280 pPDC->PDC_PTCR = AT91C_PDC_RXTEN; 281 } 282 283 //*---------------------------------------------------------------------------- 284 //* \fn AT91F_PDC_DisableTx 285 //* \brief Disable transmit 286 //*---------------------------------------------------------------------------- AT91F_PDC_DisableTx(AT91PS_PDC pPDC)287__inline void AT91F_PDC_DisableTx ( 288 AT91PS_PDC pPDC ) // \arg pointer to a PDC controller 289 { 290 pPDC->PDC_PTCR = AT91C_PDC_TXTDIS; 291 } 292 293 //*---------------------------------------------------------------------------- 294 //* \fn AT91F_PDC_DisableRx 295 //* \brief Disable receive 296 //*---------------------------------------------------------------------------- AT91F_PDC_DisableRx(AT91PS_PDC pPDC)297__inline void AT91F_PDC_DisableRx ( 298 AT91PS_PDC pPDC ) // \arg pointer to a PDC controller 299 { 300 pPDC->PDC_PTCR = AT91C_PDC_RXTDIS; 301 } 302 303 //*---------------------------------------------------------------------------- 304 //* \fn AT91F_PDC_IsTxEmpty 305 //* \brief Test if the current transfer descriptor has been sent 306 //*---------------------------------------------------------------------------- AT91F_PDC_IsTxEmpty(AT91PS_PDC pPDC)307__inline int AT91F_PDC_IsTxEmpty ( // \return return 1 if transfer is complete 308 AT91PS_PDC pPDC ) // \arg pointer to a PDC controller 309 { 310 return !(pPDC->PDC_TCR); 311 } 312 313 //*---------------------------------------------------------------------------- 314 //* \fn AT91F_PDC_IsNextTxEmpty 315 //* \brief Test if the next transfer descriptor has been moved to the current td 316 //*---------------------------------------------------------------------------- AT91F_PDC_IsNextTxEmpty(AT91PS_PDC pPDC)317__inline int AT91F_PDC_IsNextTxEmpty ( // \return return 1 if transfer is complete 318 AT91PS_PDC pPDC ) // \arg pointer to a PDC controller 319 { 320 return !(pPDC->PDC_TNCR); 321 } 322 323 //*---------------------------------------------------------------------------- 324 //* \fn AT91F_PDC_IsRxEmpty 325 //* \brief Test if the current transfer descriptor has been filled 326 //*---------------------------------------------------------------------------- AT91F_PDC_IsRxEmpty(AT91PS_PDC pPDC)327__inline int AT91F_PDC_IsRxEmpty ( // \return return 1 if transfer is complete 328 AT91PS_PDC pPDC ) // \arg pointer to a PDC controller 329 { 330 return !(pPDC->PDC_RCR); 331 } 332 333 //*---------------------------------------------------------------------------- 334 //* \fn AT91F_PDC_IsNextRxEmpty 335 //* \brief Test if the next transfer descriptor has been moved to the current td 336 //*---------------------------------------------------------------------------- AT91F_PDC_IsNextRxEmpty(AT91PS_PDC pPDC)337__inline int AT91F_PDC_IsNextRxEmpty ( // \return return 1 if transfer is complete 338 AT91PS_PDC pPDC ) // \arg pointer to a PDC controller 339 { 340 return !(pPDC->PDC_RNCR); 341 } 342 343 //*---------------------------------------------------------------------------- 344 //* \fn AT91F_PDC_Open 345 //* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX 346 //*---------------------------------------------------------------------------- AT91F_PDC_Open(AT91PS_PDC pPDC)347__inline void AT91F_PDC_Open ( 348 AT91PS_PDC pPDC) // \arg pointer to a PDC controller 349 { 350 //* Disable the RX and TX PDC transfer requests 351 AT91F_PDC_DisableRx(pPDC); 352 AT91F_PDC_DisableTx(pPDC); 353 354 //* Reset all Counter register Next buffer first 355 AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0); 356 AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0); 357 AT91F_PDC_SetTx(pPDC, (char *) 0, 0); 358 AT91F_PDC_SetRx(pPDC, (char *) 0, 0); 359 360 //* Enable the RX and TX PDC transfer requests 361 AT91F_PDC_EnableRx(pPDC); 362 AT91F_PDC_EnableTx(pPDC); 363 } 364 365 //*---------------------------------------------------------------------------- 366 //* \fn AT91F_PDC_Close 367 //* \brief Close PDC: disable TX and RX reset transfer descriptors 368 //*---------------------------------------------------------------------------- AT91F_PDC_Close(AT91PS_PDC pPDC)369__inline void AT91F_PDC_Close ( 370 AT91PS_PDC pPDC) // \arg pointer to a PDC controller 371 { 372 //* Disable the RX and TX PDC transfer requests 373 AT91F_PDC_DisableRx(pPDC); 374 AT91F_PDC_DisableTx(pPDC); 375 376 //* Reset all Counter register Next buffer first 377 AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0); 378 AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0); 379 AT91F_PDC_SetTx(pPDC, (char *) 0, 0); 380 AT91F_PDC_SetRx(pPDC, (char *) 0, 0); 381 382 } 383 384 //*---------------------------------------------------------------------------- 385 //* \fn AT91F_PDC_SendFrame 386 //* \brief Close PDC: disable TX and RX reset transfer descriptors 387 //*---------------------------------------------------------------------------- AT91F_PDC_SendFrame(AT91PS_PDC pPDC,char * pBuffer,unsigned int szBuffer,char * pNextBuffer,unsigned int szNextBuffer)388__inline unsigned int AT91F_PDC_SendFrame( 389 AT91PS_PDC pPDC, 390 char *pBuffer, 391 unsigned int szBuffer, 392 char *pNextBuffer, 393 unsigned int szNextBuffer ) 394 { 395 if (AT91F_PDC_IsTxEmpty(pPDC)) { 396 //* Buffer and next buffer can be initialized 397 AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer); 398 AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer); 399 return 2; 400 } 401 else if (AT91F_PDC_IsNextTxEmpty(pPDC)) { 402 //* Only one buffer can be initialized 403 AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer); 404 return 1; 405 } 406 else { 407 //* All buffer are in use... 408 return 0; 409 } 410 } 411 412 //*---------------------------------------------------------------------------- 413 //* \fn AT91F_PDC_ReceiveFrame 414 //* \brief Close PDC: disable TX and RX reset transfer descriptors 415 //*---------------------------------------------------------------------------- AT91F_PDC_ReceiveFrame(AT91PS_PDC pPDC,char * pBuffer,unsigned int szBuffer,char * pNextBuffer,unsigned int szNextBuffer)416__inline unsigned int AT91F_PDC_ReceiveFrame ( 417 AT91PS_PDC pPDC, 418 char *pBuffer, 419 unsigned int szBuffer, 420 char *pNextBuffer, 421 unsigned int szNextBuffer ) 422 { 423 if (AT91F_PDC_IsRxEmpty(pPDC)) { 424 //* Buffer and next buffer can be initialized 425 AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer); 426 AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer); 427 return 2; 428 } 429 else if (AT91F_PDC_IsNextRxEmpty(pPDC)) { 430 //* Only one buffer can be initialized 431 AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer); 432 return 1; 433 } 434 else { 435 //* All buffer are in use... 436 return 0; 437 } 438 } 439 /* ***************************************************************************** 440 SOFTWARE API FOR DBGU 441 ***************************************************************************** */ 442 //*---------------------------------------------------------------------------- 443 //* \fn AT91F_DBGU_InterruptEnable 444 //* \brief Enable DBGU Interrupt 445 //*---------------------------------------------------------------------------- AT91F_DBGU_InterruptEnable(AT91PS_DBGU pDbgu,unsigned int flag)446__inline void AT91F_DBGU_InterruptEnable( 447 AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller 448 unsigned int flag) // \arg dbgu interrupt to be enabled 449 { 450 pDbgu->DBGU_IER = flag; 451 } 452 453 //*---------------------------------------------------------------------------- 454 //* \fn AT91F_DBGU_InterruptDisable 455 //* \brief Disable DBGU Interrupt 456 //*---------------------------------------------------------------------------- AT91F_DBGU_InterruptDisable(AT91PS_DBGU pDbgu,unsigned int flag)457__inline void AT91F_DBGU_InterruptDisable( 458 AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller 459 unsigned int flag) // \arg dbgu interrupt to be disabled 460 { 461 pDbgu->DBGU_IDR = flag; 462 } 463 464 //*---------------------------------------------------------------------------- 465 //* \fn AT91F_DBGU_GetInterruptMaskStatus 466 //* \brief Return DBGU Interrupt Mask Status 467 //*---------------------------------------------------------------------------- AT91F_DBGU_GetInterruptMaskStatus(AT91PS_DBGU pDbgu)468__inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( // \return DBGU Interrupt Mask Status 469 AT91PS_DBGU pDbgu) // \arg pointer to a DBGU controller 470 { 471 return pDbgu->DBGU_IMR; 472 } 473 474 //*---------------------------------------------------------------------------- 475 //* \fn AT91F_DBGU_IsInterruptMasked 476 //* \brief Test if DBGU Interrupt is Masked 477 //*---------------------------------------------------------------------------- AT91F_DBGU_IsInterruptMasked(AT91PS_DBGU pDbgu,unsigned int flag)478__inline int AT91F_DBGU_IsInterruptMasked( 479 AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller 480 unsigned int flag) // \arg flag to be tested 481 { 482 return (AT91F_DBGU_GetInterruptMaskStatus(pDbgu) & flag); 483 } 484 485 /* ***************************************************************************** 486 SOFTWARE API FOR PIO 487 ***************************************************************************** */ 488 //*---------------------------------------------------------------------------- 489 //* \fn AT91F_PIO_CfgPeriph 490 //* \brief Enable pins to be drived by peripheral 491 //*---------------------------------------------------------------------------- AT91F_PIO_CfgPeriph(AT91PS_PIO pPio,unsigned int periphAEnable,unsigned int periphBEnable)492__inline void AT91F_PIO_CfgPeriph( 493 AT91PS_PIO pPio, // \arg pointer to a PIO controller 494 unsigned int periphAEnable, // \arg PERIPH A to enable 495 unsigned int periphBEnable) // \arg PERIPH B to enable 496 497 { 498 pPio->PIO_ASR = periphAEnable; 499 pPio->PIO_BSR = periphBEnable; 500 pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode 501 } 502 503 //*---------------------------------------------------------------------------- 504 //* \fn AT91F_PIO_CfgOutput 505 //* \brief Enable PIO in output mode 506 //*---------------------------------------------------------------------------- AT91F_PIO_CfgOutput(AT91PS_PIO pPio,unsigned int pioEnable)507__inline void AT91F_PIO_CfgOutput( 508 AT91PS_PIO pPio, // \arg pointer to a PIO controller 509 unsigned int pioEnable) // \arg PIO to be enabled 510 { 511 pPio->PIO_PER = pioEnable; // Set in PIO mode 512 pPio->PIO_OER = pioEnable; // Configure in Output 513 } 514 515 //*---------------------------------------------------------------------------- 516 //* \fn AT91F_PIO_CfgInput 517 //* \brief Enable PIO in input mode 518 //*---------------------------------------------------------------------------- AT91F_PIO_CfgInput(AT91PS_PIO pPio,unsigned int inputEnable)519__inline void AT91F_PIO_CfgInput( 520 AT91PS_PIO pPio, // \arg pointer to a PIO controller 521 unsigned int inputEnable) // \arg PIO to be enabled 522 { 523 // Disable output 524 pPio->PIO_ODR = inputEnable; 525 pPio->PIO_PER = inputEnable; 526 } 527 528 //*---------------------------------------------------------------------------- 529 //* \fn AT91F_PIO_CfgOpendrain 530 //* \brief Configure PIO in open drain 531 //*---------------------------------------------------------------------------- AT91F_PIO_CfgOpendrain(AT91PS_PIO pPio,unsigned int multiDrvEnable)532__inline void AT91F_PIO_CfgOpendrain( 533 AT91PS_PIO pPio, // \arg pointer to a PIO controller 534 unsigned int multiDrvEnable) // \arg pio to be configured in open drain 535 { 536 // Configure the multi-drive option 537 pPio->PIO_MDDR = ~multiDrvEnable; 538 pPio->PIO_MDER = multiDrvEnable; 539 } 540 541 //*---------------------------------------------------------------------------- 542 //* \fn AT91F_PIO_CfgPullup 543 //* \brief Enable pullup on PIO 544 //*---------------------------------------------------------------------------- AT91F_PIO_CfgPullup(AT91PS_PIO pPio,unsigned int pullupEnable)545__inline void AT91F_PIO_CfgPullup( 546 AT91PS_PIO pPio, // \arg pointer to a PIO controller 547 unsigned int pullupEnable) // \arg enable pullup on PIO 548 { 549 // Connect or not Pullup 550 pPio->PIO_PPUDR = ~pullupEnable; 551 pPio->PIO_PPUER = pullupEnable; 552 } 553 554 //*---------------------------------------------------------------------------- 555 //* \fn AT91F_PIO_CfgDirectDrive 556 //* \brief Enable direct drive on PIO 557 //*---------------------------------------------------------------------------- AT91F_PIO_CfgDirectDrive(AT91PS_PIO pPio,unsigned int directDrive)558__inline void AT91F_PIO_CfgDirectDrive( 559 AT91PS_PIO pPio, // \arg pointer to a PIO controller 560 unsigned int directDrive) // \arg PIO to be configured with direct drive 561 562 { 563 // Configure the Direct Drive 564 pPio->PIO_OWDR = ~directDrive; 565 pPio->PIO_OWER = directDrive; 566 } 567 568 //*---------------------------------------------------------------------------- 569 //* \fn AT91F_PIO_CfgInputFilter 570 //* \brief Enable input filter on input PIO 571 //*---------------------------------------------------------------------------- AT91F_PIO_CfgInputFilter(AT91PS_PIO pPio,unsigned int inputFilter)572__inline void AT91F_PIO_CfgInputFilter( 573 AT91PS_PIO pPio, // \arg pointer to a PIO controller 574 unsigned int inputFilter) // \arg PIO to be configured with input filter 575 576 { 577 // Configure the Direct Drive 578 pPio->PIO_IFDR = ~inputFilter; 579 pPio->PIO_IFER = inputFilter; 580 } 581 582 //*---------------------------------------------------------------------------- 583 //* \fn AT91F_PIO_GetInput 584 //* \brief Return PIO input value 585 //*---------------------------------------------------------------------------- AT91F_PIO_GetInput(AT91PS_PIO pPio)586__inline unsigned int AT91F_PIO_GetInput( // \return PIO input 587 AT91PS_PIO pPio) // \arg pointer to a PIO controller 588 { 589 return pPio->PIO_PDSR; 590 } 591 592 //*---------------------------------------------------------------------------- 593 //* \fn AT91F_PIO_IsInputSet 594 //* \brief Test if PIO is input flag is active 595 //*---------------------------------------------------------------------------- AT91F_PIO_IsInputSet(AT91PS_PIO pPio,unsigned int flag)596__inline int AT91F_PIO_IsInputSet( 597 AT91PS_PIO pPio, // \arg pointer to a PIO controller 598 unsigned int flag) // \arg flag to be tested 599 { 600 return (AT91F_PIO_GetInput(pPio) & flag); 601 } 602 603 604 //*---------------------------------------------------------------------------- 605 //* \fn AT91F_PIO_SetOutput 606 //* \brief Set to 1 output PIO 607 //*---------------------------------------------------------------------------- AT91F_PIO_SetOutput(AT91PS_PIO pPio,unsigned int flag)608__inline void AT91F_PIO_SetOutput( 609 AT91PS_PIO pPio, // \arg pointer to a PIO controller 610 unsigned int flag) // \arg output to be set 611 { 612 pPio->PIO_SODR = flag; 613 } 614 615 //*---------------------------------------------------------------------------- 616 //* \fn AT91F_PIO_ClearOutput 617 //* \brief Set to 0 output PIO 618 //*---------------------------------------------------------------------------- AT91F_PIO_ClearOutput(AT91PS_PIO pPio,unsigned int flag)619__inline void AT91F_PIO_ClearOutput( 620 AT91PS_PIO pPio, // \arg pointer to a PIO controller 621 unsigned int flag) // \arg output to be cleared 622 { 623 pPio->PIO_CODR = flag; 624 } 625 626 //*---------------------------------------------------------------------------- 627 //* \fn AT91F_PIO_ForceOutput 628 //* \brief Force output when Direct drive option is enabled 629 //*---------------------------------------------------------------------------- AT91F_PIO_ForceOutput(AT91PS_PIO pPio,unsigned int flag)630__inline void AT91F_PIO_ForceOutput( 631 AT91PS_PIO pPio, // \arg pointer to a PIO controller 632 unsigned int flag) // \arg output to be forced 633 { 634 pPio->PIO_ODSR = flag; 635 } 636 637 //*---------------------------------------------------------------------------- 638 //* \fn AT91F_PIO_Enable 639 //* \brief Enable PIO 640 //*---------------------------------------------------------------------------- AT91F_PIO_Enable(AT91PS_PIO pPio,unsigned int flag)641__inline void AT91F_PIO_Enable( 642 AT91PS_PIO pPio, // \arg pointer to a PIO controller 643 unsigned int flag) // \arg pio to be enabled 644 { 645 pPio->PIO_PER = flag; 646 } 647 648 //*---------------------------------------------------------------------------- 649 //* \fn AT91F_PIO_Disable 650 //* \brief Disable PIO 651 //*---------------------------------------------------------------------------- AT91F_PIO_Disable(AT91PS_PIO pPio,unsigned int flag)652__inline void AT91F_PIO_Disable( 653 AT91PS_PIO pPio, // \arg pointer to a PIO controller 654 unsigned int flag) // \arg pio to be disabled 655 { 656 pPio->PIO_PDR = flag; 657 } 658 659 //*---------------------------------------------------------------------------- 660 //* \fn AT91F_PIO_GetStatus 661 //* \brief Return PIO Status 662 //*---------------------------------------------------------------------------- AT91F_PIO_GetStatus(AT91PS_PIO pPio)663__inline unsigned int AT91F_PIO_GetStatus( // \return PIO Status 664 AT91PS_PIO pPio) // \arg pointer to a PIO controller 665 { 666 return pPio->PIO_PSR; 667 } 668 669 //*---------------------------------------------------------------------------- 670 //* \fn AT91F_PIO_IsSet 671 //* \brief Test if PIO is Set 672 //*---------------------------------------------------------------------------- AT91F_PIO_IsSet(AT91PS_PIO pPio,unsigned int flag)673__inline int AT91F_PIO_IsSet( 674 AT91PS_PIO pPio, // \arg pointer to a PIO controller 675 unsigned int flag) // \arg flag to be tested 676 { 677 return (AT91F_PIO_GetStatus(pPio) & flag); 678 } 679 680 //*---------------------------------------------------------------------------- 681 //* \fn AT91F_PIO_OutputEnable 682 //* \brief Output Enable PIO 683 //*---------------------------------------------------------------------------- AT91F_PIO_OutputEnable(AT91PS_PIO pPio,unsigned int flag)684__inline void AT91F_PIO_OutputEnable( 685 AT91PS_PIO pPio, // \arg pointer to a PIO controller 686 unsigned int flag) // \arg pio output to be enabled 687 { 688 pPio->PIO_OER = flag; 689 } 690 691 //*---------------------------------------------------------------------------- 692 //* \fn AT91F_PIO_OutputDisable 693 //* \brief Output Enable PIO 694 //*---------------------------------------------------------------------------- AT91F_PIO_OutputDisable(AT91PS_PIO pPio,unsigned int flag)695__inline void AT91F_PIO_OutputDisable( 696 AT91PS_PIO pPio, // \arg pointer to a PIO controller 697 unsigned int flag) // \arg pio output to be disabled 698 { 699 pPio->PIO_ODR = flag; 700 } 701 702 //*---------------------------------------------------------------------------- 703 //* \fn AT91F_PIO_GetOutputStatus 704 //* \brief Return PIO Output Status 705 //*---------------------------------------------------------------------------- AT91F_PIO_GetOutputStatus(AT91PS_PIO pPio)706__inline unsigned int AT91F_PIO_GetOutputStatus( // \return PIO Output Status 707 AT91PS_PIO pPio) // \arg pointer to a PIO controller 708 { 709 return pPio->PIO_OSR; 710 } 711 712 //*---------------------------------------------------------------------------- 713 //* \fn AT91F_PIO_IsOuputSet 714 //* \brief Test if PIO Output is Set 715 //*---------------------------------------------------------------------------- AT91F_PIO_IsOutputSet(AT91PS_PIO pPio,unsigned int flag)716__inline int AT91F_PIO_IsOutputSet( 717 AT91PS_PIO pPio, // \arg pointer to a PIO controller 718 unsigned int flag) // \arg flag to be tested 719 { 720 return (AT91F_PIO_GetOutputStatus(pPio) & flag); 721 } 722 723 //*---------------------------------------------------------------------------- 724 //* \fn AT91F_PIO_InputFilterEnable 725 //* \brief Input Filter Enable PIO 726 //*---------------------------------------------------------------------------- AT91F_PIO_InputFilterEnable(AT91PS_PIO pPio,unsigned int flag)727__inline void AT91F_PIO_InputFilterEnable( 728 AT91PS_PIO pPio, // \arg pointer to a PIO controller 729 unsigned int flag) // \arg pio input filter to be enabled 730 { 731 pPio->PIO_IFER = flag; 732 } 733 734 //*---------------------------------------------------------------------------- 735 //* \fn AT91F_PIO_InputFilterDisable 736 //* \brief Input Filter Disable PIO 737 //*---------------------------------------------------------------------------- AT91F_PIO_InputFilterDisable(AT91PS_PIO pPio,unsigned int flag)738__inline void AT91F_PIO_InputFilterDisable( 739 AT91PS_PIO pPio, // \arg pointer to a PIO controller 740 unsigned int flag) // \arg pio input filter to be disabled 741 { 742 pPio->PIO_IFDR = flag; 743 } 744 745 //*---------------------------------------------------------------------------- 746 //* \fn AT91F_PIO_GetInputFilterStatus 747 //* \brief Return PIO Input Filter Status 748 //*---------------------------------------------------------------------------- AT91F_PIO_GetInputFilterStatus(AT91PS_PIO pPio)749__inline unsigned int AT91F_PIO_GetInputFilterStatus( // \return PIO Input Filter Status 750 AT91PS_PIO pPio) // \arg pointer to a PIO controller 751 { 752 return pPio->PIO_IFSR; 753 } 754 755 //*---------------------------------------------------------------------------- 756 //* \fn AT91F_PIO_IsInputFilterSet 757 //* \brief Test if PIO Input filter is Set 758 //*---------------------------------------------------------------------------- AT91F_PIO_IsInputFilterSet(AT91PS_PIO pPio,unsigned int flag)759__inline int AT91F_PIO_IsInputFilterSet( 760 AT91PS_PIO pPio, // \arg pointer to a PIO controller 761 unsigned int flag) // \arg flag to be tested 762 { 763 return (AT91F_PIO_GetInputFilterStatus(pPio) & flag); 764 } 765 766 //*---------------------------------------------------------------------------- 767 //* \fn AT91F_PIO_GetOutputDataStatus 768 //* \brief Return PIO Output Data Status 769 //*---------------------------------------------------------------------------- AT91F_PIO_GetOutputDataStatus(AT91PS_PIO pPio)770__inline unsigned int AT91F_PIO_GetOutputDataStatus( // \return PIO Output Data Status 771 AT91PS_PIO pPio) // \arg pointer to a PIO controller 772 { 773 return pPio->PIO_ODSR; 774 } 775 776 //*---------------------------------------------------------------------------- 777 //* \fn AT91F_PIO_InterruptEnable 778 //* \brief Enable PIO Interrupt 779 //*---------------------------------------------------------------------------- AT91F_PIO_InterruptEnable(AT91PS_PIO pPio,unsigned int flag)780__inline void AT91F_PIO_InterruptEnable( 781 AT91PS_PIO pPio, // \arg pointer to a PIO controller 782 unsigned int flag) // \arg pio interrupt to be enabled 783 { 784 pPio->PIO_IER = flag; 785 } 786 787 //*---------------------------------------------------------------------------- 788 //* \fn AT91F_PIO_InterruptDisable 789 //* \brief Disable PIO Interrupt 790 //*---------------------------------------------------------------------------- AT91F_PIO_InterruptDisable(AT91PS_PIO pPio,unsigned int flag)791__inline void AT91F_PIO_InterruptDisable( 792 AT91PS_PIO pPio, // \arg pointer to a PIO controller 793 unsigned int flag) // \arg pio interrupt to be disabled 794 { 795 pPio->PIO_IDR = flag; 796 } 797 798 //*---------------------------------------------------------------------------- 799 //* \fn AT91F_PIO_GetInterruptMaskStatus 800 //* \brief Return PIO Interrupt Mask Status 801 //*---------------------------------------------------------------------------- AT91F_PIO_GetInterruptMaskStatus(AT91PS_PIO pPio)802__inline unsigned int AT91F_PIO_GetInterruptMaskStatus( // \return PIO Interrupt Mask Status 803 AT91PS_PIO pPio) // \arg pointer to a PIO controller 804 { 805 return pPio->PIO_IMR; 806 } 807 808 //*---------------------------------------------------------------------------- 809 //* \fn AT91F_PIO_GetInterruptStatus 810 //* \brief Return PIO Interrupt Status 811 //*---------------------------------------------------------------------------- AT91F_PIO_GetInterruptStatus(AT91PS_PIO pPio)812__inline unsigned int AT91F_PIO_GetInterruptStatus( // \return PIO Interrupt Status 813 AT91PS_PIO pPio) // \arg pointer to a PIO controller 814 { 815 return pPio->PIO_ISR; 816 } 817 818 //*---------------------------------------------------------------------------- 819 //* \fn AT91F_PIO_IsInterruptMasked 820 //* \brief Test if PIO Interrupt is Masked 821 //*---------------------------------------------------------------------------- AT91F_PIO_IsInterruptMasked(AT91PS_PIO pPio,unsigned int flag)822__inline int AT91F_PIO_IsInterruptMasked( 823 AT91PS_PIO pPio, // \arg pointer to a PIO controller 824 unsigned int flag) // \arg flag to be tested 825 { 826 return (AT91F_PIO_GetInterruptMaskStatus(pPio) & flag); 827 } 828 829 //*---------------------------------------------------------------------------- 830 //* \fn AT91F_PIO_IsInterruptSet 831 //* \brief Test if PIO Interrupt is Set 832 //*---------------------------------------------------------------------------- AT91F_PIO_IsInterruptSet(AT91PS_PIO pPio,unsigned int flag)833__inline int AT91F_PIO_IsInterruptSet( 834 AT91PS_PIO pPio, // \arg pointer to a PIO controller 835 unsigned int flag) // \arg flag to be tested 836 { 837 return (AT91F_PIO_GetInterruptStatus(pPio) & flag); 838 } 839 840 //*---------------------------------------------------------------------------- 841 //* \fn AT91F_PIO_MultiDriverEnable 842 //* \brief Multi Driver Enable PIO 843 //*---------------------------------------------------------------------------- AT91F_PIO_MultiDriverEnable(AT91PS_PIO pPio,unsigned int flag)844__inline void AT91F_PIO_MultiDriverEnable( 845 AT91PS_PIO pPio, // \arg pointer to a PIO controller 846 unsigned int flag) // \arg pio to be enabled 847 { 848 pPio->PIO_MDER = flag; 849 } 850 851 //*---------------------------------------------------------------------------- 852 //* \fn AT91F_PIO_MultiDriverDisable 853 //* \brief Multi Driver Disable PIO 854 //*---------------------------------------------------------------------------- AT91F_PIO_MultiDriverDisable(AT91PS_PIO pPio,unsigned int flag)855__inline void AT91F_PIO_MultiDriverDisable( 856 AT91PS_PIO pPio, // \arg pointer to a PIO controller 857 unsigned int flag) // \arg pio to be disabled 858 { 859 pPio->PIO_MDDR = flag; 860 } 861 862 //*---------------------------------------------------------------------------- 863 //* \fn AT91F_PIO_GetMultiDriverStatus 864 //* \brief Return PIO Multi Driver Status 865 //*---------------------------------------------------------------------------- AT91F_PIO_GetMultiDriverStatus(AT91PS_PIO pPio)866__inline unsigned int AT91F_PIO_GetMultiDriverStatus( // \return PIO Multi Driver Status 867 AT91PS_PIO pPio) // \arg pointer to a PIO controller 868 { 869 return pPio->PIO_MDSR; 870 } 871 872 //*---------------------------------------------------------------------------- 873 //* \fn AT91F_PIO_IsMultiDriverSet 874 //* \brief Test if PIO MultiDriver is Set 875 //*---------------------------------------------------------------------------- AT91F_PIO_IsMultiDriverSet(AT91PS_PIO pPio,unsigned int flag)876__inline int AT91F_PIO_IsMultiDriverSet( 877 AT91PS_PIO pPio, // \arg pointer to a PIO controller 878 unsigned int flag) // \arg flag to be tested 879 { 880 return (AT91F_PIO_GetMultiDriverStatus(pPio) & flag); 881 } 882 883 //*---------------------------------------------------------------------------- 884 //* \fn AT91F_PIO_A_RegisterSelection 885 //* \brief PIO A Register Selection 886 //*---------------------------------------------------------------------------- AT91F_PIO_A_RegisterSelection(AT91PS_PIO pPio,unsigned int flag)887__inline void AT91F_PIO_A_RegisterSelection( 888 AT91PS_PIO pPio, // \arg pointer to a PIO controller 889 unsigned int flag) // \arg pio A register selection 890 { 891 pPio->PIO_ASR = flag; 892 } 893 894 //*---------------------------------------------------------------------------- 895 //* \fn AT91F_PIO_B_RegisterSelection 896 //* \brief PIO B Register Selection 897 //*---------------------------------------------------------------------------- AT91F_PIO_B_RegisterSelection(AT91PS_PIO pPio,unsigned int flag)898__inline void AT91F_PIO_B_RegisterSelection( 899 AT91PS_PIO pPio, // \arg pointer to a PIO controller 900 unsigned int flag) // \arg pio B register selection 901 { 902 pPio->PIO_BSR = flag; 903 } 904 905 //*---------------------------------------------------------------------------- 906 //* \fn AT91F_PIO_Get_AB_RegisterStatus 907 //* \brief Return PIO Interrupt Status 908 //*---------------------------------------------------------------------------- AT91F_PIO_Get_AB_RegisterStatus(AT91PS_PIO pPio)909__inline unsigned int AT91F_PIO_Get_AB_RegisterStatus( // \return PIO AB Register Status 910 AT91PS_PIO pPio) // \arg pointer to a PIO controller 911 { 912 return pPio->PIO_ABSR; 913 } 914 915 //*---------------------------------------------------------------------------- 916 //* \fn AT91F_PIO_IsAB_RegisterSet 917 //* \brief Test if PIO AB Register is Set 918 //*---------------------------------------------------------------------------- AT91F_PIO_IsAB_RegisterSet(AT91PS_PIO pPio,unsigned int flag)919__inline int AT91F_PIO_IsAB_RegisterSet( 920 AT91PS_PIO pPio, // \arg pointer to a PIO controller 921 unsigned int flag) // \arg flag to be tested 922 { 923 return (AT91F_PIO_Get_AB_RegisterStatus(pPio) & flag); 924 } 925 926 //*---------------------------------------------------------------------------- 927 //* \fn AT91F_PIO_OutputWriteEnable 928 //* \brief Output Write Enable PIO 929 //*---------------------------------------------------------------------------- AT91F_PIO_OutputWriteEnable(AT91PS_PIO pPio,unsigned int flag)930__inline void AT91F_PIO_OutputWriteEnable( 931 AT91PS_PIO pPio, // \arg pointer to a PIO controller 932 unsigned int flag) // \arg pio output write to be enabled 933 { 934 pPio->PIO_OWER = flag; 935 } 936 937 //*---------------------------------------------------------------------------- 938 //* \fn AT91F_PIO_OutputWriteDisable 939 //* \brief Output Write Disable PIO 940 //*---------------------------------------------------------------------------- AT91F_PIO_OutputWriteDisable(AT91PS_PIO pPio,unsigned int flag)941__inline void AT91F_PIO_OutputWriteDisable( 942 AT91PS_PIO pPio, // \arg pointer to a PIO controller 943 unsigned int flag) // \arg pio output write to be disabled 944 { 945 pPio->PIO_OWDR = flag; 946 } 947 948 //*---------------------------------------------------------------------------- 949 //* \fn AT91F_PIO_GetOutputWriteStatus 950 //* \brief Return PIO Output Write Status 951 //*---------------------------------------------------------------------------- AT91F_PIO_GetOutputWriteStatus(AT91PS_PIO pPio)952__inline unsigned int AT91F_PIO_GetOutputWriteStatus( // \return PIO Output Write Status 953 AT91PS_PIO pPio) // \arg pointer to a PIO controller 954 { 955 return pPio->PIO_OWSR; 956 } 957 958 //*---------------------------------------------------------------------------- 959 //* \fn AT91F_PIO_IsOutputWriteSet 960 //* \brief Test if PIO OutputWrite is Set 961 //*---------------------------------------------------------------------------- AT91F_PIO_IsOutputWriteSet(AT91PS_PIO pPio,unsigned int flag)962__inline int AT91F_PIO_IsOutputWriteSet( 963 AT91PS_PIO pPio, // \arg pointer to a PIO controller 964 unsigned int flag) // \arg flag to be tested 965 { 966 return (AT91F_PIO_GetOutputWriteStatus(pPio) & flag); 967 } 968 969 //*---------------------------------------------------------------------------- 970 //* \fn AT91F_PIO_GetCfgPullup 971 //* \brief Return PIO Configuration Pullup 972 //*---------------------------------------------------------------------------- AT91F_PIO_GetCfgPullup(AT91PS_PIO pPio)973__inline unsigned int AT91F_PIO_GetCfgPullup( // \return PIO Configuration Pullup 974 AT91PS_PIO pPio) // \arg pointer to a PIO controller 975 { 976 return pPio->PIO_PPUSR; 977 } 978 979 //*---------------------------------------------------------------------------- 980 //* \fn AT91F_PIO_IsOutputDataStatusSet 981 //* \brief Test if PIO Output Data Status is Set 982 //*---------------------------------------------------------------------------- AT91F_PIO_IsOutputDataStatusSet(AT91PS_PIO pPio,unsigned int flag)983__inline int AT91F_PIO_IsOutputDataStatusSet( 984 AT91PS_PIO pPio, // \arg pointer to a PIO controller 985 unsigned int flag) // \arg flag to be tested 986 { 987 return (AT91F_PIO_GetOutputDataStatus(pPio) & flag); 988 } 989 990 //*---------------------------------------------------------------------------- 991 //* \fn AT91F_PIO_IsCfgPullupStatusSet 992 //* \brief Test if PIO Configuration Pullup Status is Set 993 //*---------------------------------------------------------------------------- AT91F_PIO_IsCfgPullupStatusSet(AT91PS_PIO pPio,unsigned int flag)994__inline int AT91F_PIO_IsCfgPullupStatusSet( 995 AT91PS_PIO pPio, // \arg pointer to a PIO controller 996 unsigned int flag) // \arg flag to be tested 997 { 998 return (~AT91F_PIO_GetCfgPullup(pPio) & flag); 999 } 1000 1001 /* ***************************************************************************** 1002 SOFTWARE API FOR PMC 1003 ***************************************************************************** */ 1004 //*---------------------------------------------------------------------------- 1005 //* \fn AT91F_PMC_CfgSysClkEnableReg 1006 //* \brief Configure the System Clock Enable Register of the PMC controller 1007 //*---------------------------------------------------------------------------- AT91F_PMC_CfgSysClkEnableReg(AT91PS_PMC pPMC,unsigned int mode)1008__inline void AT91F_PMC_CfgSysClkEnableReg ( 1009 AT91PS_PMC pPMC, // \arg pointer to PMC controller 1010 unsigned int mode) 1011 { 1012 //* Write to the SCER register 1013 pPMC->PMC_SCER = mode; 1014 } 1015 1016 //*---------------------------------------------------------------------------- 1017 //* \fn AT91F_PMC_CfgSysClkDisableReg 1018 //* \brief Configure the System Clock Disable Register of the PMC controller 1019 //*---------------------------------------------------------------------------- AT91F_PMC_CfgSysClkDisableReg(AT91PS_PMC pPMC,unsigned int mode)1020__inline void AT91F_PMC_CfgSysClkDisableReg ( 1021 AT91PS_PMC pPMC, // \arg pointer to PMC controller 1022 unsigned int mode) 1023 { 1024 //* Write to the SCDR register 1025 pPMC->PMC_SCDR = mode; 1026 } 1027 1028 //*---------------------------------------------------------------------------- 1029 //* \fn AT91F_PMC_GetSysClkStatusReg 1030 //* \brief Return the System Clock Status Register of the PMC controller 1031 //*---------------------------------------------------------------------------- AT91F_PMC_GetSysClkStatusReg(AT91PS_PMC pPMC)1032__inline unsigned int AT91F_PMC_GetSysClkStatusReg ( 1033 AT91PS_PMC pPMC // pointer to a CAN controller 1034 ) 1035 { 1036 return pPMC->PMC_SCSR; 1037 } 1038 1039 //*---------------------------------------------------------------------------- 1040 //* \fn AT91F_PMC_EnablePeriphClock 1041 //* \brief Enable peripheral clock 1042 //*---------------------------------------------------------------------------- AT91F_PMC_EnablePeriphClock(AT91PS_PMC pPMC,unsigned int periphIds)1043__inline void AT91F_PMC_EnablePeriphClock ( 1044 AT91PS_PMC pPMC, // \arg pointer to PMC controller 1045 unsigned int periphIds) // \arg IDs of peripherals to enable 1046 { 1047 pPMC->PMC_PCER = periphIds; 1048 } 1049 1050 //*---------------------------------------------------------------------------- 1051 //* \fn AT91F_PMC_DisablePeriphClock 1052 //* \brief Disable peripheral clock 1053 //*---------------------------------------------------------------------------- AT91F_PMC_DisablePeriphClock(AT91PS_PMC pPMC,unsigned int periphIds)1054__inline void AT91F_PMC_DisablePeriphClock ( 1055 AT91PS_PMC pPMC, // \arg pointer to PMC controller 1056 unsigned int periphIds) // \arg IDs of peripherals to enable 1057 { 1058 pPMC->PMC_PCDR = periphIds; 1059 } 1060 1061 //*---------------------------------------------------------------------------- 1062 //* \fn AT91F_PMC_GetPeriphClock 1063 //* \brief Get peripheral clock status 1064 //*---------------------------------------------------------------------------- AT91F_PMC_GetPeriphClock(AT91PS_PMC pPMC)1065__inline unsigned int AT91F_PMC_GetPeriphClock ( 1066 AT91PS_PMC pPMC) // \arg pointer to PMC controller 1067 { 1068 return pPMC->PMC_PCSR; 1069 } 1070 1071 //*---------------------------------------------------------------------------- 1072 //* \fn AT91F_CKGR_CfgMainOscillatorReg 1073 //* \brief Cfg the main oscillator 1074 //*---------------------------------------------------------------------------- AT91F_CKGR_CfgMainOscillatorReg(AT91PS_CKGR pCKGR,unsigned int mode)1075__inline void AT91F_CKGR_CfgMainOscillatorReg ( 1076 AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller 1077 unsigned int mode) 1078 { 1079 pCKGR->CKGR_MOR = mode; 1080 } 1081 1082 //*---------------------------------------------------------------------------- 1083 //* \fn AT91F_CKGR_GetMainOscillatorReg 1084 //* \brief Cfg the main oscillator 1085 //*---------------------------------------------------------------------------- AT91F_CKGR_GetMainOscillatorReg(AT91PS_CKGR pCKGR)1086__inline unsigned int AT91F_CKGR_GetMainOscillatorReg ( 1087 AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller 1088 { 1089 return pCKGR->CKGR_MOR; 1090 } 1091 1092 //*---------------------------------------------------------------------------- 1093 //* \fn AT91F_CKGR_EnableMainOscillator 1094 //* \brief Enable the main oscillator 1095 //*---------------------------------------------------------------------------- AT91F_CKGR_EnableMainOscillator(AT91PS_CKGR pCKGR)1096__inline void AT91F_CKGR_EnableMainOscillator( 1097 AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller 1098 { 1099 pCKGR->CKGR_MOR |= AT91C_CKGR_MOSCEN; 1100 } 1101 1102 //*---------------------------------------------------------------------------- 1103 //* \fn AT91F_CKGR_DisableMainOscillator 1104 //* \brief Disable the main oscillator 1105 //*---------------------------------------------------------------------------- AT91F_CKGR_DisableMainOscillator(AT91PS_CKGR pCKGR)1106__inline void AT91F_CKGR_DisableMainOscillator ( 1107 AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller 1108 { 1109 pCKGR->CKGR_MOR &= ~AT91C_CKGR_MOSCEN; 1110 } 1111 1112 //*---------------------------------------------------------------------------- 1113 //* \fn AT91F_CKGR_CfgMainOscStartUpTime 1114 //* \brief Cfg MOR Register according to the main osc startup time 1115 //*---------------------------------------------------------------------------- AT91F_CKGR_CfgMainOscStartUpTime(AT91PS_CKGR pCKGR,unsigned int startup_time,unsigned int slowClock)1116__inline void AT91F_CKGR_CfgMainOscStartUpTime ( 1117 AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller 1118 unsigned int startup_time, // \arg main osc startup time in microsecond (us) 1119 unsigned int slowClock) // \arg slowClock in Hz 1120 { 1121 pCKGR->CKGR_MOR &= ~AT91C_CKGR_OSCOUNT; 1122 pCKGR->CKGR_MOR |= ((slowClock * startup_time)/(8*1000000)) << 8; 1123 } 1124 1125 //*---------------------------------------------------------------------------- 1126 //* \fn AT91F_CKGR_GetMainClockFreqReg 1127 //* \brief Cfg the main oscillator 1128 //*---------------------------------------------------------------------------- AT91F_CKGR_GetMainClockFreqReg(AT91PS_CKGR pCKGR)1129__inline unsigned int AT91F_CKGR_GetMainClockFreqReg ( 1130 AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller 1131 { 1132 return pCKGR->CKGR_MCFR; 1133 } 1134 1135 //*---------------------------------------------------------------------------- 1136 //* \fn AT91F_CKGR_GetMainClock 1137 //* \brief Return Main clock in Hz 1138 //*---------------------------------------------------------------------------- AT91F_CKGR_GetMainClock(AT91PS_CKGR pCKGR,unsigned int slowClock)1139__inline unsigned int AT91F_CKGR_GetMainClock ( 1140 AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller 1141 unsigned int slowClock) // \arg slowClock in Hz 1142 { 1143 return ((pCKGR->CKGR_MCFR & AT91C_CKGR_MAINF) * slowClock) >> 4; 1144 } 1145 1146 //*---------------------------------------------------------------------------- 1147 //* \fn AT91F_PMC_CfgMCKReg 1148 //* \brief Cfg Master Clock Register 1149 //*---------------------------------------------------------------------------- AT91F_PMC_CfgMCKReg(AT91PS_PMC pPMC,unsigned int mode)1150__inline void AT91F_PMC_CfgMCKReg ( 1151 AT91PS_PMC pPMC, // \arg pointer to PMC controller 1152 unsigned int mode) 1153 { 1154 pPMC->PMC_MCKR = mode; 1155 } 1156 1157 //*---------------------------------------------------------------------------- 1158 //* \fn AT91F_PMC_GetMCKReg 1159 //* \brief Return Master Clock Register 1160 //*---------------------------------------------------------------------------- AT91F_PMC_GetMCKReg(AT91PS_PMC pPMC)1161__inline unsigned int AT91F_PMC_GetMCKReg( 1162 AT91PS_PMC pPMC) // \arg pointer to PMC controller 1163 { 1164 return pPMC->PMC_MCKR; 1165 } 1166 1167 //*------------------------------------------------------------------------------ 1168 //* \fn AT91F_PMC_GetMasterClock 1169 //* \brief Return master clock in Hz which correponds to processor clock for ARM7 1170 //*------------------------------------------------------------------------------ AT91F_PMC_GetMasterClock(AT91PS_PMC pPMC,AT91PS_CKGR pCKGR,unsigned int slowClock)1171__inline unsigned int AT91F_PMC_GetMasterClock ( 1172 AT91PS_PMC pPMC, // \arg pointer to PMC controller 1173 AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller 1174 unsigned int slowClock) // \arg slowClock in Hz 1175 { 1176 unsigned int reg = pPMC->PMC_MCKR; 1177 unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2)); 1178 unsigned int pllDivider, pllMultiplier; 1179 1180 switch (reg & AT91C_PMC_CSS) { 1181 case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected 1182 return slowClock / prescaler; 1183 case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected 1184 return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler; 1185 case AT91C_PMC_CSS_PLL_CLK: // PLLB clock is selected 1186 reg = pCKGR->CKGR_PLLR; 1187 pllDivider = (reg & AT91C_CKGR_DIV); 1188 pllMultiplier = ((reg & AT91C_CKGR_MUL) >> 16) + 1; 1189 return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler; 1190 } 1191 return 0; 1192 } 1193 1194 //*---------------------------------------------------------------------------- 1195 //* \fn AT91F_PMC_EnablePCK 1196 //* \brief Enable peripheral clock 1197 //*---------------------------------------------------------------------------- AT91F_PMC_EnablePCK(AT91PS_PMC pPMC,unsigned int pck,unsigned int mode)1198__inline void AT91F_PMC_EnablePCK ( 1199 AT91PS_PMC pPMC, // \arg pointer to PMC controller 1200 unsigned int pck, // \arg Peripheral clock identifier 0 .. 7 1201 unsigned int mode) 1202 { 1203 pPMC->PMC_PCKR[pck] = mode; 1204 pPMC->PMC_SCER = (1 << pck) << 8; 1205 } 1206 1207 //*---------------------------------------------------------------------------- 1208 //* \fn AT91F_PMC_DisablePCK 1209 //* \brief Enable peripheral clock 1210 //*---------------------------------------------------------------------------- AT91F_PMC_DisablePCK(AT91PS_PMC pPMC,unsigned int pck)1211__inline void AT91F_PMC_DisablePCK ( 1212 AT91PS_PMC pPMC, // \arg pointer to PMC controller 1213 unsigned int pck) // \arg Peripheral clock identifier 0 .. 7 1214 { 1215 pPMC->PMC_SCDR = (1 << pck) << 8; 1216 } 1217 1218 //*---------------------------------------------------------------------------- 1219 //* \fn AT91F_PMC_EnableIt 1220 //* \brief Enable PMC interrupt 1221 //*---------------------------------------------------------------------------- AT91F_PMC_EnableIt(AT91PS_PMC pPMC,unsigned int flag)1222__inline void AT91F_PMC_EnableIt ( 1223 AT91PS_PMC pPMC, // pointer to a PMC controller 1224 unsigned int flag) // IT to be enabled 1225 { 1226 //* Write to the IER register 1227 pPMC->PMC_IER = flag; 1228 } 1229 1230 //*---------------------------------------------------------------------------- 1231 //* \fn AT91F_PMC_DisableIt 1232 //* \brief Disable PMC interrupt 1233 //*---------------------------------------------------------------------------- AT91F_PMC_DisableIt(AT91PS_PMC pPMC,unsigned int flag)1234__inline void AT91F_PMC_DisableIt ( 1235 AT91PS_PMC pPMC, // pointer to a PMC controller 1236 unsigned int flag) // IT to be disabled 1237 { 1238 //* Write to the IDR register 1239 pPMC->PMC_IDR = flag; 1240 } 1241 1242 //*---------------------------------------------------------------------------- 1243 //* \fn AT91F_PMC_GetStatus 1244 //* \brief Return PMC Interrupt Status 1245 //*---------------------------------------------------------------------------- AT91F_PMC_GetStatus(AT91PS_PMC pPMC)1246__inline unsigned int AT91F_PMC_GetStatus( // \return PMC Interrupt Status 1247 AT91PS_PMC pPMC) // pointer to a PMC controller 1248 { 1249 return pPMC->PMC_SR; 1250 } 1251 1252 //*---------------------------------------------------------------------------- 1253 //* \fn AT91F_PMC_GetInterruptMaskStatus 1254 //* \brief Return PMC Interrupt Mask Status 1255 //*---------------------------------------------------------------------------- AT91F_PMC_GetInterruptMaskStatus(AT91PS_PMC pPMC)1256__inline unsigned int AT91F_PMC_GetInterruptMaskStatus( // \return PMC Interrupt Mask Status 1257 AT91PS_PMC pPMC) // pointer to a PMC controller 1258 { 1259 return pPMC->PMC_IMR; 1260 } 1261 1262 //*---------------------------------------------------------------------------- 1263 //* \fn AT91F_PMC_IsInterruptMasked 1264 //* \brief Test if PMC Interrupt is Masked 1265 //*---------------------------------------------------------------------------- AT91F_PMC_IsInterruptMasked(AT91PS_PMC pPMC,unsigned int flag)1266__inline unsigned int AT91F_PMC_IsInterruptMasked( 1267 AT91PS_PMC pPMC, // \arg pointer to a PMC controller 1268 unsigned int flag) // \arg flag to be tested 1269 { 1270 return (AT91F_PMC_GetInterruptMaskStatus(pPMC) & flag); 1271 } 1272 1273 //*---------------------------------------------------------------------------- 1274 //* \fn AT91F_PMC_IsStatusSet 1275 //* \brief Test if PMC Status is Set 1276 //*---------------------------------------------------------------------------- AT91F_PMC_IsStatusSet(AT91PS_PMC pPMC,unsigned int flag)1277__inline unsigned int AT91F_PMC_IsStatusSet( 1278 AT91PS_PMC pPMC, // \arg pointer to a PMC controller 1279 unsigned int flag) // \arg flag to be tested 1280 { 1281 return (AT91F_PMC_GetStatus(pPMC) & flag); 1282 }/* ***************************************************************************** 1283 SOFTWARE API FOR RSTC 1284 ***************************************************************************** */ 1285 //*---------------------------------------------------------------------------- 1286 //* \fn AT91F_RSTSoftReset 1287 //* \brief Start Software Reset 1288 //*---------------------------------------------------------------------------- AT91F_RSTSoftReset(AT91PS_RSTC pRSTC,unsigned int reset)1289__inline void AT91F_RSTSoftReset( 1290 AT91PS_RSTC pRSTC, 1291 unsigned int reset) 1292 { 1293 pRSTC->RSTC_RCR = (0xA5000000 | reset); 1294 } 1295 1296 //*---------------------------------------------------------------------------- 1297 //* \fn AT91F_RSTSetMode 1298 //* \brief Set Reset Mode 1299 //*---------------------------------------------------------------------------- AT91F_RSTSetMode(AT91PS_RSTC pRSTC,unsigned int mode)1300__inline void AT91F_RSTSetMode( 1301 AT91PS_RSTC pRSTC, 1302 unsigned int mode) 1303 { 1304 pRSTC->RSTC_RMR = (0xA5000000 | mode); 1305 } 1306 1307 //*---------------------------------------------------------------------------- 1308 //* \fn AT91F_RSTGetMode 1309 //* \brief Get Reset Mode 1310 //*---------------------------------------------------------------------------- AT91F_RSTGetMode(AT91PS_RSTC pRSTC)1311__inline unsigned int AT91F_RSTGetMode( 1312 AT91PS_RSTC pRSTC) 1313 { 1314 return (pRSTC->RSTC_RMR); 1315 } 1316 1317 //*---------------------------------------------------------------------------- 1318 //* \fn AT91F_RSTGetStatus 1319 //* \brief Get Reset Status 1320 //*---------------------------------------------------------------------------- AT91F_RSTGetStatus(AT91PS_RSTC pRSTC)1321__inline unsigned int AT91F_RSTGetStatus( 1322 AT91PS_RSTC pRSTC) 1323 { 1324 return (pRSTC->RSTC_RSR); 1325 } 1326 1327 //*---------------------------------------------------------------------------- 1328 //* \fn AT91F_RSTIsSoftRstActive 1329 //* \brief Return !=0 if software reset is still not completed 1330 //*---------------------------------------------------------------------------- AT91F_RSTIsSoftRstActive(AT91PS_RSTC pRSTC)1331__inline unsigned int AT91F_RSTIsSoftRstActive( 1332 AT91PS_RSTC pRSTC) 1333 { 1334 return ((pRSTC->RSTC_RSR) & AT91C_RSTC_SRCMP); 1335 } 1336 /* ***************************************************************************** 1337 SOFTWARE API FOR RTTC 1338 ***************************************************************************** */ 1339 //*-------------------------------------------------------------------------------------- 1340 //* \fn AT91F_SetRTT_TimeBase() 1341 //* \brief Set the RTT prescaler according to the TimeBase in ms 1342 //*-------------------------------------------------------------------------------------- AT91F_RTTSetTimeBase(AT91PS_RTTC pRTTC,unsigned int ms)1343__inline unsigned int AT91F_RTTSetTimeBase( 1344 AT91PS_RTTC pRTTC, 1345 unsigned int ms) 1346 { 1347 if (ms > 2000) 1348 return 1; // AT91C_TIME_OUT_OF_RANGE 1349 pRTTC->RTTC_RTMR &= ~0xFFFF; 1350 pRTTC->RTTC_RTMR |= (((ms << 15) /1000) & 0xFFFF); 1351 return 0; 1352 } 1353 1354 //*-------------------------------------------------------------------------------------- 1355 //* \fn AT91F_RTTSetPrescaler() 1356 //* \brief Set the new prescaler value 1357 //*-------------------------------------------------------------------------------------- AT91F_RTTSetPrescaler(AT91PS_RTTC pRTTC,unsigned int rtpres)1358__inline unsigned int AT91F_RTTSetPrescaler( 1359 AT91PS_RTTC pRTTC, 1360 unsigned int rtpres) 1361 { 1362 pRTTC->RTTC_RTMR &= ~0xFFFF; 1363 pRTTC->RTTC_RTMR |= (rtpres & 0xFFFF); 1364 return (pRTTC->RTTC_RTMR); 1365 } 1366 1367 //*-------------------------------------------------------------------------------------- 1368 //* \fn AT91F_RTTRestart() 1369 //* \brief Restart the RTT prescaler 1370 //*-------------------------------------------------------------------------------------- AT91F_RTTRestart(AT91PS_RTTC pRTTC)1371__inline void AT91F_RTTRestart( 1372 AT91PS_RTTC pRTTC) 1373 { 1374 pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTRST; 1375 } 1376 1377 1378 //*-------------------------------------------------------------------------------------- 1379 //* \fn AT91F_RTT_SetAlarmINT() 1380 //* \brief Enable RTT Alarm Interrupt 1381 //*-------------------------------------------------------------------------------------- AT91F_RTTSetAlarmINT(AT91PS_RTTC pRTTC)1382__inline void AT91F_RTTSetAlarmINT( 1383 AT91PS_RTTC pRTTC) 1384 { 1385 pRTTC->RTTC_RTMR |= AT91C_RTTC_ALMIEN; 1386 } 1387 1388 //*-------------------------------------------------------------------------------------- 1389 //* \fn AT91F_RTT_ClearAlarmINT() 1390 //* \brief Disable RTT Alarm Interrupt 1391 //*-------------------------------------------------------------------------------------- AT91F_RTTClearAlarmINT(AT91PS_RTTC pRTTC)1392__inline void AT91F_RTTClearAlarmINT( 1393 AT91PS_RTTC pRTTC) 1394 { 1395 pRTTC->RTTC_RTMR &= ~AT91C_RTTC_ALMIEN; 1396 } 1397 1398 //*-------------------------------------------------------------------------------------- 1399 //* \fn AT91F_RTT_SetRttIncINT() 1400 //* \brief Enable RTT INC Interrupt 1401 //*-------------------------------------------------------------------------------------- AT91F_RTTSetRttIncINT(AT91PS_RTTC pRTTC)1402__inline void AT91F_RTTSetRttIncINT( 1403 AT91PS_RTTC pRTTC) 1404 { 1405 pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTINCIEN; 1406 } 1407 1408 //*-------------------------------------------------------------------------------------- 1409 //* \fn AT91F_RTT_ClearRttIncINT() 1410 //* \brief Disable RTT INC Interrupt 1411 //*-------------------------------------------------------------------------------------- AT91F_RTTClearRttIncINT(AT91PS_RTTC pRTTC)1412__inline void AT91F_RTTClearRttIncINT( 1413 AT91PS_RTTC pRTTC) 1414 { 1415 pRTTC->RTTC_RTMR &= ~AT91C_RTTC_RTTINCIEN; 1416 } 1417 1418 //*-------------------------------------------------------------------------------------- 1419 //* \fn AT91F_RTT_SetAlarmValue() 1420 //* \brief Set RTT Alarm Value 1421 //*-------------------------------------------------------------------------------------- AT91F_RTTSetAlarmValue(AT91PS_RTTC pRTTC,unsigned int alarm)1422__inline void AT91F_RTTSetAlarmValue( 1423 AT91PS_RTTC pRTTC, unsigned int alarm) 1424 { 1425 pRTTC->RTTC_RTAR = alarm; 1426 } 1427 1428 //*-------------------------------------------------------------------------------------- 1429 //* \fn AT91F_RTT_GetAlarmValue() 1430 //* \brief Get RTT Alarm Value 1431 //*-------------------------------------------------------------------------------------- AT91F_RTTGetAlarmValue(AT91PS_RTTC pRTTC)1432__inline unsigned int AT91F_RTTGetAlarmValue( 1433 AT91PS_RTTC pRTTC) 1434 { 1435 return(pRTTC->RTTC_RTAR); 1436 } 1437 1438 //*-------------------------------------------------------------------------------------- 1439 //* \fn AT91F_RTTGetStatus() 1440 //* \brief Read the RTT status 1441 //*-------------------------------------------------------------------------------------- AT91F_RTTGetStatus(AT91PS_RTTC pRTTC)1442__inline unsigned int AT91F_RTTGetStatus( 1443 AT91PS_RTTC pRTTC) 1444 { 1445 return(pRTTC->RTTC_RTSR); 1446 } 1447 1448 //*-------------------------------------------------------------------------------------- 1449 //* \fn AT91F_RTT_ReadValue() 1450 //* \brief Read the RTT value 1451 //*-------------------------------------------------------------------------------------- AT91F_RTTReadValue(AT91PS_RTTC pRTTC)1452__inline unsigned int AT91F_RTTReadValue( 1453 AT91PS_RTTC pRTTC) 1454 { 1455 register volatile unsigned int val1,val2; 1456 do 1457 { 1458 val1 = pRTTC->RTTC_RTVR; 1459 val2 = pRTTC->RTTC_RTVR; 1460 } 1461 while(val1 != val2); 1462 return(val1); 1463 } 1464 /* ***************************************************************************** 1465 SOFTWARE API FOR PITC 1466 ***************************************************************************** */ 1467 //*---------------------------------------------------------------------------- 1468 //* \fn AT91F_PITInit 1469 //* \brief System timer init : period in
xref:
/Kernel-v10.6.2/portable/IAR/AtmelSAM7S64/lib_AT91SAM7X256.h
(revision 01820d3ed93c735e5e8460a282971a7725fae44c)