1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the ST STR75x ARM7
31 * port.
32 *----------------------------------------------------------*/
33
34 /* Library includes. */
35 #include "75x_tb.h"
36 #include "75x_eic.h"
37
38 /* Scheduler includes. */
39 #include "FreeRTOS.h"
40 #include "task.h"
41
42 /* Constants required to setup the initial stack. */
43 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
44 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
45 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
46
47 /* Constants required to handle critical sections. */
48 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
49
50 /* Prescale used on the timer clock when calculating the tick period. */
51 #define portPRESCALE 20
52
53
54 /*-----------------------------------------------------------*/
55
56 /* Setup the TB to generate the tick interrupts. */
57 static void prvSetupTimerInterrupt( void );
58
59 /*-----------------------------------------------------------*/
60
61 /*
62 * Initialise the stack of a task to look exactly as if a call to
63 * portSAVE_CONTEXT had been called.
64 *
65 * See header file for description.
66 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)67 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
68 {
69 StackType_t *pxOriginalTOS;
70
71 pxOriginalTOS = pxTopOfStack;
72
73 /* To ensure asserts in tasks.c don't fail, although in this case the assert
74 is not really required. */
75 pxTopOfStack--;
76
77 /* Setup the initial stack of the task. The stack is set exactly as
78 expected by the portRESTORE_CONTEXT() macro. */
79
80 /* First on the stack is the return address - which in this case is the
81 start of the task. The offset is added to make the return address appear
82 as it would within an IRQ ISR. */
83 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
84 pxTopOfStack--;
85
86 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
87 pxTopOfStack--;
88 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
89 pxTopOfStack--;
90 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
91 pxTopOfStack--;
92 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
93 pxTopOfStack--;
94 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
95 pxTopOfStack--;
96 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
97 pxTopOfStack--;
98 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
99 pxTopOfStack--;
100 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
101 pxTopOfStack--;
102 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
103 pxTopOfStack--;
104 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
105 pxTopOfStack--;
106 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
107 pxTopOfStack--;
108 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
109 pxTopOfStack--;
110 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
111 pxTopOfStack--;
112 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
113 pxTopOfStack--;
114
115 /* When the task starts is will expect to find the function parameter in
116 R0. */
117 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
118 pxTopOfStack--;
119
120 /* The status register is set for system mode, with interrupts enabled. */
121 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
122
123 #ifdef THUMB_INTERWORK
124 {
125 /* We want the task to start in thumb mode. */
126 *pxTopOfStack |= portTHUMB_MODE_BIT;
127 }
128 #endif
129
130 pxTopOfStack--;
131
132 /* Interrupt flags cannot always be stored on the stack and will
133 instead be stored in a variable, which is then saved as part of the
134 tasks context. */
135 *pxTopOfStack = portNO_CRITICAL_NESTING;
136
137 return pxTopOfStack;
138 }
139 /*-----------------------------------------------------------*/
140
xPortStartScheduler(void)141 BaseType_t xPortStartScheduler( void )
142 {
143 extern void vPortISRStartFirstTask( void );
144
145 /* Start the timer that generates the tick ISR. Interrupts are disabled
146 here already. */
147 prvSetupTimerInterrupt();
148
149 /* Start the first task. */
150 vPortISRStartFirstTask();
151
152 /* Should not get here! */
153 return 0;
154 }
155 /*-----------------------------------------------------------*/
156
vPortEndScheduler(void)157 void vPortEndScheduler( void )
158 {
159 /* It is unlikely that the ARM port will require this function as there
160 is nothing to return to. */
161 }
162 /*-----------------------------------------------------------*/
163
prvSetupTimerInterrupt(void)164 static void prvSetupTimerInterrupt( void )
165 {
166 EIC_IRQInitTypeDef EIC_IRQInitStructure;
167 TB_InitTypeDef TB_InitStructure;
168
169 /* Setup the EIC for the TB. */
170 EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
171 EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
172 EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
173 EIC_IRQInit(&EIC_IRQInitStructure);
174
175 /* Setup the TB for the generation of the tick interrupt. */
176 TB_InitStructure.TB_Mode = TB_Mode_Timing;
177 TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
178 TB_InitStructure.TB_Prescaler = portPRESCALE - 1;
179 TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ );
180 TB_Init(&TB_InitStructure);
181
182 /* Enable TB Update interrupt */
183 TB_ITConfig(TB_IT_Update, ENABLE);
184
185 /* Clear TB Update interrupt pending bit */
186 TB_ClearITPendingBit(TB_IT_Update);
187
188 /* Enable TB */
189 TB_Cmd(ENABLE);
190 }
191 /*-----------------------------------------------------------*/
192
