1The following table shows which port is recommended to be used. 2 3 4RX MCU Group CPU FPU FPU Port Layer 5 Core (Single (Double CC-RX GNURX ICCRX (*6) 6 Type Precision) Precision) 7 8RX110 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) 9RX111 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) 10RX113 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) 11RX130 RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2) 12RX13T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 13 14RX210 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) 15RX21A RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) 16RX220 RXv1 No --- Renesas/RX200 (*3) N/A (*3) N/A (*3) 17RX230,RX231 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 18RX23E-A RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 19RX23W RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 20RX23T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 21RX24T RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 22RX24U RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 23 24RX610 RXv1 Yes --- N/A (*4) N/A (*4) N/A (*4) 25RX62N,RX621 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 26RX630 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 27RX634 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 28RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 29RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 30RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 31RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU 32RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 33RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 34RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600 35RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) 36 37RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2 38RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU 39RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU 40RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5) 41 42Notes: 43 44*1: If the application writer wants to use their own tick interrupt configuration when tickless idle 45functionality is not used, please define configSETUP_TICK_INTERRUPT() (in FreeRTOSConfig.h) and provide 46the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems to be 47configured to use any CMTn according to the definition of configTICK_VECTOR (in FreeRTOSConfig.h). 48 49*2: If the application writer wants to use their own tick interrupt configuration when tickless idle 50functionality is used, please modify port.c for the configuration. Please be aware that port.c is 51hard coded to use CMT0 though it seems to be configured to use any CMTn according to the definition of 52configTICK_VECTOR (in FreeRTOSConfig.h). 53 54*3: RX100 ports are also available. 55 56*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction. 57 58*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h. 59 60#define configUSE_TASK_DPFPU_SUPPORT 0 61 62*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port. 63It contains two definitions of interrupt priority like the following. 64 65#define configKERNEL_INTERRUPT_PRIORITY 1 66#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 67 68 69For more information about Renesas RX MCUs, please visit the following URL: 70 71https://www.renesas.com/products/microcontrollers-microprocessors/rx.html 72
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/Kernel-v10.6.2/portable/GCC/RX600/readme.txt
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