xref: /Kernel-v10.6.2/portable/GCC/PPC405_Xilinx/port.c (revision ef7b253b56c9788077f5ecd6c9deb4021923d646)
1 /*
2  * FreeRTOS Kernel V10.6.2
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
8  * this software and associated documentation files (the "Software"), to deal in
9  * the Software without restriction, including without limitation the rights to
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11  * the Software, and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in all
15  * copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * https://www.FreeRTOS.org
25  * https://github.com/FreeRTOS
26  *
27  */
28 
29 /*-----------------------------------------------------------
30  * Implementation of functions defined in portable.h for the PPC405 port.
31  *----------------------------------------------------------*/
32 
33 
34 /* Scheduler includes. */
35 #include "FreeRTOS.h"
36 #include "task.h"
37 
38 /* Library includes. */
39 #include "xtime_l.h"
40 #include "xintc.h"
41 #include "xintc_i.h"
42 
43 /*-----------------------------------------------------------*/
44 
45 /* Definitions to set the initial MSR of each task. */
46 #define portCRITICAL_INTERRUPT_ENABLE   ( 1UL << 17UL )
47 #define portEXTERNAL_INTERRUPT_ENABLE   ( 1UL << 15UL )
48 #define portMACHINE_CHECK_ENABLE        ( 1UL << 12UL )
49 
50 #if configUSE_FPU == 1
51     #define portAPU_PRESENT             ( 1UL << 25UL )
52     #define portFCM_FPU_PRESENT         ( 1UL << 13UL )
53 #else
54     #define portAPU_PRESENT             ( 0UL )
55     #define portFCM_FPU_PRESENT         ( 0UL )
56 #endif
57 
58 #define portINITIAL_MSR     ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE | portAPU_PRESENT | portFCM_FPU_PRESENT )
59 
60 
61 extern const unsigned _SDA_BASE_;
62 extern const unsigned _SDA2_BASE_;
63 
64 /*-----------------------------------------------------------*/
65 
66 /*
67  * Setup the system timer to generate the tick interrupt.
68  */
69 static void prvSetupTimerInterrupt( void );
70 
71 /*
72  * The handler for the tick interrupt - defined in portasm.s.
73  */
74 extern void vPortTickISR( void );
75 
76 /*
77  * The handler for the yield function - defined in portasm.s.
78  */
79 extern void vPortYield( void );
80 
81 /*
82  * Function to start the scheduler running by starting the highest
83  * priority task that has thus far been created.
84  */
85 extern void vPortStartFirstTask( void );
86 
87 /*-----------------------------------------------------------*/
88 
89 /* Structure used to hold the state of the interrupt controller. */
90 static XIntc xInterruptController;
91 
92 /*-----------------------------------------------------------*/
93 
94 /*
95  * Initialise the stack of a task to look exactly as if the task had been
96  * interrupted.
97  *
98  * See the header file portable.h.
99  */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)100 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
101 {
102     /* Place a known value at the bottom of the stack for debugging. */
103     *pxTopOfStack = 0xDEADBEEF;
104     pxTopOfStack--;
105 
106     /* EABI stack frame. */
107     pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */
108 
109     /* Parameters in R13. */
110     *pxTopOfStack = ( StackType_t ) &_SDA_BASE_; /* address of the first small data area */
111     pxTopOfStack -= 10;
112 
113     /* Parameters in R3. */
114     *pxTopOfStack = ( StackType_t ) pvParameters;
115     pxTopOfStack--;
116 
117     /* Parameters in R2. */
118     *pxTopOfStack = ( StackType_t ) &_SDA2_BASE_;   /* address of the second small data area */
119     pxTopOfStack--;
120 
121     /* R1 is the stack pointer so is omitted. */
122 
123     *pxTopOfStack = 0x10000001UL;;  /* R0. */
124     pxTopOfStack--;
125     *pxTopOfStack = 0x00000000UL;   /* USPRG0. */
126     pxTopOfStack--;
127     *pxTopOfStack = 0x00000000UL;   /* CR. */
128     pxTopOfStack--;
129     *pxTopOfStack = 0x00000000UL;   /* XER. */
130     pxTopOfStack--;
131     *pxTopOfStack = 0x00000000UL;   /* CTR. */
132     pxTopOfStack--;
133     *pxTopOfStack = ( StackType_t ) vPortEndScheduler;  /* LR. */
134     pxTopOfStack--;
135     *pxTopOfStack = ( StackType_t ) pxCode; /* SRR0. */
136     pxTopOfStack--;
137     *pxTopOfStack = portINITIAL_MSR;/* SRR1. */
138     pxTopOfStack--;
139     *pxTopOfStack = ( StackType_t ) vPortEndScheduler;/* Next LR. */
140     pxTopOfStack--;
141     *pxTopOfStack = 0x00000000UL;/* Backchain. */
142 
143     return pxTopOfStack;
144 }
145 /*-----------------------------------------------------------*/
146 
xPortStartScheduler(void)147 BaseType_t xPortStartScheduler( void )
148 {
149     prvSetupTimerInterrupt();
150     XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
151     vPortStartFirstTask();
152 
153     /* Should not get here as the tasks are now running! */
154     return pdFALSE;
155 }
156 /*-----------------------------------------------------------*/
157 
vPortEndScheduler(void)158 void vPortEndScheduler( void )
159 {
160     /* Not implemented. */
161     for( ;; );
162 }
163 /*-----------------------------------------------------------*/
164 
165 /*
166  * Hardware initialisation to generate the RTOS tick.
167  */
prvSetupTimerInterrupt(void)168 static void prvSetupTimerInterrupt( void )
169 {
170 const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
171 
172     XTime_PITClearInterrupt();
173     XTime_FITClearInterrupt();
174     XTime_WDTClearInterrupt();
175     XTime_WDTDisableInterrupt();
176     XTime_FITDisableInterrupt();
177 
178     XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );
179 
180     XTime_PITEnableAutoReload();
181     XTime_PITSetInterval( ulInterval );
182     XTime_PITEnableInterrupt();
183 }
184 /*-----------------------------------------------------------*/
185 
vPortISRHandler(void * pvNullDoNotUse)186 void vPortISRHandler( void *pvNullDoNotUse )
187 {
188 uint32_t ulInterruptStatus, ulInterruptMask = 1UL;
189 BaseType_t xInterruptNumber;
190 XIntc_Config *pxInterruptController;
191 XIntc_VectorTableEntry *pxTable;
192 
193     /* Just to remove compiler warning. */
194     ( void ) pvNullDoNotUse;
195 
196     /* Get the configuration by using the device ID - in this case it is
197     assumed that only one interrupt controller is being used. */
198     pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];
199 
200     /* Which interrupts are pending? */
201     ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
202 
203     for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )
204     {
205         if( ulInterruptStatus & 0x01UL )
206         {
207             /* Clear the pending interrupt. */
208             XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );
209 
210             /* Call the registered handler. */
211             pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );
212             pxTable->Handler( pxTable->CallBackRef );
213         }
214 
215         /* Check the next interrupt. */
216         ulInterruptMask <<= 0x01UL;
217         ulInterruptStatus >>= 0x01UL;
218 
219         /* Have we serviced all interrupts? */
220         if( ulInterruptStatus == 0UL )
221         {
222             break;
223         }
224     }
225 }
226 /*-----------------------------------------------------------*/
227 
vPortSetupInterruptController(void)228 void vPortSetupInterruptController( void )
229 {
230 extern void vPortISRWrapper( void );
231 
232     /* Perform all library calls necessary to initialise the exception table
233     and interrupt controller.  This assumes only one interrupt controller is in
234     use. */
235     XExc_mDisableExceptions( XEXC_NON_CRITICAL );
236     XExc_Init();
237 
238     /* The library functions save the context - we then jump to a wrapper to
239     save the stack into the TCB.  The wrapper then calls the handler defined
240     above. */
241     XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );
242     XIntc_Initialize( &xInterruptController, XPAR_XPS_INTC_0_DEVICE_ID );
243     XIntc_Start( &xInterruptController, XIN_REAL_MODE );
244 }
245 /*-----------------------------------------------------------*/
246 
xPortInstallInterruptHandler(uint8_t ucInterruptID,XInterruptHandler pxHandler,void * pvCallBackRef)247 BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
248 {
249 BaseType_t xReturn = pdFAIL;
250 
251     /* This function is defined here so the scope of xInterruptController can
252     remain within this file. */
253 
254     if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )
255     {
256         XIntc_Enable( &xInterruptController, ucInterruptID );
257         xReturn = pdPASS;
258     }
259 
260     return xReturn;
261 }
262