xref: /Kernel-v10.6.2/portable/GCC/ARM_CM7/r0p1/portmacro.h (revision ef7b253b56c9788077f5ecd6c9deb4021923d646) 
1 /*
2  * FreeRTOS Kernel V10.6.2
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
8  * this software and associated documentation files (the "Software"), to deal in
9  * the Software without restriction, including without limitation the rights to
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11  * the Software, and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in all
15  * copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * https://www.FreeRTOS.org
25  * https://github.com/FreeRTOS
26  *
27  */
28 
29 
30 #ifndef PORTMACRO_H
31     #define PORTMACRO_H
32 
33 /* *INDENT-OFF* */
34 #ifdef __cplusplus
35     extern "C" {
36 #endif
37 /* *INDENT-ON* */
38 
39 /*-----------------------------------------------------------
40  * Port specific definitions.
41  *
42  * The settings in this file configure FreeRTOS correctly for the
43  * given hardware and compiler.
44  *
45  * These settings should not be altered.
46  *-----------------------------------------------------------
47  */
48 
49 /* Type definitions. */
50     #define portCHAR          char
51     #define portFLOAT         float
52     #define portDOUBLE        double
53     #define portLONG          long
54     #define portSHORT         short
55     #define portSTACK_TYPE    uint32_t
56     #define portBASE_TYPE     long
57 
58     typedef portSTACK_TYPE   StackType_t;
59     typedef long             BaseType_t;
60     typedef unsigned long    UBaseType_t;
61 
62     #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
63         typedef uint16_t     TickType_t;
64         #define portMAX_DELAY              ( TickType_t ) 0xffff
65     #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
66         typedef uint32_t     TickType_t;
67         #define portMAX_DELAY              ( TickType_t ) 0xffffffffUL
68 
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
70  * not need to be guarded with a critical section. */
71         #define portTICK_TYPE_IS_ATOMIC    1
72     #else
73         #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
74     #endif
75 /*-----------------------------------------------------------*/
76 
77 /* Architecture specifics. */
78     #define portSTACK_GROWTH      ( -1 )
79     #define portTICK_PERIOD_MS    ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
80     #define portBYTE_ALIGNMENT    8
81     #define portDONT_DISCARD      __attribute__( ( used ) )
82 /*-----------------------------------------------------------*/
83 
84 /* Scheduler utilities. */
85     #define portYIELD()                                 \
86     {                                                   \
87         /* Set a PendSV to request a context switch. */ \
88         portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
89                                                         \
90         /* Barriers are normally not required but do ensure the code is completely \
91          * within the specified behaviour for the architecture. */ \
92         __asm volatile ( "dsb" ::: "memory" );                     \
93         __asm volatile ( "isb" );                                  \
94     }
95 
96     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
97     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
98     #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired != pdFALSE ) portYIELD(); } while( 0 )
99     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
100 /*-----------------------------------------------------------*/
101 
102 /* Critical section management. */
103     extern void vPortEnterCritical( void );
104     extern void vPortExitCritical( void );
105     #define portSET_INTERRUPT_MASK_FROM_ISR()         ulPortRaiseBASEPRI()
106     #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )    vPortSetBASEPRI( x )
107     #define portDISABLE_INTERRUPTS()                  vPortRaiseBASEPRI()
108     #define portENABLE_INTERRUPTS()                   vPortSetBASEPRI( 0 )
109     #define portENTER_CRITICAL()                      vPortEnterCritical()
110     #define portEXIT_CRITICAL()                       vPortExitCritical()
111 
112 /*-----------------------------------------------------------*/
113 
114 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
115  * not necessary for to use this port.  They are defined so the common demo files
116  * (which build with all the ports) will build. */
117     #define portTASK_FUNCTION_PROTO( vFunction, pvParameters )    void vFunction( void * pvParameters )
118     #define portTASK_FUNCTION( vFunction, pvParameters )          void vFunction( void * pvParameters )
119 /*-----------------------------------------------------------*/
120 
121 /* Tickless idle/low power functionality. */
122     #ifndef portSUPPRESS_TICKS_AND_SLEEP
123         extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
124         #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )    vPortSuppressTicksAndSleep( xExpectedIdleTime )
125     #endif
126 /*-----------------------------------------------------------*/
127 
128 /* Architecture specific optimisations. */
129     #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
130         #define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
131     #endif
132 
133     #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
134 
135 /* Generic helper function. */
ucPortCountLeadingZeros(uint32_t ulBitmap)136         __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
137         {
138             uint8_t ucReturn;
139 
140             __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
141 
142             return ucReturn;
143         }
144 
145 /* Check the configuration. */
146         #if ( configMAX_PRIORITIES > 32 )
147             #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
148         #endif
149 
150 /* Store/clear the ready priorities in a bit map. */
151         #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities )    ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
152         #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities )     ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
153 
154 /*-----------------------------------------------------------*/
155 
156         #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )    uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
157 
158     #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
159 
160 /*-----------------------------------------------------------*/
161 
162     #ifdef configASSERT
163         void vPortValidateInterruptPriority( void );
164         #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()    vPortValidateInterruptPriority()
165     #endif
166 
167 /* portNOP() is not required by this port. */
168     #define portNOP()
169 
170     #define portINLINE              __inline
171 
172     #ifndef portFORCE_INLINE
173         #define portFORCE_INLINE    inline __attribute__( ( always_inline ) )
174     #endif
175 
xPortIsInsideInterrupt(void)176     portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
177     {
178         uint32_t ulCurrentInterrupt;
179         BaseType_t xReturn;
180 
181         /* Obtain the number of the currently executing interrupt. */
182         __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
183 
184         if( ulCurrentInterrupt == 0 )
185         {
186             xReturn = pdFALSE;
187         }
188         else
189         {
190             xReturn = pdTRUE;
191         }
192 
193         return xReturn;
194     }
195 
196 /*-----------------------------------------------------------*/
197 
vPortRaiseBASEPRI(void)198     portFORCE_INLINE static void vPortRaiseBASEPRI( void )
199     {
200         uint32_t ulNewBASEPRI;
201 
202         __asm volatile
203         (
204             "   mov %0, %1                                              \n"\
205             "   cpsid i                                                 \n"\
206             "   msr basepri, %0                                         \n"\
207             "   isb                                                     \n"\
208             "   dsb                                                     \n"\
209             "   cpsie i                                                 \n"\
210             : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
211         );
212     }
213 
214 /*-----------------------------------------------------------*/
215 
ulPortRaiseBASEPRI(void)216     portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
217     {
218         uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
219 
220         __asm volatile
221         (
222             "   mrs %0, basepri                                         \n"\
223             "   mov %1, %2                                              \n"\
224             "   cpsid i                                                 \n"\
225             "   msr basepri, %1                                         \n"\
226             "   isb                                                     \n"\
227             "   dsb                                                     \n"\
228             "   cpsie i                                                 \n"\
229             : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
230         );
231 
232         /* This return will not be reached but is necessary to prevent compiler
233          * warnings. */
234         return ulOriginalBASEPRI;
235     }
236 /*-----------------------------------------------------------*/
237 
vPortSetBASEPRI(uint32_t ulNewMaskValue)238     portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
239     {
240         __asm volatile
241         (
242             "   msr basepri, %0 "::"r" ( ulNewMaskValue ) : "memory"
243         );
244     }
245 /*-----------------------------------------------------------*/
246 
247     #define portMEMORY_BARRIER()    __asm volatile ( "" ::: "memory" )
248 
249 /* *INDENT-OFF* */
250 #ifdef __cplusplus
251     }
252 #endif
253 /* *INDENT-ON* */
254 
255 #endif /* PORTMACRO_H */
256