1 /* 2 * FreeRTOS Kernel V10.6.2 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 30 #ifndef PORTMACRO_H 31 #define PORTMACRO_H 32 33 /* *INDENT-OFF* */ 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 /* *INDENT-ON* */ 38 39 /*----------------------------------------------------------- 40 * Port specific definitions. 41 * 42 * The settings in this file configure FreeRTOS correctly for the 43 * given hardware and compiler. 44 * 45 * These settings should not be altered. 46 *----------------------------------------------------------- 47 */ 48 49 /* Type definitions. */ 50 #define portCHAR char 51 #define portFLOAT float 52 #define portDOUBLE double 53 #define portLONG long 54 #define portSHORT short 55 #define portSTACK_TYPE uint32_t 56 #define portBASE_TYPE long 57 58 typedef portSTACK_TYPE StackType_t; 59 typedef long BaseType_t; 60 typedef unsigned long UBaseType_t; 61 62 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) 63 typedef uint16_t TickType_t; 64 #define portMAX_DELAY ( TickType_t ) 0xffff 65 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) 66 typedef uint32_t TickType_t; 67 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 68 69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do 70 * not need to be guarded with a critical section. */ 71 #define portTICK_TYPE_IS_ATOMIC 1 72 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS ) 73 typedef uint64_t TickType_t; 74 #define portMAX_DELAY ( TickType_t ) 0xffffffffffffffffULL 75 #else 76 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. 77 #endif 78 /*-----------------------------------------------------------*/ 79 80 /* Architecture specifics. */ 81 #define portSTACK_GROWTH ( -1 ) 82 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 83 #define portBYTE_ALIGNMENT 8 84 #define portDONT_DISCARD __attribute__( ( used ) ) 85 /*-----------------------------------------------------------*/ 86 87 /* Scheduler utilities. */ 88 #define portYIELD() \ 89 { \ 90 /* Set a PendSV to request a context switch. */ \ 91 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ 92 \ 93 /* Barriers are normally not required but do ensure the code is completely \ 94 * within the specified behaviour for the architecture. */ \ 95 __asm volatile ( "dsb" ::: "memory" ); \ 96 __asm volatile ( "isb" ); \ 97 } 98 99 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) ) 100 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) 101 #define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD(); } while( 0 ) 102 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 103 /*-----------------------------------------------------------*/ 104 105 /* Critical section management. */ 106 extern void vPortEnterCritical( void ); 107 extern void vPortExitCritical( void ); 108 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() 109 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x ) 110 #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI() 111 #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 ) 112 #define portENTER_CRITICAL() vPortEnterCritical() 113 #define portEXIT_CRITICAL() vPortExitCritical() 114 115 /*-----------------------------------------------------------*/ 116 117 /* Task function macros as described on the FreeRTOS.org WEB site. These are 118 * not necessary for to use this port. They are defined so the common demo files 119 * (which build with all the ports) will build. */ 120 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) 121 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) 122 /*-----------------------------------------------------------*/ 123 124 /* Tickless idle/low power functionality. */ 125 #ifndef portSUPPRESS_TICKS_AND_SLEEP 126 extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); 127 #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) 128 #endif 129 /*-----------------------------------------------------------*/ 130 131 /* Architecture specific optimisations. */ 132 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION 133 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 134 #endif 135 136 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 137 138 /* Generic helper function. */ ucPortCountLeadingZeros(uint32_t ulBitmap)139 __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap ) 140 { 141 uint8_t ucReturn; 142 143 __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" ); 144 145 return ucReturn; 146 } 147 148 /* Check the configuration. */ 149 #if ( configMAX_PRIORITIES > 32 ) 150 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. 151 #endif 152 153 /* Store/clear the ready priorities in a bit map. */ 154 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) 155 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) 156 157 /*-----------------------------------------------------------*/ 158 159 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) 160 161 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ 162 163 /*-----------------------------------------------------------*/ 164 165 #ifdef configASSERT 166 void vPortValidateInterruptPriority( void ); 167 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() 168 #endif 169 170 /* portNOP() is not required by this port. */ 171 #define portNOP() 172 173 #define portINLINE __inline 174 175 #ifndef portFORCE_INLINE 176 #define portFORCE_INLINE inline __attribute__( ( always_inline ) ) 177 #endif 178 xPortIsInsideInterrupt(void)179 portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) 180 { 181 uint32_t ulCurrentInterrupt; 182 BaseType_t xReturn; 183 184 /* Obtain the number of the currently executing interrupt. */ 185 __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" ); 186 187 if( ulCurrentInterrupt == 0 ) 188 { 189 xReturn = pdFALSE; 190 } 191 else 192 { 193 xReturn = pdTRUE; 194 } 195 196 return xReturn; 197 } 198 199 /*-----------------------------------------------------------*/ 200 vPortRaiseBASEPRI(void)201 portFORCE_INLINE static void vPortRaiseBASEPRI( void ) 202 { 203 uint32_t ulNewBASEPRI; 204 205 __asm volatile 206 ( 207 " mov %0, %1 \n"\ 208 " msr basepri, %0 \n"\ 209 " isb \n"\ 210 " dsb \n"\ 211 : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" 212 ); 213 } 214 215 /*-----------------------------------------------------------*/ 216 ulPortRaiseBASEPRI(void)217 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void ) 218 { 219 uint32_t ulOriginalBASEPRI, ulNewBASEPRI; 220 221 __asm volatile 222 ( 223 " mrs %0, basepri \n"\ 224 " mov %1, %2 \n"\ 225 " msr basepri, %1 \n"\ 226 " isb \n"\ 227 " dsb \n"\ 228 : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" 229 ); 230 231 /* This return will not be reached but is necessary to prevent compiler 232 * warnings. */ 233 return ulOriginalBASEPRI; 234 } 235 /*-----------------------------------------------------------*/ 236 vPortSetBASEPRI(uint32_t ulNewMaskValue)237 portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue ) 238 { 239 __asm volatile 240 ( 241 " msr basepri, %0 "::"r" ( ulNewMaskValue ) : "memory" 242 ); 243 } 244 /*-----------------------------------------------------------*/ 245 246 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" ) 247 248 /* *INDENT-OFF* */ 249 #ifdef __cplusplus 250 } 251 #endif 252 /* *INDENT-ON* */ 253 254 #endif /* PORTMACRO_H */ 255