1 /* 2 * FreeRTOS Kernel V10.6.2 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 /* 30 Changes from V3.2.3 31 32 + Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1. 33 34 Changes from V3.2.4 35 36 + Removed the use of the %0 parameter within the assembler macros and 37 replaced them with hard coded registers. This will ensure the 38 assembler does not select the link register as the temp register as 39 was occasionally happening previously. 40 41 + The assembler statements are now included in a single asm block rather 42 than each line having its own asm block. 43 44 Changes from V4.5.0 45 46 + Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros 47 and replaced them with portYIELD_FROM_ISR() macro. Application code 48 should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT() 49 macros as per the V4.5.1 demo code. 50 */ 51 52 #ifndef PORTMACRO_H 53 #define PORTMACRO_H 54 55 /* *INDENT-OFF* */ 56 #ifdef __cplusplus 57 extern "C" { 58 #endif 59 /* *INDENT-ON* */ 60 61 /*----------------------------------------------------------- 62 * Port specific definitions. 63 * 64 * The settings in this file configure FreeRTOS correctly for the 65 * given hardware and compiler. 66 * 67 * These settings should not be altered. 68 *----------------------------------------------------------- 69 */ 70 71 /* Type definitions. */ 72 #define portCHAR char 73 #define portFLOAT float 74 #define portDOUBLE double 75 #define portLONG long 76 #define portSHORT short 77 #define portSTACK_TYPE uint32_t 78 #define portBASE_TYPE portLONG 79 80 typedef portSTACK_TYPE StackType_t; 81 typedef long BaseType_t; 82 typedef unsigned long UBaseType_t; 83 84 #if( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) 85 typedef uint16_t TickType_t; 86 #define portMAX_DELAY ( TickType_t ) 0xffff 87 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) 88 typedef uint32_t TickType_t; 89 #define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFFUL ) 90 #else 91 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. 92 #endif 93 /*-----------------------------------------------------------*/ 94 95 /* Architecture specifics. */ 96 #define portSTACK_GROWTH ( -1 ) 97 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 98 #define portBYTE_ALIGNMENT 8 99 #define portNOP() __asm volatile ( "NOP" ); 100 /*-----------------------------------------------------------*/ 101 102 103 /* Scheduler utilities. */ 104 105 /* 106 * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR 107 * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but 108 * are included here for efficiency. An attempt to call one from 109 * THUMB mode code will result in a compile time error. 110 */ 111 112 #define portRESTORE_CONTEXT() \ 113 { \ 114 extern volatile void * volatile pxCurrentTCB; \ 115 extern volatile uint32_t ulCriticalNesting; \ 116 \ 117 /* Set the LR to the task stack. */ \ 118 __asm volatile ( \ 119 "LDR R0, =pxCurrentTCB \n\t" \ 120 "LDR R0, [R0] \n\t" \ 121 "LDR LR, [R0] \n\t" \ 122 \ 123 /* The critical nesting depth is the first item on the stack. */ \ 124 /* Load it into the ulCriticalNesting variable. */ \ 125 "LDR R0, =ulCriticalNesting \n\t" \ 126 "LDMFD LR!, {R1} \n\t" \ 127 "STR R1, [R0] \n\t" \ 128 \ 129 /* Get the SPSR from the stack. */ \ 130 "LDMFD LR!, {R0} \n\t" \ 131 "MSR SPSR, R0 \n\t" \ 132 \ 133 /* Restore all system mode registers for the task. */ \ 134 "LDMFD LR, {R0-R14}^ \n\t" \ 135 "NOP \n\t" \ 136 \ 137 /* Restore the return address. */ \ 138 "LDR LR, [LR, #+60] \n\t" \ 139 \ 140 /* And return - correcting the offset in the LR to obtain the */ \ 141 /* correct address. */ \ 142 "SUBS PC, LR, #4 \n\t" \ 143 ); \ 144 ( void ) ulCriticalNesting; \ 145 ( void ) pxCurrentTCB; \ 146 } 147 /*-----------------------------------------------------------*/ 148 149 #define portSAVE_CONTEXT() \ 150 { \ 151 extern volatile void * volatile pxCurrentTCB; \ 152 extern volatile uint32_t ulCriticalNesting; \ 153 \ 154 /* Push R0 as we are going to use the register. */ \ 155 __asm volatile ( \ 156 "STMDB SP!, {R0} \n\t" \ 157 \ 158 /* Set R0 to point to the task stack pointer. */ \ 159 "STMDB SP,{SP}^ \n\t" \ 160 "NOP \n\t" \ 161 "SUB SP, SP, #4 \n\t" \ 162 "LDMIA SP!,{R0} \n\t" \ 163 \ 164 /* Push the return address onto the stack. */ \ 165 "STMDB R0!, {LR} \n\t" \ 166 \ 167 /* Now we have saved LR we can use it instead of R0. */ \ 168 "MOV LR, R0 \n\t" \ 169 \ 170 /* Pop R0 so we can save it onto the system mode stack. */ \ 171 "LDMIA SP!, {R0} \n\t" \ 172 \ 173 /* Push all the system mode registers onto the task stack. */ \ 174 "STMDB LR,{R0-LR}^ \n\t" \ 175 "NOP \n\t" \ 176 "SUB LR, LR, #60 \n\t" \ 177 \ 178 /* Push the SPSR onto the task stack. */ \ 179 "MRS R0, SPSR \n\t" \ 180 "STMDB LR!, {R0} \n\t" \ 181 \ 182 "LDR R0, =ulCriticalNesting \n\t" \ 183 "LDR R0, [R0] \n\t" \ 184 "STMDB LR!, {R0} \n\t" \ 185 \ 186 /* Store the new top of stack for the task. */ \ 187 "LDR R0, =pxCurrentTCB \n\t" \ 188 "LDR R0, [R0] \n\t" \ 189 "STR LR, [R0] \n\t" \ 190 ); \ 191 ( void ) ulCriticalNesting; \ 192 ( void ) pxCurrentTCB; \ 193 } 194 195 196 #define portYIELD_FROM_ISR() vTaskSwitchContext() 197 #define portYIELD() __asm volatile ( "SWI 0" ) 198 /*-----------------------------------------------------------*/ 199 200 201 /* Critical section management. */ 202 203 /* 204 * The interrupt management utilities can only be called from ARM mode. When 205 * THUMB_INTERWORK is defined the utilities are defined as functions in 206 * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not 207 * defined then the utilities are defined as macros here - as per other ports. 208 */ 209 210 #ifdef THUMB_INTERWORK 211 212 extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked)); 213 extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked)); 214 215 #define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb() 216 #define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb() 217 218 #else 219 220 #define portDISABLE_INTERRUPTS() \ 221 __asm volatile ( \ 222 "STMDB SP!, {R0} \n\t" /* Push R0. */ \ 223 "MRS R0, CPSR \n\t" /* Get CPSR. */ \ 224 "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \ 225 "MSR CPSR, R0 \n\t" /* Write back modified value. */ \ 226 "LDMIA SP!, {R0} " ) /* Pop R0. */ 227 228 #define portENABLE_INTERRUPTS() \ 229 __asm volatile ( \ 230 "STMDB SP!, {R0} \n\t" /* Push R0. */ \ 231 "MRS R0, CPSR \n\t" /* Get CPSR. */ \ 232 "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \ 233 "MSR CPSR, R0 \n\t" /* Write back modified value. */ \ 234 "LDMIA SP!, {R0} " ) /* Pop R0. */ 235 236 #endif /* THUMB_INTERWORK */ 237 238 extern void vPortEnterCritical( void ); 239 extern void vPortExitCritical( void ); 240 241 #define portENTER_CRITICAL() vPortEnterCritical(); 242 #define portEXIT_CRITICAL() vPortExitCritical(); 243 /*-----------------------------------------------------------*/ 244 245 /* Task function macros as described on the FreeRTOS.org WEB site. */ 246 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) 247 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) 248 249 /* *INDENT-OFF* */ 250 #ifdef __cplusplus 251 } 252 #endif 253 /* *INDENT-ON* */ 254 255 #endif /* PORTMACRO_H */ 256
xref:
/Kernel-v10.6.2/portable/GCC/ARM7_AT91SAM7S/portmacro.h
(revision ef7b253b56c9788077f5ecd6c9deb4021923d646)