| /Kernel-v10.6.2/portable/ThirdParty/XCC/Xtensa/ |
| D | readme_xtensa.txt | 33 thread-safety on a per task basis (for use in tasks only, not interrupt
41 This port also includes a simple example application that may run on
61 FreeRTOS can run on any Xtensa or Diamond board without this board support
63 and drivers for any on-board devices you want to use.
123 you have a supported emulation board, you can build to run on that. You
124 can also build to run on a raw Xtensa core with no board support, a
126 recommends doing functional development on the simulator because it
134 The makefiles work on Windows and Linux and support incremental builds.
184 The provided examples are designed to run on the Xtensa instruction set
209 FreeRTOS library build makefile automatically, passing on the relevant
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| /Kernel-v10.6.2/.github/ |
| D | CONTRIBUTING.md | 20 1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issu…
24 When creating a new topic on the forums or filing an issue, please include as many relevant details…
26 * A clear description of the situation - what you observe, what you expect, and your view on how th…
36 1. You are working against the latest source on the *main* branch.
43 … the source; focus on the specific change you are contributing. If you also reformat all the code,…
50 GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork…
58 … while pull requests are reviewed. The time it takes to review will depend on complexity and consi…
61 ## Finding contributions to work on
62 Looking at the existing issues is a great way to find something to contribute on. As our projects, …
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| /Kernel-v10.6.2/include/ |
| D | queue.h | 41 /* *INDENT-ON* */
108 * that will be copied for each posted item. Each item on the queue must be
182 * that will be copied for each posted item. Each item on the queue must be
282 * @param xQueue The handle to the queue on which the item is to be posted.
284 * @param pvItemToQueue A pointer to the item that is to be placed on the
290 * waiting for space to become available on the queue, should it already
365 * @param xQueue The handle to the queue on which the item is to be posted.
367 * @param pvItemToQueue A pointer to the item that is to be placed on the
373 * waiting for space to become available on the queue, should it already
446 * Post an item on a queue. The item is queued by copy, not by reference.
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| D | message_buffer.h | 31 * Message buffers build functionality on top of FreeRTOS stream buffers.
40 * are built on top of stream buffers) assumes there is only one task or
56 * the API function). sizeof( size_t ) is typically 4 bytes on a 32-bit
57 * architecture, so writing a 10 byte message to a message buffer on a 32-bit
77 /* *INDENT-ON* */
107 * store the message's length. sizeof( size_t ) is typically 4 bytes on a
108 * 32-bit architecture, so on most 32-bit architectures a 10 byte message will
180 * the message's length. sizeof( size_t ) is typically 4 bytes on a 32-bit
181 * architecture, so on most 32-bit architecture a 10 byte message will take up
295 * are built on top of stream buffers) assumes there is only one task or
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| D | croutine.h | 42 /* *INDENT-ON* */
340 * See the co-routine section of the WEB documentation for information on
347 * @param pxQueue The handle of the queue on which the data will be posted.
357 * to wait for space to become available on the queue, should space not be
441 * See the co-routine section of the WEB documentation for information on
470 * // blocks on the queue until the number is received.
482 * // Wait for data to become available on the queue.
535 * See the co-routine section of the WEB documentation for information on
539 * @param xQueue The handle to the queue on which the item is to be posted.
541 * @param pvItemToQueue A pointer to the item that is to be placed on the
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| D | task.h | 43 /* *INDENT-ON* */
209 * NOTE: This may alter the stack (depending on the portable implementation)
224 * NOTE: This may alter the stack (depending on the portable implementation)
435 * // an array of StackType_t variables. The size of StackType_t is dependent on
693 * // Now the task can continue its function, but from this point on can only
758 * task remains blocked depends on the tick rate. The constant
890 * as when vTaskDelay() is called, or an event on an object, such as when
897 * know which object a task was blocked on in order to know which actions to
898 * take. For example, if the task was blocked on a queue the interrupt handler
1109 * i.e. calling vTaskSuspend () twice on the same task still only requires one
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| D | stream_buffer.h | 37 * are built on top of stream buffers) assumes there is only one task or
63 /* *INDENT-ON* */
99 * buffer before a task that is blocked on the stream buffer to wait for data is
100 * moved out of the blocked state. For example, if a task is blocked on a read
103 * time expires. As another example, if a task is blocked on a read of an empty
184 * buffer before a task that is blocked on the stream buffer to wait for data is
185 * moved out of the blocked state. For example, if a task is blocked on a read
188 * time expires. As another example, if a task is blocked on a read of an empty
309 * are built on top of stream buffers) assumes there is only one task or
339 * so the absolute time it represents is dependent on the tick frequency. The
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| D | atomic.h | 52 /* *INDENT-ON* */
81 * Inline is compiler specific, and may not always get inlined depending on your
98 * @brief Performs an atomic compare-and-swap operation on the specified values.
165 * @brief Performs an atomic compare-and-swap operation on the specified pointer
309 * @brief Performs an atomic OR operation on the specified values.
336 * @brief Performs an atomic AND operation on the specified values.
363 * @brief Performs an atomic NAND operation on the specified values.
390 * @brief Performs an atomic XOR operation on the specified values.
417 /* *INDENT-ON* */
|
| D | timers.h | 46 /* *INDENT-ON* */
52 /* IDs for commands that can be sent/received on the timer queue. These are to
498 * When the command is actually processed will depend on the priority of the
542 * When the command is actually processed will depend on the priority of the
595 * command queue. When the command is actually processed will depend on the
663 * When the command is actually processed will depend on the priority of the
716 * When the command is actually processed will depend on the priority of the
724 * // When a key is pressed, an LCD back-light is switched on. If 5 seconds pass
742 * // Ensure the LCD back-light is on, then reset the timer that is
810 * of its time in the Blocked state, waiting for messages to arrive on the timer
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| /Kernel-v10.6.2/ |
| D | History.txt | 31 + Add a new MPU wrapper that places additional restrictions on unprivileged
40 TCB. Previously the task's context was saved on its stack.
41 3. Execute system calls on a separate privileged only stack: FreeRTOS
127 + Add the ability to use Cortex-R5 port on the parts without FPU.
128 + Fix build warning in heap implementations on PIC24/dsPIC.
130 on QEMU which does not implement PRIO bits.
134 + Fix build issue in POSIX GCC port on Windows Subsystem for Linux (WSL). Contributed
220 when using CM4 MPU ports on a Cortex-M7 r0p0/r0p1 core.
240 the queue was locked. These are later used to unblock tasks waiting on
263 copies length on big endian platforms too.
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| /Kernel-v10.6.2/.github/workflows/ |
| D | kernel-demos.yml | 2 on: [push, pull_request]
7 runs-on: windows-latest
36 runs-on: windows-latest
61 runs-on: ubuntu-latest
90 runs-on: ubuntu-latest
119 runs-on: ubuntu-latest
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| D | ci.yml | 2 on:
10 runs-on: ubuntu-latest
38 runs-on: ubuntu-20.04
72 runs-on: ubuntu-latest
|
| /Kernel-v10.6.2/portable/ThirdParty/GCC/ATmega/ |
| D | readme.md | 14 Further commits can add support for 16-bit Timers available on many relevant devices. The availabil…
18 …oss the family must be considered, and differences respected. Some comments on the strategy follow.
24 …on of the device) are some 16-bit Timers (very device dependent, eg Timer3 on 1284p), The RTC Time…
26 … hence on these old devices cannot be used as the System Tick. and 2. New style enhanced WDT, whic…
36 …ionally support both 3 byte PC and 3 byte RAM addresses. However, focusing on just the ATmega fami…
47 When a very time critical process is running, based on microsecond timing generated by one of the T…
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| /Kernel-v10.6.2/portable/GCC/AVR32_UC3/ |
| D | port.c | 67 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
183 * Lock routine called by Newlib on malloc / realloc / free entry to guarantee a
193 * Unlock routine called by Newlib on malloc / realloc / free exit to guarantee
221 on entry as part of the context switch. */
399 .bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */ in prvSetupTimerInterrupt()
400 .beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */ in prvSetupTimerInterrupt()
401 .bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */ in prvSetupTimerInterrupt()
402 .bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */ in prvSetupTimerInterrupt()
404 .aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */ in prvSetupTimerInterrupt()
405 .aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */ in prvSetupTimerInterrupt()
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| /Kernel-v10.6.2/portable/RVDS/ARM_CM4F/ |
| D | portmacro.h | 37 /* *INDENT-ON* */
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
149 /* Task function macros as described on the FreeRTOS.org WEB site. These are
180 /* *INDENT-ON* */ in vPortSetBASEPRI()
197 /* *INDENT-ON* */ in vPortRaiseBASEPRI()
211 /* *INDENT-ON* */ in vPortClearBASEPRIFromISR()
229 /* *INDENT-ON* */ in ulPortRaiseBASEPRI()
246 /* *INDENT-ON* */ in xPortIsInsideInterrupt()
265 /* *INDENT-ON* */
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| /Kernel-v10.6.2/portable/RVDS/ARM_CM3/ |
| D | portmacro.h | 37 /* *INDENT-ON* */
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
149 /* Task function macros as described on the FreeRTOS.org WEB site. These are
180 /* *INDENT-ON* */ in vPortSetBASEPRI()
197 /* *INDENT-ON* */ in vPortRaiseBASEPRI()
211 /* *INDENT-ON* */ in vPortClearBASEPRIFromISR()
229 /* *INDENT-ON* */ in ulPortRaiseBASEPRI()
246 /* *INDENT-ON* */ in xPortIsInsideInterrupt()
266 /* *INDENT-ON* */
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| /Kernel-v10.6.2/portable/WizC/PIC18/ |
| D | port.c | 35 an error on devices with more than 64kB ROM.
68 * sfr's within parenthesis only on devices > 64kB
71 * 2 bytes per entry on devices <= 64kB
72 * 3 bytes per entry on devices > 64kB
76 * 1 byte : Number of entries on call/return stack
78 * 16 bytes: Free space on stack
123 * Place a few bytes of known values on the bottom of the stack. in pxPortInitialiseStack()
175 * The order is TOSU/TOSH/TOSL. For devices > 64kB, TOSU is put on the in pxPortInitialiseStack()
186 * Store the number of return addresses on the hardware stack. in pxPortInitialiseStack()
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| D | portmacro.h | 38 #error "WizC supports FreeRTOS on the Microchip PIC18-series only"
155 * The minimal stacksize is calculated on the first reference of
177 * are only saved/restored on devices with more than 64kB (32k Words) ROM.
248 ; is the number of addresses on the stack) in the \
251 ; After the loop the W-register is stored on the \
269 ; task is stored on the stack. When \
316 ; return addresses is the next item on the task stack. \
318 ; and store them on the hardwarestack. \
374 ; The return from portRESTORE_CONTEXT() depends on \
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| /Kernel-v10.6.2/portable/BCC/16BitDOS/PC/ |
| D | port.c | 69 /* The ISR used depends on whether the preemptive or cooperative
96 /* Points to the original routine installed on the vector we use for manual context switches. This…
99 /* Points to the original routine installed on the vector we use to chain to the DOS tick. This is…
114 /* Remember what was on the interrupts we are going to use in xPortStartScheduler()
122 /* Put our manual switch (yield) function on a known in xPortStartScheduler()
126 /* Put the old tick on a different interrupt number so we can in xPortStartScheduler()
130 /* The ISR used depends on whether the preemptive or cooperative in xPortStartScheduler()
134 /* Put our tick switch function on the timer interrupt. */ in xPortStartScheduler()
167 /* The ISR used depends on whether the preemptive or cooperative
|
| /Kernel-v10.6.2/portable/RVDS/ARM_CM7/r0p1/ |
| D | portmacro.h | 37 /* *INDENT-ON* */
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
149 /* Task function macros as described on the FreeRTOS.org WEB site. These are
180 /* *INDENT-ON* */ in vPortSetBASEPRI()
199 /* *INDENT-ON* */ in vPortRaiseBASEPRI()
213 /* *INDENT-ON* */ in vPortClearBASEPRIFromISR()
233 /* *INDENT-ON* */ in ulPortRaiseBASEPRI()
250 /* *INDENT-ON* */ in xPortIsInsideInterrupt()
269 /* *INDENT-ON* */
|
| /Kernel-v10.6.2/portable/ThirdParty/GCC/Xtensa_ESP32/include/ |
| D | xt_asm_utils.h | 9 /* File adapted to use on IDF FreeRTOS component, extracted
21 * A0-A15) to their ABI-defined spill regions on the stack.
24 * EXCM and WOE bit be enabled in PS, and relies on repeated hardware
46 * file on an LX6 core (ESP-32) I'm measuring 145 cycles to spill
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| /Kernel-v10.6.2/portable/IAR/AVR32_UC3/ |
| D | port.c | 67 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
186 on entry as part of the context switch. */
370 .bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */ in prvSetupTimerInterrupt()
371 .beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */ in prvSetupTimerInterrupt()
372 .bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */ in prvSetupTimerInterrupt()
373 .bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */ in prvSetupTimerInterrupt()
375 .aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */ in prvSetupTimerInterrupt()
376 .aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */ in prvSetupTimerInterrupt()
377 .acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */ in prvSetupTimerInterrupt()
378 ….acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibi… in prvSetupTimerInterrupt()
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| /Kernel-v10.6.2/portable/oWatcom/16BitDOS/PC/ |
| D | port.c | 82 /* The tick ISR used depends on whether the preemptive or cooperative scheduler
108 /* Points to the original routine installed on the vector we use for manual context switches. This…
111 /* Points to the original routine installed on the vector we use to chain to the DOS tick. This is…
126 /* Remember what was on the interrupts we are going to use in xPortStartScheduler()
134 /* Put our manual switch (yield) function on a known in xPortStartScheduler()
138 /* Put the old tick on a different interrupt number so we can in xPortStartScheduler()
144 /* Put our tick switch function on the timer interrupt. */ in xPortStartScheduler()
177 /* The tick ISR used depends on whether the preemptive or cooperative scheduler
|
| /Kernel-v10.6.2/portable/BCC/16BitDOS/Flsh186/ |
| D | port.c | 71 /* The ISR used depends on whether the preemptive or cooperative scheduler
91 /* Points to the original routine installed on the vector we use for manual
106 /* Remember what was on the interrupts we are going to use in xPortStartScheduler()
110 /* Put our manual switch (yield) function on a known in xPortStartScheduler()
116 /* Put our tick switch function on the timer interrupt. */ in xPortStartScheduler()
146 /* The ISR used depends on whether the preemptive or cooperative scheduler
205 on this timer so there is no old ISR to restore. */ in prvExitFunction()
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| /Kernel-v10.6.2/portable/ThirdParty/GCC/ARM_TFM/ |
| D | README.md | 5 (PSA) API based on the ARM Cortex-M23, Cortex-M33, Cortex-M55 and Cortex-M85
19 (tag: TF-Mv1.5.0 & TF-Mv1.6.0). The implementation is based on FreeRTOS mutex type semaphore.
23 To build a project based on this port:
55 …e.trustedfirmware.org/integration_guide/tfm_fpu_support.html) for FPU usage on the Non-Secure side.
61 …e.trustedfirmware.org/integration_guide/tfm_fpu_support.html) for MVE usage on the Non-Secure side.
|
